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M7350v2_en_gpl

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This commit is contained in:
T 2024-09-09 08:54:06 +00:00
parent f9cc65cfda
commit 801e6d2ad8
564 changed files with 96107 additions and 535 deletions
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6
external/compat-wireless/drivers/net/wireless/ath/ath6kl/txrx.c vendored
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@ -1030,8 +1030,10 @@ int ath6kl_send_msg_ipa(struct ath6kl_vif *vif, enum ipa_wlan_event type,
"IPA-CM: AP mode Adding Partial hdr: %s, %pM\n",
vif->ndev->name, vif->ndev->dev_addr);
/* Add partial header with IPA for this interface */
ath6kl_ipa_add_header_info(vif->ar, 1, vif->fw_vif_idx,
vif->ndev->name, vif->ndev->dev_addr);
if (!(test_bit(CONNECTED, &vif->flags))) {
ath6kl_ipa_add_header_info(vif->ar, 1, vif->fw_vif_idx,
vif->ndev->name, vif->ndev->dev_addr);
}
break;
case WLAN_AP_DISCONNECT:

23
external/compat-wireless/drivers/net/wireless/ath/ath6kl/usb.c vendored
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@ -1182,6 +1182,25 @@ static void ath6kl_usb_flush_all(struct ath6kl_usb *ar_usb)
#endif
}
static void ath6kl_usb_suspend_flush_all(struct ath6kl_usb *ar_usb)
{
int i;
struct ath6kl_usb_pipe *pipe;
for (i = 0; i < ATH6KL_USB_PIPE_MAX; i++) {
pipe = &ar_usb->pipes[i].ar_usb->pipes[i];
if (!pipe->ar_usb)
continue;
flush_work(&pipe->tx_io_complete_work);
flush_work(&pipe->rx_io_complete_work);
usb_kill_anchored_urbs(&pipe->urb_submitted);
}
#ifdef CONFIG_ATH6KL_AUTO_PM
flush_work(&ar_usb->pm_resume_work);
#endif
}
static void ath6kl_usb_start_recv_pipes(struct ath6kl_usb *ar_usb)
{
/*
@ -1421,6 +1440,7 @@ static void ath6kl_usb_destroy(struct ath6kl_usb *ar_usb)
ath6kl_usb_flush_all(ar_usb);
#ifdef CONFIG_ATH6KL_AUTO_PM
spin_lock_bh(&ar_usb->pm_lock);
while (!list_empty(&ar_usb->pm_q)) {
struct ath6kl_urb_context *urb_context;
@ -1430,6 +1450,7 @@ static void ath6kl_usb_destroy(struct ath6kl_usb *ar_usb)
list_del(&urb_context->link);
ath6kl_usb_cleanup_urb_context(urb_context);
}
spin_unlock_bh(&ar_usb->pm_lock);
#endif
ath6kl_usb_cleanup_pipe_resources(ar_usb);
@ -2463,7 +2484,7 @@ end:
return ret;
}
ath6kl_usb_flush_all(ar_usb);
ath6kl_usb_suspend_flush_all(ar_usb);
#ifdef CONFIG_ATH6KL_AUTO_PM
atomic_set(&ar_usb->autopm_state,
ATH6KL_USB_AUTOPM_STATE_SUSPENDED);

30
external/hostap/hostapd/Makefile vendored Normal file → Executable file
View File

@ -862,14 +862,42 @@ verify_config:
fi
install: all
ifndef CONFIG_TP_WLAN_MODULE_BCM
mkdir -p $(DESTDIR)/usr/bin
for i in $(ALL); do cp -f $$i $(DESTDIR)/usr/bin/$$i; done
endif
mkdir -p $(DESTDIR)/etc
ifdef CONFIG_DRIVER_AR6000
install -m 0644 config/ar6k-ap-all.conf $(DESTDIR)/etc/AR6003_hostapd.conf
install -m 0644 config/ar6k-ap1-all.conf $(DESTDIR)/etc/AR6003_AP1_hostapd.conf
endif
ifdef CONFIG_TP_WLAN_MODULE_BCM
ifdef CONFIG_WIRELESS_ACL_TYPE_BLACK
#[liyuan start] M7350 series enable acl deny list in default
install -m 0644 -d $(DESTDIR)/etc/config
install -m 0644 config/tp-bcm-ap-all-7350-series.conf $(DESTDIR)/etc/AR6004_hostapd.conf
install -m 0644 config/tp-bcm-ap-all-7350-series.deny $(DESTDIR)/etc/config/hostapd.deny
ln -s /etc/AR6004_hostapd.conf $(DESTDIR)/etc/hostapd.conf
install -m 0644 -d $(DESTDIR)/etc/default_config
install -m 0644 config/tp-bcm-ap-all-7350-series.conf $(DESTDIR)/etc/default_config/AR6004_hostapd.conf
install -m 0644 config/tp-bcm-ap-all-7350-series.deny $(DESTDIR)/etc/default_config/hostapd.deny
#[liyuan end]
else
#[lixiangkui start] install wifi default config
install -m 0644 config/tp-bcm-ap-all.conf $(DESTDIR)/etc/AR6004_hostapd.conf
ln -s /etc/AR6004_hostapd.conf $(DESTDIR)/etc/hostapd.conf
install -m 0644 -d $(DESTDIR)/etc/default_config
install -m 0644 config/tp-bcm-ap-all.conf $(DESTDIR)/etc/default_config/AR6004_hostapd.conf
#[lixiangkui end]
endif
else
ifdef CONFIG_DRIVER_NL80211
ifdef CONFIG_WIRELESS_ACL_TYPE_BLACK
#[liyuan start] M7350 series enable acl deny list in default
@ -896,6 +924,8 @@ else
endif
endif
endif
../src/drivers/build.hostapd:
@if [ -f ../src/drivers/build.wpa_supplicant ]; then \
$(MAKE) -C ../src/wps clean; \

2
external/hostap/hostapd/config/tp-ath6kl-ap-all.conf vendored
View File

@ -10,4 +10,4 @@ ignore_broadcast_ssid=0
ieee80211n=1
ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
require_ht=0
max_num_sta=15
max_num_sta=15

15
external/hostap/hostapd/config/tp-bcm-ap-all-7350-series.conf vendored Normal file
View File

@ -0,0 +1,15 @@
interface=wlan0
bridge=br0
driver=nl80211
ctrl_interface=/var/run/hostapd
wmode=2
channel=0
auto_chan_select=2
auth_algs=1
ignore_broadcast_ssid=0
ieee80211n=1
ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
require_ht=0
max_num_sta=15
macaddr_acl=3
deny_mac_file=/etc/config/hostapd.deny

0
external/hostap/hostapd/config/tp-bcm-ap-all-7350-series.deny vendored Normal file
View File

13
external/hostap/hostapd/config/tp-bcm-ap-all.conf vendored Normal file
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@ -0,0 +1,13 @@
interface=wlan0
bridge=br0
driver=nl80211
ctrl_interface=/var/run/hostapd
wmode=2
channel=0
auto_chan_select=2
auth_algs=1
ignore_broadcast_ssid=0
ieee80211n=1
ht_capab=[HT40-][SHORT-GI-20][SHORT-GI-40]
require_ht=0
max_num_sta=15

6
external/hostap/src/ap/ieee802_11_ht.c vendored
View File

@ -308,6 +308,8 @@ static int is_40_allowed(struct hostapd_iface *iface, int channel)
void ap_ht2040_timeout(void *eloop_data, void *user_data)
{
//[lixiangkui 20150417] Fix Bug#74496, don't switch to 40MHz
#if 0
struct hostapd_data *hapd = eloop_data;
wpa_printf(MSG_INFO, "Switching to 40MHz operation");
@ -316,7 +318,9 @@ void ap_ht2040_timeout(void *eloop_data, void *user_data)
HT_OPMODE_SWITCH_TO_40);
hapd->ht_40 = TRUE;
hapd->iconf->secondary_channel = hapd->secondary_ch;
#else
wpa_printf(MSG_INFO, "Don't switching to 40MHz!");
#endif
}
void hostapd_2040_coex_action(struct hostapd_data *hapd,
const struct ieee80211_mgmt *mgmt, size_t len)

27
kernel/arch/arm/boot/dts/m7350-un-v3/am3517_mt_ventoux.dts Normal file
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@ -0,0 +1,27 @@
/*
* Copyright (C) 2011 Ilya Yanok, EmCraft Systems
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "omap3.dtsi"
/ {
model = "TeeJet Mt.Ventoux";
compatible = "teejet,mt_ventoux", "ti,omap3";
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
/* AM35xx doesn't have IVA */
soc {
iva {
status = "disabled";
};
};
};

22
kernel/arch/arm/boot/dts/m7350-un-v3/apq8026-mtp.dts Normal file
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@ -0,0 +1,22 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "apq8026.dtsi"
/include/ "msm8226-mtp.dtsi"
/ {
model = "Qualcomm APQ 8026 MTP";
compatible = "qcom,apq8026-mtp", "qcom,apq8026", "qcom,mtp";
qcom,msm-id = <199 8 0>;
};

22
kernel/arch/arm/boot/dts/m7350-un-v3/apq8026-xpm.dts Normal file
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@ -0,0 +1,22 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "apq8026.dtsi"
/include/ "msm8226-cdp.dtsi"
/ {
model = "Qualcomm APQ 8026 XPM";
compatible = "qcom,apq8026-xpm", "qcom,apq8026", "qcom,xpm";
qcom,msm-id = <199 14 0>;
};

24
kernel/arch/arm/boot/dts/m7350-un-v3/apq8026.dtsi Normal file
View File

@ -0,0 +1,24 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* Only 8026-specific property overrides should be placed inside this
* file. Device definitions should be placed inside the msm8226.dtsi
* file.
*/
/include/ "msm8226.dtsi"
/ {
model = "Qualcomm APQ 8026";
compatible = "qcom,apq8026";
};

654
kernel/arch/arm/boot/dts/m7350-un-v3/apq8074-dragonboard.dtsi Normal file
View File

@ -0,0 +1,654 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "dsi-panel-sharp-qhd-video.dtsi"
/include/ "msm8974-camera-sensor-dragonboard.dtsi"
/include/ "msm8974-leds.dtsi"
&soc {
serial@f991e000 {
status = "ok";
};
qcom,mdss_dsi_sharp_qhd_video {
status = "ok";
};
qcom,hdmi_tx@fd922100 {
status = "ok";
};
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
vol_up {
label = "volume_up";
gpios = <&pm8941_gpios 5 0x1>;
linux,input-type = <1>;
linux,code = <115>;
gpio-key,wakeup;
debounce-interval = <15>;
};
general {
label = "general";
gpios = <&pm8941_gpios 23 0x1>;
linux,input-type = <1>;
linux,code = <102>;
gpio-key,wakeup;
debounce-interval = <15>;
};
};
bt_ar3002 {
compatible = "qca,ar3002";
qca,bt-reset-gpio = <&pm8941_gpios 34 0>;
};
hsic_hub {
compatible = "qcom,hsic-smsc-hub";
#address-cells = <1>;
#size-cells = <1>;
ranges;
smsc,reset-gpio = <&pm8941_gpios 8 0x00>;
hsic_host: hsic@f9a00000 {
compatible = "qcom,hsic-host";
reg = <0xf9a00000 0x400>;
#address-cells = <0>;
interrupt-parent = <&hsic_host>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 136 0
1 &intc 0 148 0
2 &msmgpio 144 0x8>;
interrupt-names = "core_irq", "async_irq", "wakeup";
HSIC_VDDCX-supply = <&pm8841_s2>;
HSIC_GDSC-supply = <&gdsc_usb_hsic>;
hsic,strobe-gpio = <&msmgpio 144 0x00>;
hsic,data-gpio = <&msmgpio 145 0x00>;
hsic,ignore-cal-pad-config;
hsic,strobe-pad-offset = <0x2050>;
hsic,data-pad-offset = <0x2054>;
qcom,msm-bus,name = "hsic";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only = <0>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<85 512 0 0>,
<85 512 40000 160000>;
};
};
i2c@f9923000 {
status = "ok";
atmel_mxt_ts@4a {
compatible = "atmel,mxt-ts";
reg = <0x4a>;
interrupt-parent = <&msmgpio>;
interrupts = <61 0x2>;
vdd_ana-supply = <&pm8941_l18>;
vcc_i2c-supply = <&pm8941_s3>;
atmel,reset-gpio = <&msmgpio 60 0x00>;
atmel,irq-gpio = <&msmgpio 61 0x00>;
atmel,panel-coords = <0 0 566 1067>;
atmel,display-coords = <0 0 540 960>;
atmel,i2c-pull-up;
atmel,cfg_1 {
atmel,family-id = <0x81>;
atmel,variant-id = <0x19>;
atmel,version = <0x10>;
atmel,build = <0xaa>;
atmel,config = [
/* Object 38, Instance = 0 */
0F 02 00 17 04 0C 00 00
/* Object 7, Instance = 0 */
30 FF 19
/* Object 8, Instance = 0 */
1B 00 05 01 00 00 08 08 00 00
/* Object 9, Instance = 0 */
83 00 00 13 0B 00 10 23 01 03
0A 0F 01 0B 04 05 28 0A 2B 04
36 02 00 00 00 00 8F 28 8F 50
12 0F 32 32 02
/* Object 15, Instance = 0 */
00 00 00 00 00 00 00 00 00 00
00
/* Object 18, Instance = 0 */
00 00
/* Object 19, Instance = 0 */
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00
/* Object 23, Instance = 0 */
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00
/* Object 25, Instance = 0 */
00 00 00 00 00 00 00 00 00 00
00 00 00 00
/* Object 40, Instance = 0 */
00 00 00 00 00
/* Object 42, Instance = 0 */
00 00 00 00 00 00 00 00
/* Object 46, Instance = 0 */
00 03 10 30 00 00 01 00 00
/* Object 47, Instance = 0 */
00 00 00 00 00 00 00 00 00 00
/* Object 48, Instance = 0 */
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00
];
};
};
};
gen-vkeys {
compatible = "qcom,gen-vkeys";
label = "atmel_mxt_ts";
qcom,disp-maxx = <540>;
qcom,disp-maxy = <960>;
qcom,panel-maxx = <566>;
qcom,panel-maxy = <1067>;
qcom,key-codes = <158 139 102 217>;
};
sound {
qcom,model = "apq8074-taiko-db-snd-card";
qcom,hdmi-audio-rx;
qcom,audio-routing =
"RX_BIAS", "MCLK",
"LDO_H", "MCLK",
"AMIC1", "MIC BIAS1 External",
"MIC BIAS1 External", "Analog Mic4",
"AMIC2", "MIC BIAS2 External",
"MIC BIAS2 External", "Headset Mic",
"AMIC3", "MIC BIAS2 External",
"MIC BIAS2 External", "ANCRight Headset Mic",
"AMIC4", "MIC BIAS2 External",
"MIC BIAS2 External", "ANCLeft Headset Mic",
"AMIC5", "MIC BIAS1 External",
"MIC BIAS1 External", "Analog Mic6",
"AMIC6", "MIC BIAS1 External",
"MIC BIAS1 External", "Analog Mic7",
"DMIC1", "MIC BIAS3 External",
"MIC BIAS3 External", "Digital Mic1",
"DMIC2", "MIC BIAS3 External",
"MIC BIAS3 External", "Digital Mic2",
"DMIC3", "MIC BIAS4 External",
"MIC BIAS4 External", "Digital Mic3",
"DMIC4", "MIC BIAS3 External",
"MIC BIAS3 External", "Digital Mic4",
"DMIC5", "MIC BIAS4 External",
"MIC BIAS4 External", "Digital Mic5",
"DMIC6", "MIC BIAS4 External",
"MIC BIAS4 External", "Digital Mic6";
};
qcom,pronto@fb21b000 {
status = "disabled";
};
qcom,iris-fm {
status = "disabled";
};
qcom,wcnss-wlan@fb000000 {
status = "disabled";
};
qcom,smd-wcnss {
status = "disabled";
};
qcom,smsm-wcnss {
status = "disabled";
};
};
&mdss_fb0 {
qcom,memory-reservation-size = <0x1000000>; /* size 16MB */
};
&sdcc3 {
qcom,sup-voltages = <2000 2000>;
status = "ok";
};
&pm8941_l19 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
qcom,init-voltage = <3300000>;
regulator-always-on;
};
&pm8941_l10 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
regulator-always-on;
};
&uart7 {
status = "ok";
qcom,tx-gpio = <&msmgpio 41 0x00>;
qcom,rx-gpio = <&msmgpio 42 0x00>;
qcom,cts-gpio = <&msmgpio 43 0x00>;
qcom,rfr-gpio = <&msmgpio 44 0x00>;
};
&usb_otg {
status = "ok";
qcom,hsusb-otg-otg-control = <2>;
qcom,hsusb-otg-mode = <3>;
vbus_otg-supply = <&pm8941_mvs1>;
qcom,usb2-enable-hsphy2;
qcom,dp-manual-pullup;
#address-cells = <0>;
interrupt-parent = <&usb_otg>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 134 0
1 &intc 0 140 0
2 &spmi_bus 0x0 0x0 0x9 0x0>;
interrupt-names = "core_irq", "async_irq", "pmic_id_irq";
};
&usb3 {
qcom,charging-disabled;
vbus_dwc3-supply = <0>;
dwc3@f9200000 {
host-only-mode;
};
};
&slim_msm {
taiko_codec {
qcom,cdc-micbias2-ext-cap;
qcom,cdc-micbias3-ext-cap;
};
};
&pm8941_gpios {
gpio@c000 { /* GPIO 1 */
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <2>;
qcom,src-sel = <0>;
};
gpio@c100 { /* GPIO 2 */
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <2>;
qcom,src-sel = <0>;
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
qcom,mode = <0>;
qcom,pull = <0>;
qcom,vin-sel = <2>;
qcom,src-sel = <0>;
};
gpio@c500 { /* GPIO 6 */
/* TUSB3_HUB-RESET */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <0>; /* QPNP_PIN_PULL_30 */
qcom,vin-sel = <0>; /* QPNP_PIN_VIN0 VPH */
qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
qcom,src-sel = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
qcom,invert = <1>; /* Keep it out of reset */
qcom,master-en = <1>;
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
/* HSIC_HUB-RESET */
qcom,mode = <1>; /* DIG_OUT */
qcom,pull = <5>; /* PULL_NO */
qcom,out-strength = <2>; /* STRENGTH_MED */
qcom,master-en = <1>;
};
gpio@c800 { /* GPIO 9 */
/* GbE_RST_N */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <0>; /* QPNP_PIN_PULL_30 */
qcom,vin-sel = <0>; /* QPNP_PIN_VIN0 VPH */
qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
qcom,src-sel = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
qcom,invert = <1>; /* Keep it out of reset */
qcom,master-en = <1>;
};
gpio@c900 { /* GPIO 10 */
/* SATA_RST_N */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <0>; /* QPNP_PIN_PULL_30 */
qcom,vin-sel = <0>; /* QPNP_PIN_VIN0 VPH */
qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
qcom,src-sel = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
qcom,invert = <1>; /* Keep it out of reset */
qcom,master-en = <1>;
};
gpio@ca00 { /* GPIO 11 */
};
gpio@cb00 { /* GPIO 12 */
};
gpio@cc00 { /* GPIO 13 */
};
gpio@cd00 { /* GPIO 14 */
};
gpio@ce00 { /* GPIO 15 */
qcom,mode = <1>;
qcom,output-type = <0>;
qcom,pull = <5>;
qcom,vin-sel = <2>;
qcom,out-strength = <3>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
};
gpio@cf00 { /* GPIO 16 */
};
gpio@d000 { /* GPIO 17 */
};
gpio@d100 { /* GPIO 18 */
};
gpio@d200 { /* GPIO 19 */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
qcom,src-sel = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
qcom,master-en = <1>;
};
gpio@d300 { /* GPIO 20 */
};
gpio@d400 { /* GPIO 21 */
};
gpio@d500 { /* GPIO 22 */
};
gpio@d600 { /* GPIO 23 */
};
gpio@d700 { /* GPIO 24 */
};
gpio@d800 { /* GPIO 25 */
};
gpio@d900 { /* GPIO 26 */
};
gpio@da00 { /* GPIO 27 */
};
gpio@db00 { /* GPIO 28 */
};
gpio@dc00 { /* GPIO 29 */
qcom,pull = <0>; /* set to default pull */
qcom,master-en = <1>;
qcom,vin-sel = <2>; /* select 1.8 V source */
};
gpio@dd00 { /* GPIO 30 */
};
gpio@de00 { /* GPIO 31 */
};
gpio@df00 { /* GPIO 32 */
};
gpio@e000 { /* GPIO 33 */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
qcom,src-sel = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
qcom,invert = <1>;
qcom,master-en = <1>;
};
gpio@e100 { /* GPIO 34 */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
qcom,src-sel = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
qcom,invert = <0>;
qcom,master-en = <1>;
};
gpio@e200 { /* GPIO 35 */
};
gpio@e300 { /* GPIO 36 */
qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
qcom,out-strength = <3>; /* QPNP_PIN_OUT_STRENGTH_HIGH */
qcom,src-sel = <3>; /* QPNP_PIN_SEL_FUNC_2 */
qcom,master-en = <1>;
};
};
&pm8941_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP 5 */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
};
};
&pm8841_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3*/
};
mpp@a300 { /* MPP 4*/
};
};
&spi_epm {
epm-adc@0 {
compatible = "cy,epm-adc-cy8c5568lti-114";
reg = <0>;
interrupt-parent = <&msmgpio>;
spi-max-frequency = <960000>;
qcom,channels = <31>;
qcom,gain = <50 50 50 50 50 100 50 50 50 50
50 50 50 50 100 50 50 50 50 100
50 50 50 100 50 50 50 1 1 1
1>;
qcom,rsense = <40 10 10 25 10 1000 75 25 10 25
33 500 200 10 500 100 33 200 25 100
75 500 50 200 5 5 3 1 1 1
1>;
qcom,channel-type = <0xf0000000>;
};
};
&spmi_bus {
qcom,pm8941@1 {
qcom,leds@d000 {
qcom,rgb_2 {
status = "ok";
qcom,default-state = "on";
qcom,turn-off-delay-ms = <1000>;
};
};
qcom,leds@d800 {
status = "okay";
qcom,wled_0 {
label = "wled";
linux,name = "wled:backlight";
linux,default-trigger = "bkl-trigger";
qcom,cs-out-en;
qcom,op-fdbck = <1>;
qcom,default-state = "on";
qcom,max-current = <20>;
qcom,ctrl-delay-us = <0>;
qcom,boost-curr-lim = <3>;
qcom,cp-sel = <0>;
qcom,switch-freq = <2>;
qcom,ovp-val = <1>;
qcom,num-strings = <1>;
qcom,id = <0>;
};
};
};
};
&pm8941_chg {
status = "ok";
qcom,charging-disabled;
qcom,chgr@1000 {
status = "ok";
};
qcom,buck@1100 {
status = "ok";
};
qcom,usb-chgpth@1300 {
status = "ok";
};
qcom,dc-chgpth@1400 {
status = "ok";
};
qcom,boost@1500 {
status = "ok";
};
qcom,chg-misc@1600 {
status = "ok";
};
};
&sdhc_1 {
vdd-supply = <&pm8941_l20>;
vdd-io-supply = <&pm8941_s3>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,nonremovable;
status = "ok";
};
&sdhc_2 {
#address-cells = <0>;
interrupt-parent = <&sdhc_2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 221 0
2 &msmgpio 62 0x3>;
interrupt-names = "hc_irq", "pwr_irq", "status_irq";
cd-gpios = <&msmgpio 62 0x1>;
vdd-supply = <&pm8941_l21>;
vdd-io-supply = <&pm8941_l13>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
status = "ok";
};

48
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* As a general rule, only version-specific property overrides should be placed
* inside this file. However, device definitions should be placed inside the
* msm8974.dtsi file.
*/
/include/ "msm8974-v1.dtsi"
&soc {
qcom,qseecom@a700000 {
compatible = "qcom,qseecom";
reg = <0x0a700000 0x500000>;
reg-names = "secapp-region";
qcom,disk-encrypt-pipe-pair = <2>;
qcom,hlos-ce-hw-instance = <1>;
qcom,qsee-ce-hw-instance = <0>;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,active-only = <0>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<55 512 0 0>,
<55 512 3936000 393600>,
<55 512 3936000 393600>,
<55 512 3936000 393600>;
};
};
&memory_hole {
qcom,memblock-remove = <0x0a700000 0x5800000>; /* Address and size of the hole */
};
&qseecom {
status = "disabled";
};

22
kernel/arch/arm/boot/dts/m7350-un-v3/apq8074-v2-dragonboard.dts Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "apq8074-v2.dtsi"
/include/ "apq8074-dragonboard.dtsi"
/ {
model = "Qualcomm APQ 8074v2 DRAGONBOARD";
compatible = "qcom,apq8074-dragonboard", "qcom,apq8074", "qcom,dragonboard";
qcom,msm-id = <184 10 0x20000>;
};

34
kernel/arch/arm/boot/dts/m7350-un-v3/apq8074-v2-liquid.dts Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "apq8074-v2.dtsi"
/include/ "msm8974-liquid.dtsi"
/ {
model = "Qualcomm APQ 8074v2 LIQUID";
compatible = "qcom,apq8074-liquid", "qcom,apq8074", "qcom,liquid";
qcom,msm-id = <184 9 0x20000>;
};
&usb3 {
interrupt-parent = <&usb3>;
interrupts = <0 1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x0 0xffffffff>;
interrupt-map = <0x0 0 &intc 0 133 0
0x0 1 &spmi_bus 0x0 0x0 0x9 0x0>;
interrupt-names = "hs_phy_irq", "pmic_id_irq";
qcom,misc-ref = <&pm8941_misc>;
};

52
kernel/arch/arm/boot/dts/m7350-un-v3/apq8074-v2.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* As a general rule, only version-specific property overrides should be placed
* inside this file. However, device definitions should be placed inside the
* msm8974.dtsi file.
*/
/include/ "msm8974-v2.dtsi"
&soc {
qcom,qseecom@a700000 {
compatible = "qcom,qseecom";
reg = <0x0a700000 0x500000>;
reg-names = "secapp-region";
qcom,disk-encrypt-pipe-pair = <2>;
qcom,hlos-ce-hw-instance = <1>;
qcom,qsee-ce-hw-instance = <0>;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,active-only = <0>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<55 512 0 0>,
<55 512 3936000 393600>,
<55 512 3936000 393600>,
<55 512 3936000 393600>;
};
sound {
compatible = "qcom,apq8074-audio-taiko";
};
};
&memory_hole {
qcom,memblock-remove = <0x0a700000 0x5800000>; /* Address and size of the hole */
};
&qseecom {
status = "disabled";
};

31
kernel/arch/arm/boot/dts/m7350-un-v3/apq8084-ion.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,ion {
compatible = "qcom,msm-ion";
#address-cells = <1>;
#size-cells = <0>;
qcom,ion-heap@30 { /* SYSTEM HEAP */
reg = <30>;
};
qcom,ion-heap@21 { /* SYSTEM CONTIG HEAP */
reg = <21>;
};
qcom,ion-heap@25 { /* IOMMU HEAP */
reg = <25>;
};
};
};

377
kernel/arch/arm/boot/dts/m7350-un-v3/apq8084-regulator.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* QPNP controlled regulators: */
&spmi_bus {
qcom,pma8084@1 {
pma8084_s1: regulator@1400 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
/* PMA8084 S2 + S12 = 2 phase VDD_CX supply */
pma8084_s2: regulator@1700 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_s3: regulator@1a00 {
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_s4: regulator@1d00 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_s5: regulator@2000 {
regulator-min-microvolt = <2150000>;
regulator-max-microvolt = <2150000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
status = "okay";
};
/* PMA8084 S6 + S7 = 2 phase VDD_GFX supply */
pma8084_s6: regulator@2300 {
regulator-min-microvolt = <815000>;
regulator-max-microvolt = <900000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
status = "okay";
};
/* PMA8084 S8 + S9 + S10 + S11 = 4 phase VDD_APC supply */
pma8084_s8: regulator@2900 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1100000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
/* Output of PMA8084 L1 and L11 is tied together. */
pma8084_l1: regulator@4000 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <10000>;
status = "okay";
};
pma8084_l2: regulator@4100 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l3: regulator@4200 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l4: regulator@4300 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l6: regulator@4500 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l8: regulator@4700 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l9: regulator@4800 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l10: regulator@4900 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l12: regulator@4b00 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l13: regulator@4c00 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l14: regulator@4d00 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l15: regulator@4e00 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l16: regulator@4f00 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l17: regulator@5000 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l18: regulator@5100 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l19: regulator@5200 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l20: regulator@5300 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l21: regulator@5400 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l22: regulator@5500 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l23: regulator@5600 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l24: regulator@5700 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l25: regulator@5800 {
regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l26: regulator@5900 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l27: regulator@5a00 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs1: regulator@8000 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs2: regulator@8100 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs3: regulator@8200 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs4: regulator@8300 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_mvs1: regulator@8400 {
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
};
};
&rpm_bus {
rpm-regulator-smpb1 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpb";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
pma8084_s1_ao: regulator-s1-ao {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8084_s1_ao";
qcom,set = <1>;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <1050000>;
};
};
rpm-regulator-smpb2 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpb";
qcom,resource-id = <2>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
pma8084_s2_corner_ao: regulator-s2-corner-ao {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8084_s2_corner_ao";
qcom,set = <1>;
regulator-min-microvolt = <1>;
regulator-max-microvolt = <7>;
qcom,use-voltage-corner;
};
};
rpm-regulator-ldoa12 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <12>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
pma8084_l12_ao: regulator-l12-ao {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8084_l12_ao";
qcom,set = <1>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "apq8084.dtsi"
/ {
model = "Qualcomm APQ 8084 Simulator";
compatible = "qcom,apq8084-sim", "qcom,apq8084", "qcom,sim";
qcom,msm-id = <178 0 0>;
aliases {
serial0 = &uart0;
};
};
&soc {
uart0: serial@f991f000 {
status = "ok";
};
};
&sdcc1 {
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
status = "ok";
};
&sdcc2 {
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,vdd-io-lpm-sup;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <800>;
status = "ok";
};
&pma8084_gpios {
gpio@c000 { /* GPIO 1 */
};
gpio@c100 { /* GPIO 2 */
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
};
gpio@c500 { /* GPIO 6 */
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
};
gpio@c800 { /* GPIO 9 */
};
gpio@c900 { /* GPIO 10 */
};
gpio@ca00 { /* GPIO 11 */
};
gpio@cb00 { /* GPIO 12 */
};
gpio@cc00 { /* GPIO 13 */
};
gpio@cd00 { /* GPIO 14 */
};
gpio@ce00 { /* GPIO 15 */
};
gpio@cf00 { /* GPIO 16 */
};
gpio@d000 { /* GPIO 17 */
};
gpio@d100 { /* GPIO 18 */
};
gpio@d200 { /* GPIO 19 */
};
gpio@d300 { /* GPIO 20 */
};
gpio@d400 { /* GPIO 21 */
};
gpio@d500 { /* GPIO 22 */
};
};
&pma8084_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP 5 */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
};
};
&usb3 {
qcom,skip-charger-detection;
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,smp2p-adsp {
compatible = "qcom,smp2p";
reg = <0xf9011008 0x4>;
qcom,remote-pid = <2>;
qcom,irq-bitmask = <0x400>;
interrupts = <0 158 1>;
};
smp2pgpio_smp2p_7_in: qcom,smp2pgpio-smp2p-7-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <7>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_7_in {
compatible = "qcom,smp2pgpio_test_smp2p_7_in";
gpios = <&smp2pgpio_smp2p_7_in 0 0>;
};
smp2pgpio_smp2p_7_out: qcom,smp2pgpio-smp2p-7-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <7>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_7_out {
compatible = "qcom,smp2pgpio_test_smp2p_7_out";
gpios = <&smp2pgpio_smp2p_7_out 0 0>;
};
smp2pgpio_smp2p_2_in: qcom,smp2pgpio-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_2_in {
compatible = "qcom,smp2pgpio_test_smp2p_2_in";
gpios = <&smp2pgpio_smp2p_2_in 0 0>;
};
smp2pgpio_smp2p_2_out: qcom,smp2pgpio-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_2_out {
compatible = "qcom,smp2pgpio_test_smp2p_2_out";
gpios = <&smp2pgpio_smp2p_2_out 0 0>;
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton64.dtsi"
/ {
model = "Qualcomm APQ 8084";
compatible = "qcom,apq8084";
interrupt-parent = <&intc>;
soc: soc { };
};
/include/ "apq8084-ion.dtsi"
/include/ "apq8084-smp2p.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
intc: interrupt-controller@f9000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0xF9000000 0x1000>,
<0xF9002000 0x1000>;
};
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
ngpio = <146>;
interrupts = <0 208 0>;
qcom,direct-connect-irqs = <8>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0 1 3 0>;
clock-frequency = <19200000>;
};
serial@f991f000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf991f000 0x1000>;
interrupts = <0 109 0>;
status = "disabled";
};
qcom,cache_erp {
compatible = "qcom,cache_erp";
interrupts = <1 9 0>, <0 2 0>;
interrupt-names = "l1_irq", "l2_irq";
};
qcom,cache_dump {
compatible = "qcom,cache_dump";
qcom,l1-dump-size = <0x100000>;
qcom,l2-dump-size = <0x500000>;
qcom,memory-reservation-type = "EBI1";
qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
};
rpm_bus: qcom,rpm-smd {
compatible = "qcom,rpm-smd";
rpm-channel-name = "rpm_requests";
rpm-channel-type = <15>; /* SMD_APPS_RPM */
rpm-standalone;
};
qcom,msm-imem@fe805000 {
compatible = "qcom,msm-imem";
reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
};
qcom,msm-rtb {
compatible = "qcom,msm-rtb";
qcom,memory-reservation-type = "EBI1";
qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
};
sdcc1: qcom,sdcc@f9824000 {
cell-index = <1>; /* SDC1 eMMC slot */
compatible = "qcom,msm-sdcc";
reg = <0xf9824000 0x800>;
reg-names = "core_mem";
interrupts = <0 123 0>;
interrupt-names = "core_irq";
qcom,bus-width = <8>;
status = "disabled";
};
sdcc2: qcom,sdcc@f98a4000 {
cell-index = <2>; /* SDC2 SD card slot */
compatible = "qcom,msm-sdcc";
reg = <0xf98a4000 0x800>;
reg-names = "core_mem";
interrupts = <0 125 0>;
interrupt-names = "core_irq";
qcom,bus-width = <4>;
status = "disabled";
};
qcom,sps@f9980000 {
compatible = "qcom,msm_sps";
reg = <0xf9984000 0x15000>,
<0xf9999000 0xb000>;
interrupts = <0 94 0>;
qcom,pipe-attr-ee;
};
spmi_bus: qcom,spmi@fc4c0000 {
cell-index = <0>;
compatible = "qcom,spmi-pmic-arb";
reg-names = "core", "intr", "cnfg";
reg = <0xfc4cf000 0x1000>,
<0Xfc4cb000 0x1000>,
<0Xfc4ca000 0x1000>;
/* 190,ee0_krait_hlos_spmi_periph_irq */
/* 187,channel_0_krait_hlos_trans_done_irq */
interrupts = <0 190 0>, <0 187 0>;
qcom,not-wakeup;
qcom,pmic-arb-ee = <0>;
qcom,pmic-arb-channel = <0>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
};
i2c_0: i2c@f9925000 { /* BLSP1 QUP3 */
cell-index = <0>;
compatible = "qcom,i2c-qup";
#address-cells = <1>;
#size-cells = <0>;
reg-names = "qup_phys_addr";
reg = <0xf9925000 0x1000>;
interrupt-names = "qup_err_intr";
interrupts = <0 97 0>;
qcom,i2c-bus-freq = <100000>;
qcom,i2c-src-freq = <50000000>;
qcom,sda-gpio = <&msmgpio 10 0>;
qcom,scl-gpio = <&msmgpio 11 0>;
};
usb3: qcom,ssusb@f9200000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0xf9200000 0xfc000>,
<0xfd4ab000 0x4>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts = <0 133 0>;
interrupt-names = "hs_phy_irq";
ssusb_vdd_dig-supply = <&pma8084_s1>;
SSUSB_1p8-supply = <&pma8084_l6>;
hsusb_vdd_dig-supply = <&pma8084_s1>;
HSUSB_1p8-supply = <&pma8084_l6>;
HSUSB_3p3-supply = <&pma8084_l24>;
qcom,dwc-usb3-msm-dbm-eps = <4>;
qcom,vdd-voltage-level = <0 900000 1050000>;
dwc3@f9200000 {
compatible = "synopsys,dwc3";
reg = <0xf9200000 0xfc000>;
interrupt-parent = <&intc>;
interrupts = <0 131 0>, <0 179 0>;
interrupt-names = "irq", "otg_irq";
tx-fifo-resize;
};
};
android_usb {
compatible = "qcom,android-usb";
};
qcom,ocmem@fdd00000 {
compatible = "qcom,msm-ocmem";
reg = <0xfdd00000 0x2000>,
<0xfdd02000 0x2000>,
<0xfe039000 0x400>,
<0xfec00000 0x200000>;
reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
interrupts = <0 76 0 0 77 0>;
interrupt-names = "ocmem_irq", "dm_irq";
qcom,ocmem-num-regions = <0x4>;
qcom,ocmem-num-macros = <0x20>;
qcom,resource-type = <0x706d636f>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xfec00000 0x200000>;
partition@0 {
reg = <0x0 0x180000>;
qcom,ocmem-part-name = "graphics";
qcom,ocmem-part-min = <0x80000>;
};
partition@80000 {
reg = <0x180000 0x80000>;
qcom,ocmem-part-name = "lp_audio";
qcom,ocmem-part-min = <0x80000>;
};
partition@100000 {
reg = <0x180000 0x80000>;
qcom,ocmem-part-name = "video";
qcom,ocmem-part-min = <0x55000>;
};
};
memory_hole: qcom,msm-mem-hole {
compatible = "qcom,msm-mem-hole";
qcom,memblock-remove = <0x0dc00000 0x2000000>; /* Address and Size of Hole */
};
qcom,ipc-spinlock@fd484000 {
compatible = "qcom,ipc-spinlock-sfpb";
reg = <0xfd484000 0x400>;
qcom,num-locks = <8>;
};
qcom,smem@fa00000 {
compatible = "qcom,smem";
reg = <0xfa00000 0x200000>,
<0xf9011000 0x1000>,
<0xfc428000 0x4000>;
reg-names = "smem", "irq-reg-base", "aux-mem1";
qcom,smd-adsp {
compatible = "qcom,smd";
qcom,smd-edge = <1>;
qcom,smd-irq-offset = <0x8>;
qcom,smd-irq-bitmask = <0x100>;
qcom,pil-string = "adsp";
interrupts = <0 156 1>;
};
qcom,smsm-adsp {
compatible = "qcom,smsm";
qcom,smsm-edge = <1>;
qcom,smsm-irq-offset = <0x8>;
qcom,smsm-irq-bitmask = <0x200>;
interrupts = <0 157 1>;
};
qcom,smd-rpm {
compatible = "qcom,smd";
qcom,smd-edge = <15>;
qcom,smd-irq-offset = <0x8>;
qcom,smd-irq-bitmask = <0x1>;
interrupts = <0 168 1>;
qcom,irq-no-suspend;
};
};
};
/include/ "msm-pma8084.dtsi"
/include/ "apq8084-regulator.dtsi"

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/*
* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
model = "Atmel AT91SAM9G20 family SoC";
compatible = "atmel,at91sam9g20";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
serial5 = &usart4;
serial6 = &usart5;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
tcb0 = &tcb0;
tcb1 = &tcb1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
memory {
reg = <0x20000000 0x08000000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
};
ramc0: ramc@ffffea00 {
compatible = "atmel,at91sam9260-sdramc";
reg = <0xffffea00 0x200>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};
rstc@fffffd00 {
compatible = "atmel,at91sam9260-rstc";
reg = <0xfffffd00 0x10>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
interrupts = <17 4 18 4 19 4>;
};
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffdc000 0x100>;
interrupts = <26 4 27 4 28 4>;
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4>;
status = "disabled";
};
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
interrupts = <6 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
interrupts = <7 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart2: serial@fffb8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
interrupts = <8 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart3: serial@fffd0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd0000 0x200>;
interrupts = <23 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart4: serial@fffd4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd4000 0x200>;
interrupts = <24 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart5: serial@fffd8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd8000 0x200>;
interrupts = <25 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
macb0: ethernet@fffc4000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffc4000 0x100>;
interrupts = <21 4>;
status = "disabled";
};
usb1: gadget@fffa4000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 4>;
status = "disabled";
};
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000
0xffffe800 0x200
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioC 13 0
&pioC 14 0
0
>;
status = "disabled";
};
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 4>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 23 0 /* sda */
&pioA 24 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};

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/*
* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9x5.dtsi"
/include/ "at91sam9x5cm.dtsi"
/ {
model = "Atmel AT91SAM9G25-EK";
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};
ahb {
apb {
dbgu: serial@fffff200 {
status = "okay";
};
usart0: serial@f801c000 {
status = "okay";
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
};
usb0: ohci@00600000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 19 1
&pioD 20 1
>;
};
usb1: ehci@00700000 {
status = "okay";
};
};
};

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/*
* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
* applies to AT91SAM9G45, AT91SAM9M10,
* AT91SAM9G46, AT91SAM9M11 SoC
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
model = "Atmel AT91SAM9G45 family SoC";
compatible = "atmel,at91sam9g45";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
gpio3 = &pioD;
gpio4 = &pioE;
tcb0 = &tcb0;
tcb1 = &tcb1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
memory {
reg = <0x70000000 0x10000000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
};
ramc0: ramc@ffffe400 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe400 0x200
0xffffe600 0x200>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};
rstc@fffffd00 {
compatible = "atmel,at91sam9g45-rstc";
reg = <0xfffffd00 0x10>;
};
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4>;
};
shdwc@fffffd10 {
compatible = "atmel,at91sam9rl-shdwc";
reg = <0xfffffd10 0x10>;
};
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <18 4>;
};
tcb1: timer@fffd4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffd4000 0x100>;
interrupts = <18 4>;
};
dma: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <21 4>;
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <4 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <5 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
interrupts = <5 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 4>;
status = "disabled";
};
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x200>;
interrupts = <7 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart1: serial@fff90000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff90000 0x200>;
interrupts = <8 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart2: serial@fff94000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff94000 0x200>;
interrupts = <9 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart3: serial@fff98000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff98000 0x200>;
interrupts = <10 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
macb0: ethernet@fffbc000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
interrupts = <25 4>;
status = "disabled";
};
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000
0xffffe200 0x200
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioC 8 0
&pioC 14 0
0
>;
status = "disabled";
};
usb0: ohci@00700000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 4>;
status = "disabled";
};
usb1: ehci@00800000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 4>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 20 0 /* sda */
&pioA 21 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <5>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};

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/*
* at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
*
* Copyright (C) 2011 Atmel,
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g45.dtsi"
/ {
model = "Atmel AT91SAM9M10G45-EK";
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
chosen {
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
};
memory {
reg = <0x70000000 0x4000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
apb {
dbgu: serial@ffffee00 {
status = "okay";
};
usart1: serial@fff90000 {
status = "okay";
};
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
};
};
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
boot@0 {
label = "bootstrap/uboot/kernel";
reg = <0x0 0x400000>;
};
rootfs@400000 {
label = "rootfs";
reg = <0x400000 0x3C00000>;
};
data@4000000 {
label = "data";
reg = <0x4000000 0xC000000>;
};
};
usb0: ohci@00700000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 1 1
&pioD 3 1>;
};
usb1: ehci@00800000 {
status = "okay";
};
};
leds {
compatible = "gpio-leds";
d8 {
label = "d8";
gpios = <&pioD 30 0>;
linux,default-trigger = "heartbeat";
};
d6 {
label = "d6";
gpios = <&pioD 0 1>;
linux,default-trigger = "nand-disk";
};
d7 {
label = "d7";
gpios = <&pioD 31 1>;
linux,default-trigger = "mmc0";
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
left_click {
label = "left_click";
gpios = <&pioB 6 1>;
linux,code = <272>;
gpio-key,wakeup;
};
right_click {
label = "right_click";
gpios = <&pioB 7 1>;
linux,code = <273>;
gpio-key,wakeup;
};
left {
label = "Joystick Left";
gpios = <&pioB 14 1>;
linux,code = <105>;
};
right {
label = "Joystick Right";
gpios = <&pioB 15 1>;
linux,code = <106>;
};
up {
label = "Joystick Up";
gpios = <&pioB 16 1>;
linux,code = <103>;
};
down {
label = "Joystick Down";
gpios = <&pioB 17 1>;
linux,code = <108>;
};
enter {
label = "Joystick Press";
gpios = <&pioB 18 1>;
linux,code = <28>;
};
};
};

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/*
* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
* AT91SAM9X25, AT91SAM9X35 SoC
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
/ {
model = "Atmel AT91SAM9x5 family SoC";
compatible = "atmel,at91sam9x5";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
gpio3 = &pioD;
tcb0 = &tcb0;
tcb1 = &tcb1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
};
};
memory {
reg = <0x20000000 0x10000000>;
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
aic: interrupt-controller@fffff000 {
#interrupt-cells = <2>;
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
};
ramc0: ramc@ffffe800 {
compatible = "atmel,at91sam9g45-ddramc";
reg = <0xffffe800 0x200>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};
rstc@fffffe00 {
compatible = "atmel,at91sam9g45-rstc";
reg = <0xfffffe00 0x10>;
};
shdwc@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
};
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
interrupts = <1 4>;
};
tcb0: timer@f8008000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8008000 0x100>;
interrupts = <17 4>;
};
tcb1: timer@f800c000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf800c000 0x100>;
interrupts = <17 4>;
};
dma0: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <20 4>;
};
dma1: dma-controller@ffffee00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffee00 0x200>;
interrupts = <21 4>;
};
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <2 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
interrupts = <3 4>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4>;
status = "disabled";
};
usart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x200>;
interrupts = <5 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart1: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x200>;
interrupts = <6 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
usart2: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x200>;
interrupts = <7 4>;
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "disabled";
};
macb0: ethernet@f802c000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 4>;
status = "disabled";
};
macb1: ethernet@f8030000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf8030000 0x100>;
interrupts = <27 4>;
status = "disabled";
};
};
nand0: nand@40000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x40000000 0x10000000
>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
gpios = <&pioD 5 0
&pioD 4 0
0
>;
status = "disabled";
};
usb0: ohci@00600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
interrupts = <22 4>;
status = "disabled";
};
usb1: ehci@00700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <22 4>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 30 0 /* sda */
&pioA 31 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c@1 {
compatible = "i2c-gpio";
gpios = <&pioC 0 0 /* sda */
&pioC 1 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c@2 {
compatible = "i2c-gpio";
gpios = <&pioB 4 0 /* sda */
&pioB 5 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};

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/*
* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
*
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* Licensed under GPLv2 or later.
*/
/ {
memory {
reg = <0x20000000 0x8000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
};
ahb {
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
at91bootstrap@0 {
label = "at91bootstrap";
reg = <0x0 0x40000>;
};
uboot@40000 {
label = "u-boot";
reg = <0x40000 0x80000>;
};
ubootenv@c0000 {
label = "U-Boot Env";
reg = <0xc0000 0x140000>;
};
kernel@200000 {
label = "kernel";
reg = <0x200000 0x600000>;
};
rootfs@800000 {
label = "rootfs";
reg = <0x800000 0x1f800000>;
};
};
};
leds {
compatible = "gpio-leds";
pb18 {
label = "pb18";
gpios = <&pioB 18 1>;
linux,default-trigger = "heartbeat";
};
pd21 {
label = "pd21";
gpios = <&pioD 21 0>;
};
};
};

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/*
* Copyright 2012 Linaro Ltd
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/include/ "skeleton.dtsi"
/ {
soc-u9500 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "stericsson,db8500";
interrupt-parent = <&intc>;
ranges;
intc: interrupt-controller@a0411000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
reg = <0xa0411000 0x1000>,
<0xa0410100 0x100>;
};
L2: l2-cache {
compatible = "arm,pl310-cache";
reg = <0xa0412000 0x1000>;
interrupts = <0 13 4>;
cache-unified;
cache-level = <2>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 7 0x4>;
};
timer@a0410600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xa0410600 0x20>;
interrupts = <1 13 0x304>;
};
rtc@80154000 {
compatible = "stericsson,db8500-rtc";
reg = <0x80154000 0x1000>;
interrupts = <0 18 0x4>;
};
gpio0: gpio@8012e000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8012e000 0x80>;
interrupts = <0 119 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio1: gpio@8012e080 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8012e080 0x80>;
interrupts = <0 120 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio2: gpio@8000e000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e000 0x80>;
interrupts = <0 121 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio3: gpio@8000e080 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e080 0x80>;
interrupts = <0 122 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio4: gpio@8000e100 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e100 0x80>;
interrupts = <0 123 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio5: gpio@8000e180 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8000e180 0x80>;
interrupts = <0 124 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio6: gpio@8011e000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8011e000 0x80>;
interrupts = <0 125 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio7: gpio@8011e080 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0x8011e080 0x80>;
interrupts = <0 126 0x4>;
supports-sleepmode;
gpio-controller;
};
gpio8: gpio@a03fe000 {
compatible = "stericsson,db8500-gpio",
"stmicroelectronics,nomadik-gpio";
reg = <0xa03fe000 0x80>;
interrupts = <0 127 0x4>;
supports-sleepmode;
gpio-controller;
};
usb@a03e0000 {
compatible = "stericsson,db8500-musb",
"mentor,musb";
reg = <0xa03e0000 0x10000>;
interrupts = <0 23 0x4>;
};
dma-controller@801C0000 {
compatible = "stericsson,db8500-dma40",
"stericsson,dma40";
reg = <0x801C0000 0x1000 0x40010000 0x800>;
interrupts = <0 25 0x4>;
};
prcmu@80157000 {
compatible = "stericsson,db8500-prcmu";
reg = <0x80157000 0x1000>;
interrupts = <46 47>;
#address-cells = <1>;
#size-cells = <0>;
ab8500@5 {
compatible = "stericsson,ab8500";
reg = <5>; /* mailbox 5 is i2c */
interrupts = <0 40 0x4>;
};
};
i2c@80004000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80004000 0x1000>;
interrupts = <0 21 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@80122000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80122000 0x1000>;
interrupts = <0 22 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@80128000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80128000 0x1000>;
interrupts = <0 55 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@80110000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x80110000 0x1000>;
interrupts = <0 12 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@8012a000 {
compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
reg = <0x8012a000 0x1000>;
interrupts = <0 51 0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
ssp@80002000 {
compatible = "arm,pl022", "arm,primecell";
reg = <80002000 0x1000>;
interrupts = <0 14 0x4>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
// Add one of these for each child device
cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
};
uart@80120000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80120000 0x1000>;
interrupts = <0 11 0x4>;
status = "disabled";
};
uart@80121000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80121000 0x1000>;
interrupts = <0 19 0x4>;
status = "disabled";
};
uart@80007000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80007000 0x1000>;
interrupts = <0 26 0x4>;
status = "disabled";
};
sdi@80126000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80126000 0x1000>;
interrupts = <0 60 0x4>;
status = "disabled";
};
sdi@80118000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80118000 0x1000>;
interrupts = <0 50 0x4>;
status = "disabled";
};
sdi@80005000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80005000 0x1000>;
interrupts = <0 41 0x4>;
status = "disabled";
};
sdi@80119000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80119000 0x1000>;
interrupts = <0 59 0x4>;
status = "disabled";
};
sdi@80114000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80114000 0x1000>;
interrupts = <0 99 0x4>;
status = "disabled";
};
sdi@80008000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x80114000 0x1000>;
interrupts = <0 100 0x4>;
status = "disabled";
};
};
};

530
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-panel-nt35590-720p-cmd.dtsi Normal file
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@ -0,0 +1,530 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/ {
qcom,mdss_dsi_nt35590_720p_cmd {
compatible = "qcom,mdss-dsi-panel";
label = "nt35590 720p command mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,rst-gpio = <&msmgpio 25 0>;
qcom,te-gpio = <&msmgpio 24 0>;
qcom,mdss-pan-res = <720 1280>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <164 8 140 1 1 6>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
qcom,mdss-pan-bl-levels = <1 4095>;
qcom,mdss-pan-dsi-mode = <1>;
qcom,mdss-vsync-enable = <1>;
qcom,mdss-hw-vsync-mode = <1>;
qcom,mdss-pan-dsi-h-pulse-mode = <1>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <2>;
qcom,mdss-pan-dsi-dst-format = <8>;
qcom,mdss-pan-insert-dcs-cmd = <1>;
qcom,mdss-pan-wr-mem-continue = <0x3c>;
qcom,mdss-pan-wr-mem-start = <0x2c>;
qcom,mdss-pan-te-sel = <1>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 1 1>; /* 4 lanes */
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x2c 0x20>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x0>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-phy-regulatorSettings = [07 09 03 00 /* Regualotor settings */
20 00 01];
qcom,panel-phy-timingSettings = [7d 25 1d 00 37 33
22 27 1e 03 04 00];
qcom,panel-phy-strengthCtrl = [ff 06];
qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
00 00];
qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 /* lane0 config */
00 00 00 00 05 00 00 01 97 /* lane1 config */
00 00 00 00 0a 00 00 01 97 /* lane2 config */
00 00 00 00 0f 00 00 01 97 /* lane3 config */
00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
qcom,panel-on-cmds = [29 01 00 00 00 02 FF EE
29 01 00 00 00 02 26 08
29 01 00 00 00 02 26 00
29 01 00 00 10 02 FF 00
29 01 00 00 00 02 BA 03
29 01 00 00 00 02 C2 08
29 01 00 00 00 02 FF 01
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 00 4A
29 01 00 00 00 02 01 33
29 01 00 00 00 02 02 53
29 01 00 00 00 02 03 55
29 01 00 00 00 02 04 55
29 01 00 00 00 02 05 33
29 01 00 00 00 02 06 22
29 01 00 00 00 02 08 56
29 01 00 00 00 02 09 8F
29 01 00 00 00 02 36 73
29 01 00 00 00 02 0B 9F
29 01 00 00 00 02 0C 9F
29 01 00 00 00 02 0D 2F
29 01 00 00 00 02 0E 24
29 01 00 00 00 02 11 83
29 01 00 00 00 02 12 03
29 01 00 00 00 02 71 2C
29 01 00 00 00 02 6F 03
29 01 00 00 00 02 0F 0A
29 01 00 00 00 02 FF 05
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 01 00
29 01 00 00 00 02 02 8B
29 01 00 00 00 02 03 82
29 01 00 00 00 02 04 82
29 01 00 00 00 02 05 30
29 01 00 00 00 02 06 33
29 01 00 00 00 02 07 01
29 01 00 00 00 02 08 00
29 01 00 00 00 02 09 46
29 01 00 00 00 02 0A 46
29 01 00 00 00 02 0D 0B
29 01 00 00 00 02 0E 1D
29 01 00 00 00 02 0F 08
29 01 00 00 00 02 10 53
29 01 00 00 00 02 11 00
29 01 00 00 00 02 12 00
29 01 00 00 00 02 14 01
29 01 00 00 00 02 15 00
29 01 00 00 00 02 16 05
29 01 00 00 00 02 17 00
29 01 00 00 00 02 19 7F
29 01 00 00 00 02 1A FF
29 01 00 00 00 02 1B 0F
29 01 00 00 00 02 1C 00
29 01 00 00 00 02 1D 00
29 01 00 00 00 02 1E 00
29 01 00 00 00 02 1F 07
29 01 00 00 00 02 20 00
29 01 00 00 00 02 21 06
29 01 00 00 00 02 22 55
29 01 00 00 00 02 23 4D
29 01 00 00 00 02 2D 02
29 01 00 00 00 02 28 01
29 01 00 00 00 02 2F 02
29 01 00 00 00 02 83 01
29 01 00 00 00 02 9E 58
29 01 00 00 00 02 9F 6A
29 01 00 00 00 02 A0 01
29 01 00 00 00 02 A2 10
29 01 00 00 00 02 BB 0A
29 01 00 00 00 02 BC 0A
29 01 00 00 00 02 32 08
29 01 00 00 00 02 33 B8
29 01 00 00 00 02 36 01
29 01 00 00 00 02 37 00
29 01 00 00 00 02 43 00
29 01 00 00 00 02 4B 21
29 01 00 00 00 02 4C 03
29 01 00 00 00 02 50 21
29 01 00 00 00 02 51 03
29 01 00 00 00 02 58 21
29 01 00 00 00 02 59 03
29 01 00 00 00 02 5D 21
29 01 00 00 00 02 5E 03
29 01 00 00 00 02 6C 00
29 01 00 00 00 02 6D 00
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 FF 01
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 75 00
29 01 00 00 00 02 76 7D
29 01 00 00 00 02 77 00
29 01 00 00 00 02 78 8A
29 01 00 00 00 02 79 00
29 01 00 00 00 02 7A 9C
29 01 00 00 00 02 7B 00
29 01 00 00 00 02 7C B1
29 01 00 00 00 02 7D 00
29 01 00 00 00 02 7E BF
29 01 00 00 00 02 7F 00
29 01 00 00 00 02 80 CF
29 01 00 00 00 02 81 00
29 01 00 00 00 02 82 DD
29 01 00 00 00 02 83 00
29 01 00 00 00 02 84 E8
29 01 00 00 00 02 85 00
29 01 00 00 00 02 86 F2
29 01 00 00 00 02 87 01
29 01 00 00 00 02 88 1F
29 01 00 00 00 02 89 01
29 01 00 00 00 02 8A 41
29 01 00 00 00 02 8B 01
29 01 00 00 00 02 8C 78
29 01 00 00 00 02 8D 01
29 01 00 00 00 02 8E A5
29 01 00 00 00 02 8F 01
29 01 00 00 00 02 90 EE
29 01 00 00 00 02 91 02
29 01 00 00 00 02 92 29
29 01 00 00 00 02 93 02
29 01 00 00 00 02 94 2A
29 01 00 00 00 02 95 02
29 01 00 00 00 02 96 5D
29 01 00 00 00 02 97 02
29 01 00 00 00 02 98 93
29 01 00 00 00 02 99 02
29 01 00 00 00 02 9A B8
29 01 00 00 00 02 9B 02
29 01 00 00 00 02 9C E7
29 01 00 00 00 02 9D 03
29 01 00 00 00 02 9E 07
29 01 00 00 00 02 9F 03
29 01 00 00 00 02 A0 37
29 01 00 00 00 02 A2 03
29 01 00 00 00 02 A3 46
29 01 00 00 00 02 A4 03
29 01 00 00 00 02 A5 56
29 01 00 00 00 02 A6 03
29 01 00 00 00 02 A7 66
29 01 00 00 00 02 A9 03
29 01 00 00 00 02 AA 7A
29 01 00 00 00 02 AB 03
29 01 00 00 00 02 AC 93
29 01 00 00 00 02 AD 03
29 01 00 00 00 02 AE A3
29 01 00 00 00 02 AF 03
29 01 00 00 00 02 B0 B4
29 01 00 00 00 02 B1 03
29 01 00 00 00 02 B2 CB
29 01 00 00 00 02 B3 00
29 01 00 00 00 02 B4 7D
29 01 00 00 00 02 B5 00
29 01 00 00 00 02 B6 8A
29 01 00 00 00 02 B7 00
29 01 00 00 00 02 B8 9C
29 01 00 00 00 02 B9 00
29 01 00 00 00 02 BA B1
29 01 00 00 00 02 BB 00
29 01 00 00 00 02 BC BF
29 01 00 00 00 02 BD 00
29 01 00 00 00 02 BE CF
29 01 00 00 00 02 BF 00
29 01 00 00 00 02 C0 DD
29 01 00 00 00 02 C1 00
29 01 00 00 00 02 C2 E8
29 01 00 00 00 02 C3 00
29 01 00 00 00 02 C4 F2
29 01 00 00 00 02 C5 01
29 01 00 00 00 02 C6 1F
29 01 00 00 00 02 C7 01
29 01 00 00 00 02 C8 41
29 01 00 00 00 02 C9 01
29 01 00 00 00 02 CA 78
29 01 00 00 00 02 CB 01
29 01 00 00 00 02 CC A5
29 01 00 00 00 02 CD 01
29 01 00 00 00 02 CE EE
29 01 00 00 00 02 CF 02
29 01 00 00 00 02 D0 29
29 01 00 00 00 02 D1 02
29 01 00 00 00 02 D2 2A
29 01 00 00 00 02 D3 02
29 01 00 00 00 02 D4 5D
29 01 00 00 00 02 D5 02
29 01 00 00 00 02 D6 93
29 01 00 00 00 02 D7 02
29 01 00 00 00 02 D8 B8
29 01 00 00 00 02 D9 02
29 01 00 00 00 02 DA E7
29 01 00 00 00 02 DB 03
29 01 00 00 00 02 DC 07
29 01 00 00 00 02 DD 03
29 01 00 00 00 02 DE 37
29 01 00 00 00 02 DF 03
29 01 00 00 00 02 E0 46
29 01 00 00 00 02 E1 03
29 01 00 00 00 02 E2 56
29 01 00 00 00 02 E3 03
29 01 00 00 00 02 E4 66
29 01 00 00 00 02 E5 03
29 01 00 00 00 02 E6 7A
29 01 00 00 00 02 E7 03
29 01 00 00 00 02 E8 93
29 01 00 00 00 02 E9 03
29 01 00 00 00 02 EA A3
29 01 00 00 00 02 EB 03
29 01 00 00 00 02 EC B4
29 01 00 00 00 02 ED 03
29 01 00 00 00 02 EE CB
29 01 00 00 00 02 EF 00
29 01 00 00 00 02 F0 ED
29 01 00 00 00 02 F1 00
29 01 00 00 00 02 F2 F3
29 01 00 00 00 02 F3 00
29 01 00 00 00 02 F4 FE
29 01 00 00 00 02 F5 01
29 01 00 00 00 02 F6 09
29 01 00 00 00 02 F7 01
29 01 00 00 00 02 F8 13
29 01 00 00 00 02 F9 01
29 01 00 00 00 02 FA 1D
29 01 00 00 00 02 FF 02
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 00 01
29 01 00 00 00 02 01 26
29 01 00 00 00 02 02 01
29 01 00 00 00 02 03 2F
29 01 00 00 00 02 04 01
29 01 00 00 00 02 05 37
29 01 00 00 00 02 06 01
29 01 00 00 00 02 07 56
29 01 00 00 00 02 08 01
29 01 00 00 00 02 09 70
29 01 00 00 00 02 0A 01
29 01 00 00 00 02 0B 9D
29 01 00 00 00 02 0C 01
29 01 00 00 00 02 0D C2
29 01 00 00 00 02 0E 01
29 01 00 00 00 02 0F FF
29 01 00 00 00 02 10 02
29 01 00 00 00 02 11 31
29 01 00 00 00 02 12 02
29 01 00 00 00 02 13 32
29 01 00 00 00 02 14 02
29 01 00 00 00 02 15 60
29 01 00 00 00 02 16 02
29 01 00 00 00 02 17 94
29 01 00 00 00 02 18 02
29 01 00 00 00 02 19 B5
29 01 00 00 00 02 1A 02
29 01 00 00 00 02 1B E3
29 01 00 00 00 02 1C 03
29 01 00 00 00 02 1D 03
29 01 00 00 00 02 1E 03
29 01 00 00 00 02 1F 2D
29 01 00 00 00 02 20 03
29 01 00 00 00 02 21 3A
29 01 00 00 00 02 22 03
29 01 00 00 00 02 23 48
29 01 00 00 00 02 24 03
29 01 00 00 00 02 25 57
29 01 00 00 00 02 26 03
29 01 00 00 00 02 27 68
29 01 00 00 00 02 28 03
29 01 00 00 00 02 29 7B
29 01 00 00 00 02 2A 03
29 01 00 00 00 02 2B 90
29 01 00 00 00 02 2D 03
29 01 00 00 00 02 2F A0
29 01 00 00 00 02 30 03
29 01 00 00 00 02 31 CB
29 01 00 00 00 02 32 00
29 01 00 00 00 02 33 ED
29 01 00 00 00 02 34 00
29 01 00 00 00 02 35 F3
29 01 00 00 00 02 36 00
29 01 00 00 00 02 37 FE
29 01 00 00 00 02 38 01
29 01 00 00 00 02 39 09
29 01 00 00 00 02 3A 01
29 01 00 00 00 02 3B 13
29 01 00 00 00 02 3D 01
29 01 00 00 00 02 3F 1D
29 01 00 00 00 02 40 01
29 01 00 00 00 02 41 26
29 01 00 00 00 02 42 01
29 01 00 00 00 02 43 2F
29 01 00 00 00 02 44 01
29 01 00 00 00 02 45 37
29 01 00 00 00 02 46 01
29 01 00 00 00 02 47 56
29 01 00 00 00 02 48 01
29 01 00 00 00 02 49 70
29 01 00 00 00 02 4A 01
29 01 00 00 00 02 4B 9D
29 01 00 00 00 02 4C 01
29 01 00 00 00 02 4D C2
29 01 00 00 00 02 4E 01
29 01 00 00 00 02 4F FF
29 01 00 00 00 02 50 02
29 01 00 00 00 02 51 31
29 01 00 00 00 02 52 02
29 01 00 00 00 02 53 32
29 01 00 00 00 02 54 02
29 01 00 00 00 02 55 60
29 01 00 00 00 02 56 02
29 01 00 00 00 02 58 94
29 01 00 00 00 02 59 02
29 01 00 00 00 02 5A B5
29 01 00 00 00 02 5B 02
29 01 00 00 00 02 5C E3
29 01 00 00 00 02 5D 03
29 01 00 00 00 02 5E 03
29 01 00 00 00 02 5F 03
29 01 00 00 00 02 60 2D
29 01 00 00 00 02 61 03
29 01 00 00 00 02 62 3A
29 01 00 00 00 02 63 03
29 01 00 00 00 02 64 48
29 01 00 00 00 02 65 03
29 01 00 00 00 02 66 57
29 01 00 00 00 02 67 03
29 01 00 00 00 02 68 68
29 01 00 00 00 02 69 03
29 01 00 00 00 02 6A 7B
29 01 00 00 00 02 6B 03
29 01 00 00 00 02 6C 90
29 01 00 00 00 02 6D 03
29 01 00 00 00 02 6E A0
29 01 00 00 00 02 6F 03
29 01 00 00 00 02 70 CB
29 01 00 00 00 02 71 00
29 01 00 00 00 02 72 19
29 01 00 00 00 02 73 00
29 01 00 00 00 02 74 36
29 01 00 00 00 02 75 00
29 01 00 00 00 02 76 55
29 01 00 00 00 02 77 00
29 01 00 00 00 02 78 70
29 01 00 00 00 02 79 00
29 01 00 00 00 02 7A 83
29 01 00 00 00 02 7B 00
29 01 00 00 00 02 7C 99
29 01 00 00 00 02 7D 00
29 01 00 00 00 02 7E A8
29 01 00 00 00 02 7F 00
29 01 00 00 00 02 80 B7
29 01 00 00 00 02 81 00
29 01 00 00 00 02 82 C5
29 01 00 00 00 02 83 00
29 01 00 00 00 02 84 F7
29 01 00 00 00 02 85 01
29 01 00 00 00 02 86 1E
29 01 00 00 00 02 87 01
29 01 00 00 00 02 88 60
29 01 00 00 00 02 89 01
29 01 00 00 00 02 8A 95
29 01 00 00 00 02 8B 01
29 01 00 00 00 02 8C E1
29 01 00 00 00 02 8D 02
29 01 00 00 00 02 8E 20
29 01 00 00 00 02 8F 02
29 01 00 00 00 02 90 23
29 01 00 00 00 02 91 02
29 01 00 00 00 02 92 59
29 01 00 00 00 02 93 02
29 01 00 00 00 02 94 94
29 01 00 00 00 02 95 02
29 01 00 00 00 02 96 B4
29 01 00 00 00 02 97 02
29 01 00 00 00 02 98 E1
29 01 00 00 00 02 99 03
29 01 00 00 00 02 9A 01
29 01 00 00 00 02 9B 03
29 01 00 00 00 02 9C 28
29 01 00 00 00 02 9D 03
29 01 00 00 00 02 9E 30
29 01 00 00 00 02 9F 03
29 01 00 00 00 02 A0 37
29 01 00 00 00 02 A2 03
29 01 00 00 00 02 A3 3B
29 01 00 00 00 02 A4 03
29 01 00 00 00 02 A5 40
29 01 00 00 00 02 A6 03
29 01 00 00 00 02 A7 50
29 01 00 00 00 02 A9 03
29 01 00 00 00 02 AA 6D
29 01 00 00 00 02 AB 03
29 01 00 00 00 02 AC 80
29 01 00 00 00 02 AD 03
29 01 00 00 00 02 AE CB
29 01 00 00 00 02 AF 00
29 01 00 00 00 02 B0 19
29 01 00 00 00 02 B1 00
29 01 00 00 00 02 B2 36
29 01 00 00 00 02 B3 00
29 01 00 00 00 02 B4 55
29 01 00 00 00 02 B5 00
29 01 00 00 00 02 B6 70
29 01 00 00 00 02 B7 00
29 01 00 00 00 02 B8 83
29 01 00 00 00 02 B9 00
29 01 00 00 00 02 BA 99
29 01 00 00 00 02 BB 00
29 01 00 00 00 02 BC A8
29 01 00 00 00 02 BD 00
29 01 00 00 00 02 BE B7
29 01 00 00 00 02 BF 00
29 01 00 00 00 02 C0 C5
29 01 00 00 00 02 C1 00
29 01 00 00 00 02 C2 F7
29 01 00 00 00 02 C3 01
29 01 00 00 00 02 C4 1E
29 01 00 00 00 02 C5 01
29 01 00 00 00 02 C6 60
29 01 00 00 00 02 C7 01
29 01 00 00 00 02 C8 95
29 01 00 00 00 02 C9 01
29 01 00 00 00 02 CA E1
29 01 00 00 00 02 CB 02
29 01 00 00 00 02 CC 20
29 01 00 00 00 02 CD 02
29 01 00 00 00 02 CE 23
29 01 00 00 00 02 CF 02
29 01 00 00 00 02 D0 59
29 01 00 00 00 02 D1 02
29 01 00 00 00 02 D2 94
29 01 00 00 00 02 D3 02
29 01 00 00 00 02 D4 B4
29 01 00 00 00 02 D5 02
29 01 00 00 00 02 D6 E1
29 01 00 00 00 02 D7 03
29 01 00 00 00 02 D8 01
29 01 00 00 00 02 D9 03
29 01 00 00 00 02 DA 28
29 01 00 00 00 02 DB 03
29 01 00 00 00 02 DC 30
29 01 00 00 00 02 DD 03
29 01 00 00 00 02 DE 37
29 01 00 00 00 02 DF 03
29 01 00 00 00 02 E0 3B
29 01 00 00 00 02 E1 03
29 01 00 00 00 02 E2 40
29 01 00 00 00 02 E3 03
29 01 00 00 00 02 E4 50
29 01 00 00 00 02 E5 03
29 01 00 00 00 02 E6 6D
29 01 00 00 00 02 E7 03
29 01 00 00 00 02 E8 80
29 01 00 00 00 02 E9 03
29 01 00 00 00 02 EA CB
29 01 00 00 00 02 FF 01
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 FF 02
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 FF 04
29 01 00 00 00 02 FB 01
29 01 00 00 00 02 FF 00
29 01 00 00 64 02 11 00
29 01 00 00 00 02 FF EE
29 01 00 00 00 02 12 50
29 01 00 00 00 02 13 02
29 01 00 00 00 02 6A 60
29 01 00 00 00 02 FF 00
29 01 00 00 78 02 29 00];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
05 01 00 00 78 02 10 00];
qcom,off-cmds-dsi-state = "DSI_HS_MODE";
};
};

524
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-panel-nt35590-720p-video.dtsi Normal file
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@ -0,0 +1,524 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,mdss_dsi_nt35590_720p_video {
compatible = "qcom,mdss-dsi-panel";
label = "nt35590 720p video mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,rst-gpio = <&msmgpio 25 0>;
qcom,mdss-pan-res = <720 1280>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <164 8 140 1 1 6>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
qcom,mdss-pan-bl-levels = <1 4095>;
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <1>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <2>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 1 1>; /* 4 lanes */
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x2c 0x20>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x0>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-phy-regulatorSettings = [07 09 03 00 /* Regualotor settings */
20 00 01];
qcom,panel-phy-timingSettings = [7d 25 1d 00 37 33
22 27 1e 03 04 00];
qcom,panel-phy-strengthCtrl = [ff 06];
qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
00 00];
qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 /* lane0 config */
00 00 00 00 05 00 00 01 97 /* lane1 config */
00 00 00 00 0a 00 00 01 97 /* lane2 config */
00 00 00 00 0f 00 00 01 97 /* lane3 config */
00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
qcom,panel-on-cmds = [29 01 00 00 00 00 02 FF EE
29 01 00 00 00 00 02 26 08
29 01 00 00 00 00 02 26 00
29 01 00 00 10 00 02 FF 00
29 01 00 00 00 00 02 BA 03
29 01 00 00 00 00 02 C2 03
29 01 00 00 00 00 02 FF 01
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 00 4A
29 01 00 00 00 00 02 01 33
29 01 00 00 00 00 02 02 53
29 01 00 00 00 00 02 03 55
29 01 00 00 00 00 02 04 55
29 01 00 00 00 00 02 05 33
29 01 00 00 00 00 02 06 22
29 01 00 00 00 00 02 08 56
29 01 00 00 00 00 02 09 8F
29 01 00 00 00 00 02 36 73
29 01 00 00 00 00 02 0B 9F
29 01 00 00 00 00 02 0C 9F
29 01 00 00 00 00 02 0D 2F
29 01 00 00 00 00 02 0E 24
29 01 00 00 00 00 02 11 83
29 01 00 00 00 00 02 12 03
29 01 00 00 00 00 02 71 2C
29 01 00 00 00 00 02 6F 03
29 01 00 00 00 00 02 0F 0A
29 01 00 00 00 00 02 FF 05
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 01 00
29 01 00 00 00 00 02 02 8B
29 01 00 00 00 00 02 03 82
29 01 00 00 00 00 02 04 82
29 01 00 00 00 00 02 05 30
29 01 00 00 00 00 02 06 33
29 01 00 00 00 00 02 07 01
29 01 00 00 00 00 02 08 00
29 01 00 00 00 00 02 09 46
29 01 00 00 00 00 02 0A 46
29 01 00 00 00 00 02 0D 0B
29 01 00 00 00 00 02 0E 1D
29 01 00 00 00 00 02 0F 08
29 01 00 00 00 00 02 10 53
29 01 00 00 00 00 02 11 00
29 01 00 00 00 00 02 12 00
29 01 00 00 00 00 02 14 01
29 01 00 00 00 00 02 15 00
29 01 00 00 00 00 02 16 05
29 01 00 00 00 00 02 17 00
29 01 00 00 00 00 02 19 7F
29 01 00 00 00 00 02 1A FF
29 01 00 00 00 00 02 1B 0F
29 01 00 00 00 00 02 1C 00
29 01 00 00 00 00 02 1D 00
29 01 00 00 00 00 02 1E 00
29 01 00 00 00 00 02 1F 07
29 01 00 00 00 00 02 20 00
29 01 00 00 00 00 02 21 06
29 01 00 00 00 00 02 22 55
29 01 00 00 00 00 02 23 4D
29 01 00 00 00 00 02 2D 02
29 01 00 00 00 00 02 28 01
29 01 00 00 00 00 02 2F 02
29 01 00 00 00 00 02 83 01
29 01 00 00 00 00 02 9E 58
29 01 00 00 00 00 02 9F 6A
29 01 00 00 00 00 02 A0 01
29 01 00 00 00 00 02 A2 10
29 01 00 00 00 00 02 BB 0A
29 01 00 00 00 00 02 BC 0A
29 01 00 00 00 00 02 32 08
29 01 00 00 00 00 02 33 B8
29 01 00 00 00 00 02 36 01
29 01 00 00 00 00 02 37 00
29 01 00 00 00 00 02 43 00
29 01 00 00 00 00 02 4B 21
29 01 00 00 00 00 02 4C 03
29 01 00 00 00 00 02 50 21
29 01 00 00 00 00 02 51 03
29 01 00 00 00 00 02 58 21
29 01 00 00 00 00 02 59 03
29 01 00 00 00 00 02 5D 21
29 01 00 00 00 00 02 5E 03
29 01 00 00 00 00 02 6C 00
29 01 00 00 00 00 02 6D 00
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 FF 01
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 75 00
29 01 00 00 00 00 02 76 7D
29 01 00 00 00 00 02 77 00
29 01 00 00 00 00 02 78 8A
29 01 00 00 00 00 02 79 00
29 01 00 00 00 00 02 7A 9C
29 01 00 00 00 00 02 7B 00
29 01 00 00 00 00 02 7C B1
29 01 00 00 00 00 02 7D 00
29 01 00 00 00 00 02 7E BF
29 01 00 00 00 00 02 7F 00
29 01 00 00 00 00 02 80 CF
29 01 00 00 00 00 02 81 00
29 01 00 00 00 00 02 82 DD
29 01 00 00 00 00 02 83 00
29 01 00 00 00 00 02 84 E8
29 01 00 00 00 00 02 85 00
29 01 00 00 00 00 02 86 F2
29 01 00 00 00 00 02 87 01
29 01 00 00 00 00 02 88 1F
29 01 00 00 00 00 02 89 01
29 01 00 00 00 00 02 8A 41
29 01 00 00 00 00 02 8B 01
29 01 00 00 00 00 02 8C 78
29 01 00 00 00 00 02 8D 01
29 01 00 00 00 00 02 8E A5
29 01 00 00 00 00 02 8F 01
29 01 00 00 00 00 02 90 EE
29 01 00 00 00 00 02 91 02
29 01 00 00 00 00 02 92 29
29 01 00 00 00 00 02 93 02
29 01 00 00 00 00 02 94 2A
29 01 00 00 00 00 02 95 02
29 01 00 00 00 00 02 96 5D
29 01 00 00 00 00 02 97 02
29 01 00 00 00 00 02 98 93
29 01 00 00 00 00 02 99 02
29 01 00 00 00 00 02 9A B8
29 01 00 00 00 00 02 9B 02
29 01 00 00 00 00 02 9C E7
29 01 00 00 00 00 02 9D 03
29 01 00 00 00 00 02 9E 07
29 01 00 00 00 00 02 9F 03
29 01 00 00 00 00 02 A0 37
29 01 00 00 00 00 02 A2 03
29 01 00 00 00 00 02 A3 46
29 01 00 00 00 00 02 A4 03
29 01 00 00 00 00 02 A5 56
29 01 00 00 00 00 02 A6 03
29 01 00 00 00 00 02 A7 66
29 01 00 00 00 00 02 A9 03
29 01 00 00 00 00 02 AA 7A
29 01 00 00 00 00 02 AB 03
29 01 00 00 00 00 02 AC 93
29 01 00 00 00 00 02 AD 03
29 01 00 00 00 00 02 AE A3
29 01 00 00 00 00 02 AF 03
29 01 00 00 00 00 02 B0 B4
29 01 00 00 00 00 02 B1 03
29 01 00 00 00 00 02 B2 CB
29 01 00 00 00 00 02 B3 00
29 01 00 00 00 00 02 B4 7D
29 01 00 00 00 00 02 B5 00
29 01 00 00 00 00 02 B6 8A
29 01 00 00 00 00 02 B7 00
29 01 00 00 00 00 02 B8 9C
29 01 00 00 00 00 02 B9 00
29 01 00 00 00 00 02 BA B1
29 01 00 00 00 00 02 BB 00
29 01 00 00 00 00 02 BC BF
29 01 00 00 00 00 02 BD 00
29 01 00 00 00 00 02 BE CF
29 01 00 00 00 00 02 BF 00
29 01 00 00 00 00 02 C0 DD
29 01 00 00 00 00 02 C1 00
29 01 00 00 00 00 02 C2 E8
29 01 00 00 00 00 02 C3 00
29 01 00 00 00 00 02 C4 F2
29 01 00 00 00 00 02 C5 01
29 01 00 00 00 00 02 C6 1F
29 01 00 00 00 00 02 C7 01
29 01 00 00 00 00 02 C8 41
29 01 00 00 00 00 02 C9 01
29 01 00 00 00 00 02 CA 78
29 01 00 00 00 00 02 CB 01
29 01 00 00 00 00 02 CC A5
29 01 00 00 00 00 02 CD 01
29 01 00 00 00 00 02 CE EE
29 01 00 00 00 00 02 CF 02
29 01 00 00 00 00 02 D0 29
29 01 00 00 00 00 02 D1 02
29 01 00 00 00 00 02 D2 2A
29 01 00 00 00 00 02 D3 02
29 01 00 00 00 00 02 D4 5D
29 01 00 00 00 00 02 D5 02
29 01 00 00 00 00 02 D6 93
29 01 00 00 00 00 02 D7 02
29 01 00 00 00 00 02 D8 B8
29 01 00 00 00 00 02 D9 02
29 01 00 00 00 00 02 DA E7
29 01 00 00 00 00 02 DB 03
29 01 00 00 00 00 02 DC 07
29 01 00 00 00 00 02 DD 03
29 01 00 00 00 00 02 DE 37
29 01 00 00 00 00 02 DF 03
29 01 00 00 00 00 02 E0 46
29 01 00 00 00 00 02 E1 03
29 01 00 00 00 00 02 E2 56
29 01 00 00 00 00 02 E3 03
29 01 00 00 00 00 02 E4 66
29 01 00 00 00 00 02 E5 03
29 01 00 00 00 00 02 E6 7A
29 01 00 00 00 00 02 E7 03
29 01 00 00 00 00 02 E8 93
29 01 00 00 00 00 02 E9 03
29 01 00 00 00 00 02 EA A3
29 01 00 00 00 00 02 EB 03
29 01 00 00 00 00 02 EC B4
29 01 00 00 00 00 02 ED 03
29 01 00 00 00 00 02 EE CB
29 01 00 00 00 00 02 EF 00
29 01 00 00 00 00 02 F0 ED
29 01 00 00 00 00 02 F1 00
29 01 00 00 00 00 02 F2 F3
29 01 00 00 00 00 02 F3 00
29 01 00 00 00 00 02 F4 FE
29 01 00 00 00 00 02 F5 01
29 01 00 00 00 00 02 F6 09
29 01 00 00 00 00 02 F7 01
29 01 00 00 00 00 02 F8 13
29 01 00 00 00 00 02 F9 01
29 01 00 00 00 00 02 FA 1D
29 01 00 00 00 00 02 FF 02
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 00 01
29 01 00 00 00 00 02 01 26
29 01 00 00 00 00 02 02 01
29 01 00 00 00 00 02 03 2F
29 01 00 00 00 00 02 04 01
29 01 00 00 00 00 02 05 37
29 01 00 00 00 00 02 06 01
29 01 00 00 00 00 02 07 56
29 01 00 00 00 00 02 08 01
29 01 00 00 00 00 02 09 70
29 01 00 00 00 00 02 0A 01
29 01 00 00 00 00 02 0B 9D
29 01 00 00 00 00 02 0C 01
29 01 00 00 00 00 02 0D C2
29 01 00 00 00 00 02 0E 01
29 01 00 00 00 00 02 0F FF
29 01 00 00 00 00 02 10 02
29 01 00 00 00 00 02 11 31
29 01 00 00 00 00 02 12 02
29 01 00 00 00 00 02 13 32
29 01 00 00 00 00 02 14 02
29 01 00 00 00 00 02 15 60
29 01 00 00 00 00 02 16 02
29 01 00 00 00 00 02 17 94
29 01 00 00 00 00 02 18 02
29 01 00 00 00 00 02 19 B5
29 01 00 00 00 00 02 1A 02
29 01 00 00 00 00 02 1B E3
29 01 00 00 00 00 02 1C 03
29 01 00 00 00 00 02 1D 03
29 01 00 00 00 00 02 1E 03
29 01 00 00 00 00 02 1F 2D
29 01 00 00 00 00 02 20 03
29 01 00 00 00 00 02 21 3A
29 01 00 00 00 00 02 22 03
29 01 00 00 00 00 02 23 48
29 01 00 00 00 00 02 24 03
29 01 00 00 00 00 02 25 57
29 01 00 00 00 00 02 26 03
29 01 00 00 00 00 02 27 68
29 01 00 00 00 00 02 28 03
29 01 00 00 00 00 02 29 7B
29 01 00 00 00 00 02 2A 03
29 01 00 00 00 00 02 2B 90
29 01 00 00 00 00 02 2D 03
29 01 00 00 00 00 02 2F A0
29 01 00 00 00 00 02 30 03
29 01 00 00 00 00 02 31 CB
29 01 00 00 00 00 02 32 00
29 01 00 00 00 00 02 33 ED
29 01 00 00 00 00 02 34 00
29 01 00 00 00 00 02 35 F3
29 01 00 00 00 00 02 36 00
29 01 00 00 00 00 02 37 FE
29 01 00 00 00 00 02 38 01
29 01 00 00 00 00 02 39 09
29 01 00 00 00 00 02 3A 01
29 01 00 00 00 00 02 3B 13
29 01 00 00 00 00 02 3D 01
29 01 00 00 00 00 02 3F 1D
29 01 00 00 00 00 02 40 01
29 01 00 00 00 00 02 41 26
29 01 00 00 00 00 02 42 01
29 01 00 00 00 00 02 43 2F
29 01 00 00 00 00 02 44 01
29 01 00 00 00 00 02 45 37
29 01 00 00 00 00 02 46 01
29 01 00 00 00 00 02 47 56
29 01 00 00 00 00 02 48 01
29 01 00 00 00 00 02 49 70
29 01 00 00 00 00 02 4A 01
29 01 00 00 00 00 02 4B 9D
29 01 00 00 00 00 02 4C 01
29 01 00 00 00 00 02 4D C2
29 01 00 00 00 00 02 4E 01
29 01 00 00 00 00 02 4F FF
29 01 00 00 00 00 02 50 02
29 01 00 00 00 00 02 51 31
29 01 00 00 00 00 02 52 02
29 01 00 00 00 00 02 53 32
29 01 00 00 00 00 02 54 02
29 01 00 00 00 00 02 55 60
29 01 00 00 00 00 02 56 02
29 01 00 00 00 00 02 58 94
29 01 00 00 00 00 02 59 02
29 01 00 00 00 00 02 5A B5
29 01 00 00 00 00 02 5B 02
29 01 00 00 00 00 02 5C E3
29 01 00 00 00 00 02 5D 03
29 01 00 00 00 00 02 5E 03
29 01 00 00 00 00 02 5F 03
29 01 00 00 00 00 02 60 2D
29 01 00 00 00 00 02 61 03
29 01 00 00 00 00 02 62 3A
29 01 00 00 00 00 02 63 03
29 01 00 00 00 00 02 64 48
29 01 00 00 00 00 02 65 03
29 01 00 00 00 00 02 66 57
29 01 00 00 00 00 02 67 03
29 01 00 00 00 00 02 68 68
29 01 00 00 00 00 02 69 03
29 01 00 00 00 00 02 6A 7B
29 01 00 00 00 00 02 6B 03
29 01 00 00 00 00 02 6C 90
29 01 00 00 00 00 02 6D 03
29 01 00 00 00 00 02 6E A0
29 01 00 00 00 00 02 6F 03
29 01 00 00 00 00 02 70 CB
29 01 00 00 00 00 02 71 00
29 01 00 00 00 00 02 72 19
29 01 00 00 00 00 02 73 00
29 01 00 00 00 00 02 74 36
29 01 00 00 00 00 02 75 00
29 01 00 00 00 00 02 76 55
29 01 00 00 00 00 02 77 00
29 01 00 00 00 00 02 78 70
29 01 00 00 00 00 02 79 00
29 01 00 00 00 00 02 7A 83
29 01 00 00 00 00 02 7B 00
29 01 00 00 00 00 02 7C 99
29 01 00 00 00 00 02 7D 00
29 01 00 00 00 00 02 7E A8
29 01 00 00 00 00 02 7F 00
29 01 00 00 00 00 02 80 B7
29 01 00 00 00 00 02 81 00
29 01 00 00 00 00 02 82 C5
29 01 00 00 00 00 02 83 00
29 01 00 00 00 00 02 84 F7
29 01 00 00 00 00 02 85 01
29 01 00 00 00 00 02 86 1E
29 01 00 00 00 00 02 87 01
29 01 00 00 00 00 02 88 60
29 01 00 00 00 00 02 89 01
29 01 00 00 00 00 02 8A 95
29 01 00 00 00 00 02 8B 01
29 01 00 00 00 00 02 8C E1
29 01 00 00 00 00 02 8D 02
29 01 00 00 00 00 02 8E 20
29 01 00 00 00 00 02 8F 02
29 01 00 00 00 00 02 90 23
29 01 00 00 00 00 02 91 02
29 01 00 00 00 00 02 92 59
29 01 00 00 00 00 02 93 02
29 01 00 00 00 00 02 94 94
29 01 00 00 00 00 02 95 02
29 01 00 00 00 00 02 96 B4
29 01 00 00 00 00 02 97 02
29 01 00 00 00 00 02 98 E1
29 01 00 00 00 00 02 99 03
29 01 00 00 00 00 02 9A 01
29 01 00 00 00 00 02 9B 03
29 01 00 00 00 00 02 9C 28
29 01 00 00 00 00 02 9D 03
29 01 00 00 00 00 02 9E 30
29 01 00 00 00 00 02 9F 03
29 01 00 00 00 00 02 A0 37
29 01 00 00 00 00 02 A2 03
29 01 00 00 00 00 02 A3 3B
29 01 00 00 00 00 02 A4 03
29 01 00 00 00 00 02 A5 40
29 01 00 00 00 00 02 A6 03
29 01 00 00 00 00 02 A7 50
29 01 00 00 00 00 02 A9 03
29 01 00 00 00 00 02 AA 6D
29 01 00 00 00 00 02 AB 03
29 01 00 00 00 00 02 AC 80
29 01 00 00 00 00 02 AD 03
29 01 00 00 00 00 02 AE CB
29 01 00 00 00 00 02 AF 00
29 01 00 00 00 00 02 B0 19
29 01 00 00 00 00 02 B1 00
29 01 00 00 00 00 02 B2 36
29 01 00 00 00 00 02 B3 00
29 01 00 00 00 00 02 B4 55
29 01 00 00 00 00 02 B5 00
29 01 00 00 00 00 02 B6 70
29 01 00 00 00 00 02 B7 00
29 01 00 00 00 00 02 B8 83
29 01 00 00 00 00 02 B9 00
29 01 00 00 00 00 02 BA 99
29 01 00 00 00 00 02 BB 00
29 01 00 00 00 00 02 BC A8
29 01 00 00 00 00 02 BD 00
29 01 00 00 00 00 02 BE B7
29 01 00 00 00 00 02 BF 00
29 01 00 00 00 00 02 C0 C5
29 01 00 00 00 00 02 C1 00
29 01 00 00 00 00 02 C2 F7
29 01 00 00 00 00 02 C3 01
29 01 00 00 00 00 02 C4 1E
29 01 00 00 00 00 02 C5 01
29 01 00 00 00 00 02 C6 60
29 01 00 00 00 00 02 C7 01
29 01 00 00 00 00 02 C8 95
29 01 00 00 00 00 02 C9 01
29 01 00 00 00 00 02 CA E1
29 01 00 00 00 00 02 CB 02
29 01 00 00 00 00 02 CC 20
29 01 00 00 00 00 02 CD 02
29 01 00 00 00 00 02 CE 23
29 01 00 00 00 00 02 CF 02
29 01 00 00 00 00 02 D0 59
29 01 00 00 00 00 02 D1 02
29 01 00 00 00 00 02 D2 94
29 01 00 00 00 00 02 D3 02
29 01 00 00 00 00 02 D4 B4
29 01 00 00 00 00 02 D5 02
29 01 00 00 00 00 02 D6 E1
29 01 00 00 00 00 02 D7 03
29 01 00 00 00 00 02 D8 01
29 01 00 00 00 00 02 D9 03
29 01 00 00 00 00 02 DA 28
29 01 00 00 00 00 02 DB 03
29 01 00 00 00 00 02 DC 30
29 01 00 00 00 00 02 DD 03
29 01 00 00 00 00 02 DE 37
29 01 00 00 00 00 02 DF 03
29 01 00 00 00 00 02 E0 3B
29 01 00 00 00 00 02 E1 03
29 01 00 00 00 00 02 E2 40
29 01 00 00 00 00 02 E3 03
29 01 00 00 00 00 02 E4 50
29 01 00 00 00 00 02 E5 03
29 01 00 00 00 00 02 E6 6D
29 01 00 00 00 00 02 E7 03
29 01 00 00 00 00 02 E8 80
29 01 00 00 00 00 02 E9 03
29 01 00 00 00 00 02 EA CB
29 01 00 00 00 00 02 FF 01
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 FF 02
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 FF 04
29 01 00 00 00 00 02 FB 01
29 01 00 00 00 00 02 FF 00
29 01 00 00 64 00 02 11 00
29 01 00 00 00 00 02 FF EE
29 01 00 00 00 00 02 12 50
29 01 00 00 00 00 02 13 02
29 01 00 00 00 00 02 6A 60
29 01 00 00 00 00 02 FF 00
29 01 00 00 78 00 02 29 00];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [05 01 00 00 32 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,off-cmds-dsi-state = "DSI_HS_MODE";
};
};

60
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-panel-orise-720p-video.dtsi Normal file
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@ -0,0 +1,60 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,mdss_dsi_orise_720p_video {
compatible = "qcom,mdss-dsi-panel";
label = "orise 720p video mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi1>;
qcom,mdss-pan-res = <720 1280>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_2";
qcom,mdss-pan-porch-values = <32 12 144 3 4 9>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-levels = <1 255>;
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <0>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <1>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 1 1>;
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x1b 0x04>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x0>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-phy-regulatorSettings = [03 01 01 00 /* Regualotor settings */
20 00 01];
qcom,panel-phy-timingSettings = [69 29 1f 00 55 55
19 2a 2a 03 04 00];
qcom,panel-phy-strengthCtrl = [77 06];
qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
00 00];
qcom,panel-phy-laneConfig = [00 c2 45 00 00 00 00 01 75 /* lane0 config */
00 c2 45 00 00 00 00 01 75 /* lane1 config */
00 c2 45 00 00 00 00 01 75 /* lane2 config */
00 c2 45 00 00 00 00 01 75 /* lane3 config */
00 02 45 00 00 00 00 01 97]; /* Clk ln config */
qcom,panel-on-cmds = [05 01 00 00 78 00 02 11 00
05 01 00 00 78 00 02 29 00];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [05 01 00 00 32 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,off-cmds-dsi-state = "DSI_LP_MODE";
};
};

67
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-panel-sharp-qhd-video.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,mdss_dsi_sharp_qhd_video {
compatible = "qcom,mdss-dsi-panel";
label = "sharp QHD LS043T1LE01 video mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,enable-gpio = <&msmgpio 58 0>;
qcom,rst-gpio = <&pm8941_gpios 19 0>;
qcom,mdss-pan-res = <540 960>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <80 32 48 15 10 3>; /* HBP, HPW, HFP, VBP, VPW, VFP */
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
qcom,mdss-pan-bl-levels = <1 4095>;
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <1>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <0>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <2>;
qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x1c 0x04>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x04>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-frame-rate = <60>;
qcom,panel-phy-regulatorSettings = [07 09 03 00 /* Regulator settings */
20 00 01];
qcom,panel-phy-timingSettings = [46 1d 20 00 39 3a
21 21 32 03 04 00];
qcom,panel-phy-strengthCtrl = [ff 06];
qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
00 00];
qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 /* lane0 config */
00 00 00 00 05 00 00 01 97 /* lane1 config */
00 00 00 00 0a 00 00 01 97 /* lane2 config */
00 00 00 00 0f 00 00 01 97 /* lane3 config */
00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
qcom,panel-on-cmds = [05 01 00 00 32 00 02 01 00 /* sw reset */
05 01 00 00 0a 00 02 11 00 /* exit sleep */
15 01 00 00 0a 00 02 53 2c /* backlight on */
15 01 00 00 0a 00 02 51 ff /* brightness max */
05 01 00 00 0a 00 02 29 00 /* display on */
15 01 00 00 0a 00 02 ae 03 /* set num of lanes */
15 01 00 00 0a 00 02 3a 77 /* rgb_888 */];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [05 01 00 00 0a 00 02 28 00 /* display off */
05 01 00 00 78 00 02 10 00 /* enter sleep */];
qcom,off-cmds-dsi-state = "DSI_HS_MODE";
};
};

46
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-panel-sim-video.dtsi Normal file
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@ -0,0 +1,46 @@
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,mdss_dsi_sim_video {
compatible = "qcom,mdss-dsi-panel";
label = "simulator video mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,mdss-pan-res = <640 480>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <6 2 6 6 2 6>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-levels = <1 15>;
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <1>;
qcom,mdss-pan-dsi-h-power-stop = <1 1 1>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <0>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x24 0x03>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x04>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-on-cmds = [32 01 00 00 00 00 02 00 00];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [22 01 00 00 00 00 02 00 00];
qcom,off-cmds-dsi-state = "DSI_LP_MODE";
};
};

124
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,mdss_dsi_toshiba_720p_video {
compatible = "qcom,mdss-dsi-panel";
label = "toshiba 720p video mode dsi panel";
status = "disable";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,enable-gpio = <&msmgpio 58 0>;
qcom,rst-gpio = <&pm8941_gpios 19 0>;
qcom,mdss-pan-res = <720 1280>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <32 12 144 3 4 9>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
qcom,mdss-pan-bl-levels = <1 4095>;
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <0>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <1>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 1 1>;
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x1b 0x04>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x0>;
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-phy-regulatorSettings = [07 09 03 00 /* Regualotor settings */
20 00 01];
qcom,panel-phy-timingSettings = [b0 23 1b 00 94 93
1e 25 15 03 04 00];
qcom,panel-phy-strengthCtrl = [ff 06];
qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
00 00];
qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 /* lane0 config */
00 00 00 00 05 00 00 01 97 /* lane1 config */
00 00 00 00 0a 00 00 01 97 /* lane2 config */
00 00 00 00 0f 00 00 01 97 /* lane3 config */
00 c0 00 00 00 00 00 01 bb]; /* Clk ln config */
qcom,panel-on-cmds = [23 01 00 00 0a 00 02 b0 00
23 01 00 00 0a 00 02 b2 00
23 01 00 00 0a 00 02 b3 0c
23 01 00 00 0a 00 02 b4 02
29 01 00 00 00 00 06
c0 40 02 7f c8 08
29 01 00 00 00 00 10
c1 00 a8 00 00 00
00 00 9d 08 27 00
00 00 00 00
29 01 00 00 00 00 06
c2 00 00 09 00 00
23 01 00 00 0a 00 02 c3 04
29 01 00 00 00 00 04
c4 4d 83 00
29 01 00 00 00 00 0b
c6 12 00 08 71 00
00 00 80 00 04
23 01 00 00 0a 00 02 c7 22
29 01 00 00 00 00 05
c8 4c 0c 0c 0c
29 01 00 00 00 00 0e
c9 00 40 00 16 32
2e 3a 43 3e 3c 45
79 3f
29 01 00 00 00 00 0e
ca 00 46 1a 23 21
1c 25 31 2d 49 5f
7f 3f
29 01 00 00 00 00 0e
cb 00 4c 20 3a 42
40 47 4b 42 3e 46
7e 3f
29 01 00 00 00 00 0e
cc 00 41 19 21 1d
14 18 1f 1d 25 3f
73 3f
29 01 00 00 00 00 0e
cd 23 79 5a 5f 57
4c 51 51 45 3f 4b
7f 3f
29 01 00 00 00 00 0e
ce 00 40 14 20 1a
0e 0e 13 08 00 05
46 1c
29 01 00 00 00 00 04
d0 6a 64 01
29 01 00 00 00 00 03 d1 77 d4
23 01 00 00 0a 00 02 d3 33
29 01 00 00 00 00 03 d5 0f 0f
29 01 00 00 00 00 07
d8 34 64 23 25 62
32
29 01 00 00 00 00 0c
de 10 7b 11 0a 00
00 00 00 00 00 00
29 01 00 00 00 00 09
fd 04 55 53 00 70
ff 10 73
23 01 00 00 0a 00 02 e2 00
05 01 00 00 78 00 02 11 00
05 01 00 00 32 00 02 29 00];
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-off-cmds = [05 01 00 00 32 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,off-cmds-dsi-state = "DSI_HS_MODE";
};
};

117
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-v2-panel-hx8379a-wvga-video.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/ {
qcom,dsi_v2_hx8379a_wvga_video {
compatible = "qcom,dsi-panel-v2";
label = "HX8379A WVGA video mode dsi panel";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,rst-gpio = <&msmgpio 41 0>;
vdda-supply = <&pm8110_l19>;
vddio-supply=<&pm8110_l14>;
qcom,mdss-pan-res = <480 800>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <90 17 90 2 3 11>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-levels = <1 255>;
qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <1>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <2>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
qcom,mdss-pan-dsi-dlane-swap = <1>;
qcom,mdss-pan-dsi-t-clk = <0x1b 0x04>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x0>;/*todo*/
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-phy-regulatorSettings =[09 08 05 00 20 03];
qcom,panel-phy-timingSettings = [5D 12 0C 00 33 39
10 16 15 03 04 00];
qcom,panel-phy-strengthCtrl = [ff 06];
qcom,panel-phy-bistCtrl = [03 03 00 00 0f 00];
qcom,panel-phy-laneConfig =
[80 45 00 00 01 66 /*lane0**/
80 45 00 00 01 66 /*lane1*/
80 45 00 00 01 66 /*lane2*/
80 45 00 00 01 66 /*lane3*/
40 67 00 00 01 88]; /*Clk*/
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-on-cmds = [
29 01 00 00 01 04
B9 FF 83 79
23 01 00 00 01 02
BA 51
29 01 00 00 01 14
B1 00 50 44
EA 8D 08 11
0F 0F 24 2C
9A 1A 42 0B
6E F1 00 E6
29 01 00 00 01 0e
B2 00 00 3C
08 04 19 22
00 FF 08 04
19 20
29 01 00 00 01 20
B4 80 08 00
32 10 03 32
13 70 32 10
08 37 01 28
05 37 08 3C
20 44 44 08
00 40 08 28
08 30 30 04
23 01 00 00 01 02
cc 02
29 01 00 00 01 30
D5 00 00 08
00 01 05 00
03 00 88 88
88 88 23 01
67 45 02 13
88 88 88 88
88 88 88 88
88 88 54 76
10 32 31 20
88 88 88 88
88 88 00 00
00 00 00 00
29 01 00 00 01 24
E0 79 00 00
02 1C 1F 33
28 3E 07 0E
0F 15 17 16
16 13 19 00
00 02 1C 1F
33 28 3E 07
0E 0F 15 17
16 16 13 19
29 01 00 00 01 05
B6 00 A6 00 A6
05 01 00 00 96 02
11 00
05 01 00 00 78 02
29 00
];
qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
05 01 00 00 78 02 10 00];
qcom,off-cmds-dsi-state = "DSI_LP_MODE";
};
};

120
kernel/arch/arm/boot/dts/m7350-un-v3/dsi-v2-panel-truly-wvga-video.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/ {
qcom,dsi_v2_truly_wvga_video {
compatible = "qcom,dsi-panel-v2";
label = "Truly WVGA video mode dsi panel";
qcom,dsi-ctrl-phandle = <&mdss_dsi0>;
qcom,rst-gpio = <&msmgpio 41 0>;
qcom,mode-selection-gpio = <&msmgpio 7 0>;
vdda-supply = <&pm8110_l19>;
vddio-supply=<&pm8110_l14>;
qcom,mdss-pan-res = <480 800>;
qcom,mdss-pan-bpp = <24>;
qcom,mdss-pan-dest = "display_1";
qcom,mdss-pan-porch-values = <40 8 160 10 2 12>;
qcom,mdss-pan-underflow-clr = <0xff>;
qcom,mdss-pan-bl-levels = <1 255>;
qcom,mdss-pan-bl-ctrl = "bl_ctrl_wled";
qcom,mdss-pan-dsi-mode = <0>;
qcom,mdss-pan-dsi-h-pulse-mode = <0>;
qcom,mdss-pan-dsi-h-power-stop = <0 0 0>;
qcom,mdss-pan-dsi-bllp-power-stop = <1 1>;
qcom,mdss-pan-dsi-traffic-mode = <1>;
qcom,mdss-pan-dsi-dst-format = <3>;
qcom,mdss-pan-dsi-vc = <0>;
qcom,mdss-pan-dsi-rgb-swap = <0>;
qcom,mdss-pan-dsi-data-lanes = <1 1 0 0>;
qcom,mdss-pan-dsi-dlane-swap = <0>;
qcom,mdss-pan-dsi-t-clk = <0x1b 0x04>;
qcom,mdss-pan-dsi-stream = <0>;
qcom,mdss-pan-dsi-mdp-tr = <0x0>;/*todo*/
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-dsi-frame-rate = <60>;
qcom,panel-phy-regulatorSettings =[09 08 05 00 20 03];
qcom,panel-phy-timingSettings = [5D 12 0C 00 33 38
10 16 1E 03 04 00];
qcom,panel-phy-strengthCtrl = [ff 06];
qcom,panel-phy-bistCtrl = [03 03 00 00 0f 00];
qcom,panel-phy-laneConfig =
[80 45 00 00 01 66 /*lane0**/
80 45 00 00 01 66 /*lane1*/
80 45 00 00 01 66 /*lane2*/
80 45 00 00 01 66 /*lane3*/
40 67 00 00 01 88]; /*Clk*/
qcom,on-cmds-dsi-state = "DSI_LP_MODE";
qcom,panel-on-cmds = [
05 01 00 00 00 02
01 00
23 01 00 00 00 02
b0 04
29 01 00 00 00 03
b3 02 00
23 01 00 00 00 02
bd 00
29 01 00 00 00 03
c0 18 66
29 01 00 00 00 10
c1 23 31 99 21 20 00 30 28 0c 0c
00 00 00 21 01
29 01 00 00 00 07
c2 10 06 06 01 03 00
29 01 00 00 00 19
c8 04 10 18 20 2e 46 3c 28 1f 18
10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
29 01 00 00 00 19
c9 04 10 18 20 2e 46 3c 28 1f 18
10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
29 01 00 00 00 19
ca 04 10 18 20 2e 46 3c 28 1f 18
10 04 04 10 18 20 2e 46 3c 28 1f 18 10 04
29 01 00 00 00 11
d0 29 03 ce a6 00 43 20 10 01 00
01 01 00 03 01 00
29 01 00 00 00 08
d1 18 0C 23 03 75 02 50
23 01 00 00 00 02
d3 11
29 01 00 00 00 03
d5 2a 2a
29 01 00 00 00 03
de 01 41
23 01 00 00 00 02
e6 51
23 01 00 00 00 02
fa 03
23 01 00 00 64 02
d6 28
39 01 00 00 00 05
2a 00 00 01 df
39 01 00 00 00 05
2b 00 00 03 1f
15 01 00 00 00 02
35 00
39 01 00 00 00 03
44 00 50
15 01 00 00 00 02
36 c1
15 01 00 00 00 02
3a 77
05 01 00 00 7D 02
11 00
05 01 00 00 14 02
29 00
];
qcom,panel-off-cmds = [05 01 00 00 32 02 28 00
05 01 00 00 78 02 10 00];
qcom,off-cmds-dsi-state = "DSI_LP_MODE";
};
};

137
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/*
* Samsung's Exynos4210 based Origen board device tree source
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2010-2011 Linaro Ltd.
* www.linaro.org
*
* Device tree source file for Insignal's Origen board which is based on
* Samsung's Exynos4210 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos4210.dtsi"
/ {
model = "Insignal Origen evaluation board based on Exynos4210";
compatible = "insignal,origen", "samsung,exynos4210";
memory {
reg = <0x40000000 0x40000000>;
};
chosen {
bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
};
sdhci@12530000 {
samsung,sdhci-bus-width = <4>;
linux,mmc_cap_4_bit_data;
samsung,sdhci-cd-internal;
gpio-cd = <&gpk2 2 2 3 3>;
gpios = <&gpk2 0 2 0 3>,
<&gpk2 1 2 0 3>,
<&gpk2 3 2 3 3>,
<&gpk2 4 2 3 3>,
<&gpk2 5 2 3 3>,
<&gpk2 6 2 3 3>;
};
sdhci@12510000 {
samsung,sdhci-bus-width = <4>;
linux,mmc_cap_4_bit_data;
samsung,sdhci-cd-internal;
gpio-cd = <&gpk0 2 2 3 3>;
gpios = <&gpk0 0 2 0 3>,
<&gpk0 1 2 0 3>,
<&gpk0 3 2 3 3>,
<&gpk0 4 2 3 3>,
<&gpk0 5 2 3 3>,
<&gpk0 6 2 3 3>;
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
up {
label = "Up";
gpios = <&gpx2 0 0 0 2>;
linux,code = <103>;
};
down {
label = "Down";
gpios = <&gpx2 1 0 0 2>;
linux,code = <108>;
};
back {
label = "Back";
gpios = <&gpx1 7 0 0 2>;
linux,code = <158>;
};
home {
label = "Home";
gpios = <&gpx1 6 0 0 2>;
linux,code = <102>;
};
menu {
label = "Menu";
gpios = <&gpx1 5 0 0 2>;
linux,code = <139>;
};
};
keypad@100A0000 {
status = "disabled";
};
sdhci@12520000 {
status = "disabled";
};
sdhci@12540000 {
status = "disabled";
};
i2c@13860000 {
status = "disabled";
};
i2c@13870000 {
status = "disabled";
};
i2c@13880000 {
status = "disabled";
};
i2c@13890000 {
status = "disabled";
};
i2c@138A0000 {
status = "disabled";
};
i2c@138B0000 {
status = "disabled";
};
i2c@138C0000 {
status = "disabled";
};
i2c@138D0000 {
status = "disabled";
};
};

182
kernel/arch/arm/boot/dts/m7350-un-v3/exynos4210-smdkv310.dts Normal file
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/*
* Samsung's Exynos4210 based SMDKV310 board device tree source
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2010-2011 Linaro Ltd.
* www.linaro.org
*
* Device tree source file for Samsung's SMDKV310 board which is based on
* Samsung's Exynos4210 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos4210.dtsi"
/ {
model = "Samsung smdkv310 evaluation board based on Exynos4210";
compatible = "samsung,smdkv310", "samsung,exynos4210";
memory {
reg = <0x40000000 0x80000000>;
};
chosen {
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
};
sdhci@12530000 {
samsung,sdhci-bus-width = <4>;
linux,mmc_cap_4_bit_data;
samsung,sdhci-cd-internal;
gpio-cd = <&gpk2 2 2 3 3>;
gpios = <&gpk2 0 2 0 3>,
<&gpk2 1 2 0 3>,
<&gpk2 3 2 3 3>,
<&gpk2 4 2 3 3>,
<&gpk2 5 2 3 3>,
<&gpk2 6 2 3 3>;
};
keypad@100A0000 {
samsung,keypad-num-rows = <2>;
samsung,keypad-num-columns = <8>;
linux,keypad-no-autorepeat;
linux,keypad-wakeup;
row-gpios = <&gpx2 0 3 3 0>,
<&gpx2 1 3 3 0>;
col-gpios = <&gpx1 0 3 0 0>,
<&gpx1 1 3 0 0>,
<&gpx1 2 3 0 0>,
<&gpx1 3 3 0 0>,
<&gpx1 4 3 0 0>,
<&gpx1 5 3 0 0>,
<&gpx1 6 3 0 0>,
<&gpx1 7 3 0 0>;
key_1 {
keypad,row = <0>;
keypad,column = <3>;
linux,code = <2>;
};
key_2 {
keypad,row = <0>;
keypad,column = <4>;
linux,code = <3>;
};
key_3 {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <4>;
};
key_4 {
keypad,row = <0>;
keypad,column = <6>;
linux,code = <5>;
};
key_5 {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <6>;
};
key_a {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <30>;
};
key_b {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <48>;
};
key_c {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <46>;
};
key_d {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <32>;
};
key_e {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <18>;
};
};
i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
gpios = <&gpd1 0 2 3 0>,
<&gpd1 1 2 3 0>;
eeprom@50 {
compatible = "samsung,24ad0xd1";
reg = <0x50>;
};
eeprom@52 {
compatible = "samsung,24ad0xd1";
reg = <0x52>;
};
};
sdhci@12510000 {
status = "disabled";
};
sdhci@12520000 {
status = "disabled";
};
sdhci@12540000 {
status = "disabled";
};
i2c@13870000 {
status = "disabled";
};
i2c@13880000 {
status = "disabled";
};
i2c@13890000 {
status = "disabled";
};
i2c@138A0000 {
status = "disabled";
};
i2c@138B0000 {
status = "disabled";
};
i2c@138C0000 {
status = "disabled";
};
i2c@138D0000 {
status = "disabled";
};
};

398
kernel/arch/arm/boot/dts/m7350-un-v3/exynos4210.dtsi Normal file
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/*
* Samsung's Exynos4210 SoC device tree source
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2010-2011 Linaro Ltd.
* www.linaro.org
*
* Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
* based board files can include this file and provide values for board specfic
* bindings.
*
* Note: This file does not include device nodes for all the controllers in
* Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
* nodes can be added to this file.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "samsung,exynos4210";
interrupt-parent = <&gic>;
gic:interrupt-controller@10490000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
cpu-offset = <0x8000>;
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
};
watchdog@10060000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x10060000 0x100>;
interrupts = <0 43 0>;
};
rtc@10070000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x10070000 0x100>;
interrupts = <0 44 0>, <0 45 0>;
};
keypad@100A0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
interrupts = <0 109 0>;
};
sdhci@12510000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12510000 0x100>;
interrupts = <0 73 0>;
};
sdhci@12520000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12520000 0x100>;
interrupts = <0 74 0>;
};
sdhci@12530000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12530000 0x100>;
interrupts = <0 75 0>;
};
sdhci@12540000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12540000 0x100>;
interrupts = <0 76 0>;
};
serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
interrupts = <0 52 0>;
};
serial@13810000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13810000 0x100>;
interrupts = <0 53 0>;
};
serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
interrupts = <0 54 0>;
};
serial@13830000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13830000 0x100>;
interrupts = <0 55 0>;
};
i2c@13860000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupts = <0 58 0>;
};
i2c@13870000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <0 59 0>;
};
i2c@13880000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupts = <0 60 0>;
};
i2c@13890000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupts = <0 61 0>;
};
i2c@138A0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x138A0000 0x100>;
interrupts = <0 62 0>;
};
i2c@138B0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x138B0000 0x100>;
interrupts = <0 63 0>;
};
i2c@138C0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x138C0000 0x100>;
interrupts = <0 64 0>;
};
i2c@138D0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x138D0000 0x100>;
interrupts = <0 65 0>;
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus";
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <0 35 0>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <0 36 0>;
};
};
gpio-controllers {
#address-cells = <1>;
#size-cells = <1>;
gpio-controller;
ranges;
gpa0: gpio-controller@11400000 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400000 0x20>;
#gpio-cells = <4>;
};
gpa1: gpio-controller@11400020 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400020 0x20>;
#gpio-cells = <4>;
};
gpb: gpio-controller@11400040 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400040 0x20>;
#gpio-cells = <4>;
};
gpc0: gpio-controller@11400060 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400060 0x20>;
#gpio-cells = <4>;
};
gpc1: gpio-controller@11400080 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400080 0x20>;
#gpio-cells = <4>;
};
gpd0: gpio-controller@114000A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114000A0 0x20>;
#gpio-cells = <4>;
};
gpd1: gpio-controller@114000C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114000C0 0x20>;
#gpio-cells = <4>;
};
gpe0: gpio-controller@114000E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114000E0 0x20>;
#gpio-cells = <4>;
};
gpe1: gpio-controller@11400100 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400100 0x20>;
#gpio-cells = <4>;
};
gpe2: gpio-controller@11400120 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400120 0x20>;
#gpio-cells = <4>;
};
gpe3: gpio-controller@11400140 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400140 0x20>;
#gpio-cells = <4>;
};
gpe4: gpio-controller@11400160 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400160 0x20>;
#gpio-cells = <4>;
};
gpf0: gpio-controller@11400180 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400180 0x20>;
#gpio-cells = <4>;
};
gpf1: gpio-controller@114001A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114001A0 0x20>;
#gpio-cells = <4>;
};
gpf2: gpio-controller@114001C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114001C0 0x20>;
#gpio-cells = <4>;
};
gpf3: gpio-controller@114001E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114001E0 0x20>;
#gpio-cells = <4>;
};
gpj0: gpio-controller@11000000 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000000 0x20>;
#gpio-cells = <4>;
};
gpj1: gpio-controller@11000020 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000020 0x20>;
#gpio-cells = <4>;
};
gpk0: gpio-controller@11000040 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000040 0x20>;
#gpio-cells = <4>;
};
gpk1: gpio-controller@11000060 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000060 0x20>;
#gpio-cells = <4>;
};
gpk2: gpio-controller@11000080 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000080 0x20>;
#gpio-cells = <4>;
};
gpk3: gpio-controller@110000A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x110000A0 0x20>;
#gpio-cells = <4>;
};
gpl0: gpio-controller@110000C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x110000C0 0x20>;
#gpio-cells = <4>;
};
gpl1: gpio-controller@110000E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x110000E0 0x20>;
#gpio-cells = <4>;
};
gpl2: gpio-controller@11000100 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000100 0x20>;
#gpio-cells = <4>;
};
gpy0: gpio-controller@11000120 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000120 0x20>;
#gpio-cells = <4>;
};
gpy1: gpio-controller@11000140 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000140 0x20>;
#gpio-cells = <4>;
};
gpy2: gpio-controller@11000160 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000160 0x20>;
#gpio-cells = <4>;
};
gpy3: gpio-controller@11000180 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000180 0x20>;
#gpio-cells = <4>;
};
gpy4: gpio-controller@110001A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x110001A0 0x20>;
#gpio-cells = <4>;
};
gpy5: gpio-controller@110001C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x110001C0 0x20>;
#gpio-cells = <4>;
};
gpy6: gpio-controller@110001E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x110001E0 0x20>;
#gpio-cells = <4>;
};
gpx0: gpio-controller@11000C00 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000C00 0x20>;
#gpio-cells = <4>;
};
gpx1: gpio-controller@11000C20 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000C20 0x20>;
#gpio-cells = <4>;
};
gpx2: gpio-controller@11000C40 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000C40 0x20>;
#gpio-cells = <4>;
};
gpx3: gpio-controller@11000C60 {
compatible = "samsung,exynos4-gpio";
reg = <0x11000C60 0x20>;
#gpio-cells = <4>;
};
gpz: gpio-controller@03860000 {
compatible = "samsung,exynos4-gpio";
reg = <0x03860000 0x20>;
#gpio-cells = <4>;
};
};
};

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/*
* SAMSUNG SMDK5250 board device tree source
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos5250.dtsi"
/ {
model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
compatible = "samsung,smdk5250", "samsung,exynos5250";
memory {
reg = <0x40000000 0x80000000>;
};
chosen {
bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200";
};
};

413
kernel/arch/arm/boot/dts/m7350-un-v3/exynos5250.dtsi Normal file
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/*
* SAMSUNG EXYNOS5250 SoC device tree source
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
* EXYNOS5250 based board files can include this file and provide
* values for board specfic bindings.
*
* Note: This file does not include device nodes for all the controllers in
* EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
* additional nodes can be added to this file.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "samsung,exynos5250";
interrupt-parent = <&gic>;
gic:interrupt-controller@10490000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
};
watchdog {
compatible = "samsung,s3c2410-wdt";
reg = <0x101D0000 0x100>;
interrupts = <0 42 0>;
};
rtc {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
interrupts = <0 43 0>, <0 44 0>;
};
sdhci@12200000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12200000 0x100>;
interrupts = <0 75 0>;
};
sdhci@12210000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12210000 0x100>;
interrupts = <0 76 0>;
};
sdhci@12220000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12220000 0x100>;
interrupts = <0 77 0>;
};
sdhci@12230000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12230000 0x100>;
interrupts = <0 78 0>;
};
serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <0 51 0>;
};
serial@12C10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <0 52 0>;
};
serial@12C20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <0 53 0>;
};
serial@12C30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <0 54 0>;
};
i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;
};
i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;
};
i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;
};
i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
};
i2c@12CA0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CA0000 0x100>;
interrupts = <0 60 0>;
};
i2c@12CB0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CB0000 0x100>;
interrupts = <0 61 0>;
};
i2c@12CC0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CC0000 0x100>;
interrupts = <0 62 0>;
};
i2c@12CD0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CD0000 0x100>;
interrupts = <0 63 0>;
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus";
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@121A0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <0 34 0>;
};
pdma1: pdma@121B0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <0 35 0>;
};
mdma0: pdma@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <0 33 0>;
};
mdma1: pdma@11C10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <0 124 0>;
};
};
gpio-controllers {
#address-cells = <1>;
#size-cells = <1>;
gpio-controller;
ranges;
gpa0: gpio-controller@11400000 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400000 0x20>;
#gpio-cells = <4>;
};
gpa1: gpio-controller@11400020 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400020 0x20>;
#gpio-cells = <4>;
};
gpa2: gpio-controller@11400040 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400040 0x20>;
#gpio-cells = <4>;
};
gpb0: gpio-controller@11400060 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400060 0x20>;
#gpio-cells = <4>;
};
gpb1: gpio-controller@11400080 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400080 0x20>;
#gpio-cells = <4>;
};
gpb2: gpio-controller@114000A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114000A0 0x20>;
#gpio-cells = <4>;
};
gpb3: gpio-controller@114000C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114000C0 0x20>;
#gpio-cells = <4>;
};
gpc0: gpio-controller@114000E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114000E0 0x20>;
#gpio-cells = <4>;
};
gpc1: gpio-controller@11400100 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400100 0x20>;
#gpio-cells = <4>;
};
gpc2: gpio-controller@11400120 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400120 0x20>;
#gpio-cells = <4>;
};
gpc3: gpio-controller@11400140 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400140 0x20>;
#gpio-cells = <4>;
};
gpd0: gpio-controller@11400160 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400160 0x20>;
#gpio-cells = <4>;
};
gpd1: gpio-controller@11400180 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400180 0x20>;
#gpio-cells = <4>;
};
gpy0: gpio-controller@114001A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114001A0 0x20>;
#gpio-cells = <4>;
};
gpy1: gpio-controller@114001C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114001C0 0x20>;
#gpio-cells = <4>;
};
gpy2: gpio-controller@114001E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x114001E0 0x20>;
#gpio-cells = <4>;
};
gpy3: gpio-controller@11400200 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400200 0x20>;
#gpio-cells = <4>;
};
gpy4: gpio-controller@11400220 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400220 0x20>;
#gpio-cells = <4>;
};
gpy5: gpio-controller@11400240 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400240 0x20>;
#gpio-cells = <4>;
};
gpy6: gpio-controller@11400260 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400260 0x20>;
#gpio-cells = <4>;
};
gpx0: gpio-controller@11400C00 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400C00 0x20>;
#gpio-cells = <4>;
};
gpx1: gpio-controller@11400C20 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400C20 0x20>;
#gpio-cells = <4>;
};
gpx2: gpio-controller@11400C40 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400C40 0x20>;
#gpio-cells = <4>;
};
gpx3: gpio-controller@11400C60 {
compatible = "samsung,exynos4-gpio";
reg = <0x11400C60 0x20>;
#gpio-cells = <4>;
};
gpe0: gpio-controller@13400000 {
compatible = "samsung,exynos4-gpio";
reg = <0x13400000 0x20>;
#gpio-cells = <4>;
};
gpe1: gpio-controller@13400020 {
compatible = "samsung,exynos4-gpio";
reg = <0x13400020 0x20>;
#gpio-cells = <4>;
};
gpf0: gpio-controller@13400040 {
compatible = "samsung,exynos4-gpio";
reg = <0x13400040 0x20>;
#gpio-cells = <4>;
};
gpf1: gpio-controller@13400060 {
compatible = "samsung,exynos4-gpio";
reg = <0x13400060 0x20>;
#gpio-cells = <4>;
};
gpg0: gpio-controller@13400080 {
compatible = "samsung,exynos4-gpio";
reg = <0x13400080 0x20>;
#gpio-cells = <4>;
};
gpg1: gpio-controller@134000A0 {
compatible = "samsung,exynos4-gpio";
reg = <0x134000A0 0x20>;
#gpio-cells = <4>;
};
gpg2: gpio-controller@134000C0 {
compatible = "samsung,exynos4-gpio";
reg = <0x134000C0 0x20>;
#gpio-cells = <4>;
};
gph0: gpio-controller@134000E0 {
compatible = "samsung,exynos4-gpio";
reg = <0x134000E0 0x20>;
#gpio-cells = <4>;
};
gph1: gpio-controller@13400100 {
compatible = "samsung,exynos4-gpio";
reg = <0x13400100 0x20>;
#gpio-cells = <4>;
};
gpv0: gpio-controller@10D10000 {
compatible = "samsung,exynos4-gpio";
reg = <0x10D10000 0x20>;
#gpio-cells = <4>;
};
gpv1: gpio-controller@10D10020 {
compatible = "samsung,exynos4-gpio";
reg = <0x10D10020 0x20>;
#gpio-cells = <4>;
};
gpv2: gpio-controller@10D10040 {
compatible = "samsung,exynos4-gpio";
reg = <0x10D10040 0x20>;
#gpio-cells = <4>;
};
gpv3: gpio-controller@10D10060 {
compatible = "samsung,exynos4-gpio";
reg = <0x10D10060 0x20>;
#gpio-cells = <4>;
};
gpv4: gpio-controller@10D10080 {
compatible = "samsung,exynos4-gpio";
reg = <0x10D10080 0x20>;
#gpio-cells = <4>;
};
gpz: gpio-controller@03860000 {
compatible = "samsung,exynos4-gpio";
reg = <0x03860000 0x20>;
#gpio-cells = <4>;
};
};
};

31
kernel/arch/arm/boot/dts/m7350-un-v3/fsm9900-rumi.dts Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "fsm9900.dtsi"
/ {
model = "Qualcomm FSM9900 Rumi";
compatible = "qcom,fsm9900-rumi", "qcom,fsm9900", "qcom-sim";
qcom,msm-id = <188 0 0>;
aliases {
serial0 = &uart0;
};
};
&soc {
uart0: serial@f9960000 {
status = "ok";
};
};

32
kernel/arch/arm/boot/dts/m7350-un-v3/fsm9900-sim.dts Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "fsm9900.dtsi"
/ {
model = "Qualcomm FSM9900 Simulator";
compatible = "qcom,fsm9900-sim", "qcom,fsm9900", "qcom-sim";
qcom,msm-id = <188 0 0>;
aliases {
serial0 = &uart0;
};
};
&soc {
uart0: serial@f9960000 {
interrupts = <0 116 0>;
status = "ok";
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton64.dtsi"
/ {
model = "Qualcomm FSM9900";
compatible = "qcom,fsm9900";
interrupt-parent = <&intc>;
soc: soc { };
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
intc: interrupt-controller@f9000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0xF9000000 0x1000>,
<0xF9002000 0x1000>;
};
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
ngpio = <142>;
interrupts = <0 208 0>;
qcom,direct-connect-irqs = <5>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0 1 3 0>;
clock-frequency = <19200000>;
};
serial@f9960000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf9960000 0x1000>;
interrupts = <0 104 0>;
status = "disabled";
};
cpu-pmu {
compatible = "qcom,krait-pmu";
qcom,irq-is-percpu;
interrupts = <1 7 0xf00>;
};
qcom,msm-imem@fe805000 {
compatible = "qcom,msm-imem";
reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
};
qcom,cache_erp {
compatible = "qcom,cache_erp";
interrupts = <1 9 0>, <0 2 0>;
interrupt-names = "l1_irq", "l2_irq";
};
qcom,cache_dump {
compatible = "qcom,cache_dump";
qcom,l1-dump-size = <0x100000>;
qcom,l2-dump-size = <0x500000>;
qcom,memory-reservation-type = "EBI1";
qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
};
qcom,ion {
compatible = "qcom,msm-ion";
#address-cells = <1>;
#size-cells = <0>;
qcom,ion-heap@30 { /* SYSTEM HEAP */
reg = <30>;
};
};
};

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/*
* Copyright 2011 Calxeda, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
/dts-v1/;
/* First 4KB has pen for secondary cores. */
/memreserve/ 0x00000000 0x0001000;
/ {
model = "Calxeda Highbank";
compatible = "calxeda,highbank";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
compatible = "arm,cortex-a9";
reg = <1>;
next-level-cache = <&L2>;
};
cpu@2 {
compatible = "arm,cortex-a9";
reg = <2>;
next-level-cache = <&L2>;
};
cpu@3 {
compatible = "arm,cortex-a9";
reg = <3>;
next-level-cache = <&L2>;
};
};
memory {
name = "memory";
device_type = "memory";
reg = <0x00000000 0xff900000>;
};
chosen {
bootargs = "console=ttyAMA0";
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&intc>;
ranges;
timer@fff10600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xfff10600 0x20>;
interrupts = <1 13 0xf01>;
};
watchdog@fff10620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0xfff10620 0x20>;
interrupts = <1 14 0xf01>;
};
intc: interrupt-controller@fff11000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#size-cells = <0>;
#address-cells = <1>;
interrupt-controller;
reg = <0xfff11000 0x1000>,
<0xfff10100 0x100>;
};
L2: l2-cache {
compatible = "arm,pl310-cache";
reg = <0xfff12000 0x1000>;
interrupts = <0 70 4>;
cache-unified;
cache-level = <2>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
};
sata@ffe08000 {
compatible = "calxeda,hb-ahci";
reg = <0xffe08000 0x10000>;
interrupts = <0 83 4>;
};
sdhci@ffe0e000 {
compatible = "calxeda,hb-sdhci";
reg = <0xffe0e000 0x1000>;
interrupts = <0 90 4>;
};
ipc@fff20000 {
compatible = "arm,pl320", "arm,primecell";
reg = <0xfff20000 0x1000>;
interrupts = <0 7 4>;
};
gpioe: gpio@fff30000 {
#gpio-cells = <2>;
compatible = "arm,pl061", "arm,primecell";
gpio-controller;
reg = <0xfff30000 0x1000>;
interrupts = <0 14 4>;
};
gpiof: gpio@fff31000 {
#gpio-cells = <2>;
compatible = "arm,pl061", "arm,primecell";
gpio-controller;
reg = <0xfff31000 0x1000>;
interrupts = <0 15 4>;
};
gpiog: gpio@fff32000 {
#gpio-cells = <2>;
compatible = "arm,pl061", "arm,primecell";
gpio-controller;
reg = <0xfff32000 0x1000>;
interrupts = <0 16 4>;
};
gpioh: gpio@fff33000 {
#gpio-cells = <2>;
compatible = "arm,pl061", "arm,primecell";
gpio-controller;
reg = <0xfff33000 0x1000>;
interrupts = <0 17 4>;
};
timer {
compatible = "arm,sp804", "arm,primecell";
reg = <0xfff34000 0x1000>;
interrupts = <0 18 4>;
};
rtc@fff35000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0xfff35000 0x1000>;
interrupts = <0 19 4>;
};
serial@fff36000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xfff36000 0x1000>;
interrupts = <0 20 4>;
};
smic@fff3a000 {
compatible = "ipmi-smic";
device_type = "ipmi";
reg = <0xfff3a000 0x1000>;
interrupts = <0 24 4>;
reg-size = <4>;
reg-spacing = <4>;
};
sregs@fff3c000 {
compatible = "calxeda,hb-sregs";
reg = <0xfff3c000 0x1000>;
};
dma@fff3d000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xfff3d000 0x1000>;
interrupts = <0 92 4>;
};
ethernet@fff50000 {
compatible = "calxeda,hb-xgmac";
reg = <0xfff50000 0x1000>;
interrupts = <0 77 4 0 78 4 0 79 4>;
};
ethernet@fff51000 {
compatible = "calxeda,hb-xgmac";
reg = <0xfff51000 0x1000>;
interrupts = <0 80 4 0 81 4 0 82 4>;
};
};
};

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/*
* Copyright 2012 Sascha Hauer, Pengutronix
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx27.dtsi"
/ {
model = "Phytec pcm038";
compatible = "phytec,imx27-pcm038", "fsl,imx27";
memory {
reg = <0x0 0x0>;
};
soc {
aipi@10000000 { /* aipi */
wdog@10002000 {
status = "okay";
};
uart@1000a000 {
fsl,uart-has-rtscts;
status = "okay";
};
uart@1000b000 {
fsl,uart-has-rtscts;
status = "okay";
};
uart@1000c000 {
fsl,uart-has-rtscts;
status = "okay";
};
fec@1002b000 {
status = "okay";
};
i2c@1001d000 {
clock-frequency = <400000>;
status = "okay";
at24@4c {
compatible = "at,24c32";
pagesize = <32>;
reg = <0x52>;
};
pcf8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
lm75@4a {
compatible = "national,lm75";
reg = <0x4a>;
};
};
};
};
nor_flash@c0000000 {
compatible = "cfi-flash";
bank-width = <2>;
reg = <0xc0000000 0x02000000>;
#address-cells = <1>;
#size-cells = <1>;
};
};

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/*
* Copyright 2012 Sascha Hauer, Pengutronix
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/include/ "skeleton.dtsi"
/ {
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
};
avic: avic-interrupt-controller@e0000000 {
compatible = "fsl,imx27-avic", "fsl,avic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x10040000 0x1000>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock";
clock-frequency = <26000000>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&avic>;
ranges;
aipi@10000000 { /* AIPI1 */
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x10000000 0x10000000>;
ranges;
wdog@10002000 {
compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
reg = <0x10002000 0x4000>;
interrupts = <27>;
status = "disabled";
};
uart1: uart@1000a000 {
compatible = "fsl,imx27-uart", "fsl,imx21-uart";
reg = <0x1000a000 0x1000>;
interrupts = <20>;
status = "disabled";
};
uart2: uart@1000b000 {
compatible = "fsl,imx27-uart", "fsl,imx21-uart";
reg = <0x1000b000 0x1000>;
interrupts = <19>;
status = "disabled";
};
uart3: uart@1000c000 {
compatible = "fsl,imx27-uart", "fsl,imx21-uart";
reg = <0x1000c000 0x1000>;
interrupts = <18>;
status = "disabled";
};
uart4: uart@1000d000 {
compatible = "fsl,imx27-uart", "fsl,imx21-uart";
reg = <0x1000d000 0x1000>;
interrupts = <17>;
status = "disabled";
};
cspi1: cspi@1000e000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-cspi";
reg = <0x1000e000 0x1000>;
interrupts = <16>;
status = "disabled";
};
cspi2: cspi@1000f000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-cspi";
reg = <0x1000f000 0x1000>;
interrupts = <15>;
status = "disabled";
};
i2c1: i2c@10012000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
reg = <0x10012000 0x1000>;
interrupts = <12>;
status = "disabled";
};
gpio1: gpio@10015000 {
compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
reg = <0x10015000 0x100>;
interrupts = <8>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@10015100 {
compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
reg = <0x10015100 0x100>;
interrupts = <8>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@10015200 {
compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
reg = <0x10015200 0x100>;
interrupts = <8>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@10015300 {
compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
reg = <0x10015300 0x100>;
interrupts = <8>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio5: gpio@10015400 {
compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
reg = <0x10015400 0x100>;
interrupts = <8>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio6: gpio@10015500 {
compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
reg = <0x10015500 0x100>;
interrupts = <8>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
cspi3: cspi@10017000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-cspi";
reg = <0x10017000 0x1000>;
interrupts = <6>;
status = "disabled";
};
uart5: uart@1001b000 {
compatible = "fsl,imx27-uart", "fsl,imx21-uart";
reg = <0x1001b000 0x1000>;
interrupts = <49>;
status = "disabled";
};
uart6: uart@1001c000 {
compatible = "fsl,imx27-uart", "fsl,imx21-uart";
reg = <0x1001c000 0x1000>;
interrupts = <48>;
status = "disabled";
};
i2c2: i2c@1001d000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
reg = <0x1001d000 0x1000>;
interrupts = <1>;
status = "disabled";
};
fec: fec@1002b000 {
compatible = "fsl,imx27-fec";
reg = <0x1002b000 0x4000>;
interrupts = <50>;
status = "disabled";
};
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx51.dtsi"
/ {
model = "Freescale i.MX51 Babbage Board";
compatible = "fsl,imx51-babbage", "fsl,imx51";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
};
memory {
reg = <0x90000000 0x20000000>;
};
soc {
aips@70000000 { /* aips-1 */
spba@70000000 {
esdhc@70004000 { /* ESDHC1 */
fsl,cd-internal;
fsl,wp-internal;
status = "okay";
};
esdhc@70008000 { /* ESDHC2 */
cd-gpios = <&gpio1 6 0>;
wp-gpios = <&gpio1 5 0>;
status = "okay";
};
uart3: uart@7000c000 {
fsl,uart-has-rtscts;
status = "okay";
};
ecspi@70010000 { /* ECSPI1 */
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
status = "okay";
pmic: mc13892@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mc13892";
spi-max-frequency = <6000000>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <8>;
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1375000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: sw2 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: sw3 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
vpll_reg: vpll {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
vdig_reg: vdig {
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
};
vsd_reg: vsd {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3150000>;
};
vusb2_reg: vusb2 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <2775000>;
regulator-boot-on;
regulator-always-on;
};
vvideo_reg: vvideo {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
};
vaudio_reg: vaudio {
regulator-min-microvolt = <2300000>;
regulator-max-microvolt = <3000000>;
};
vcam_reg: vcam {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3000000>;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3150000>;
regulator-always-on;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
};
};
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
};
wdog@73f98000 { /* WDOG1 */
status = "okay";
};
iomuxc@73fa8000 {
compatible = "fsl,imx51-iomuxc-babbage";
reg = <0x73fa8000 0x4000>;
};
uart1: uart@73fbc000 {
fsl,uart-has-rtscts;
status = "okay";
};
uart2: uart@73fc0000 {
status = "okay";
};
};
aips@80000000 { /* aips-2 */
sdma@83fb0000 {
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
};
i2c@83fc4000 { /* I2C2 */
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
};
fec@83fec000 {
phy-mode = "mii";
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power Button";
gpios = <&gpio2 21 0>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/include/ "skeleton.dtsi"
/ {
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
};
tzic: tz-interrupt-controller@e0000000 {
compatible = "fsl,imx51-tzic", "fsl,tzic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xe0000000 0x4000>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
clock-frequency = <22579200>;
};
ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock";
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
clock-frequency = <24000000>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&tzic>;
ranges;
aips@70000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x70000000 0x10000000>;
ranges;
spba@70000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x70000000 0x40000>;
ranges;
esdhc@70004000 { /* ESDHC1 */
compatible = "fsl,imx51-esdhc";
reg = <0x70004000 0x4000>;
interrupts = <1>;
status = "disabled";
};
esdhc@70008000 { /* ESDHC2 */
compatible = "fsl,imx51-esdhc";
reg = <0x70008000 0x4000>;
interrupts = <2>;
status = "disabled";
};
uart3: uart@7000c000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x7000c000 0x4000>;
interrupts = <33>;
status = "disabled";
};
ecspi@70010000 { /* ECSPI1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-ecspi";
reg = <0x70010000 0x4000>;
interrupts = <36>;
status = "disabled";
};
esdhc@70020000 { /* ESDHC3 */
compatible = "fsl,imx51-esdhc";
reg = <0x70020000 0x4000>;
interrupts = <3>;
status = "disabled";
};
esdhc@70024000 { /* ESDHC4 */
compatible = "fsl,imx51-esdhc";
reg = <0x70024000 0x4000>;
interrupts = <4>;
status = "disabled";
};
};
gpio1: gpio@73f84000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f84000 0x4000>;
interrupts = <50 51>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@73f88000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f88000 0x4000>;
interrupts = <52 53>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@73f8c000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f8c000 0x4000>;
interrupts = <54 55>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@73f90000 {
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
reg = <0x73f90000 0x4000>;
interrupts = <56 57>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
wdog@73f98000 { /* WDOG1 */
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f98000 0x4000>;
interrupts = <58>;
status = "disabled";
};
wdog@73f9c000 { /* WDOG2 */
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f9c000 0x4000>;
interrupts = <59>;
status = "disabled";
};
uart1: uart@73fbc000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x73fbc000 0x4000>;
interrupts = <31>;
status = "disabled";
};
uart2: uart@73fc0000 {
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
reg = <0x73fc0000 0x4000>;
interrupts = <32>;
status = "disabled";
};
};
aips@80000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x80000000 0x10000000>;
ranges;
ecspi@83fac000 { /* ECSPI2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-ecspi";
reg = <0x83fac000 0x4000>;
interrupts = <37>;
status = "disabled";
};
sdma@83fb0000 {
compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
reg = <0x83fb0000 0x4000>;
interrupts = <6>;
};
cspi@83fc0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
reg = <0x83fc0000 0x4000>;
interrupts = <38>;
status = "disabled";
};
i2c@83fc4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
reg = <0x83fc4000 0x4000>;
interrupts = <63>;
status = "disabled";
};
i2c@83fc8000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
reg = <0x83fc8000 0x4000>;
interrupts = <62>;
status = "disabled";
};
fec@83fec000 {
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
reg = <0x83fec000 0x4000>;
interrupts = <87>;
status = "disabled";
};
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx53.dtsi"
/ {
model = "Freescale i.MX53 Automotive Reference Design Board";
compatible = "fsl,imx53-ard", "fsl,imx53";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
};
memory {
reg = <0x70000000 0x40000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio1 1 0>;
wp-gpios = <&gpio1 9 0>;
status = "okay";
};
};
wdog@53f98000 { /* WDOG1 */
status = "okay";
};
iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc-ard";
reg = <0x53fa8000 0x4000>;
};
uart1: uart@53fbc000 {
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
sdma@63fb0000 {
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
};
};
};
eim-cs1@f4000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,eim-bus", "simple-bus";
reg = <0xf4000000 0x3ff0000>;
ranges;
lan9220@f4000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0xf4000000 0x2000000>;
phy-mode = "mii";
interrupt-parent = <&gpio2>;
interrupts = <31>;
reg-io-width = <4>;
smsc,irq-push-pull;
};
};
gpio-keys {
compatible = "gpio-keys";
home {
label = "Home";
gpios = <&gpio5 10 0>;
linux,code = <102>; /* KEY_HOME */
gpio-key,wakeup;
};
back {
label = "Back";
gpios = <&gpio5 11 0>;
linux,code = <158>; /* KEY_BACK */
gpio-key,wakeup;
};
program {
label = "Program";
gpios = <&gpio5 12 0>;
linux,code = <362>; /* KEY_PROGRAM */
gpio-key,wakeup;
};
volume-up {
label = "Volume Up";
gpios = <&gpio5 13 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio4 0 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx53.dtsi"
/ {
model = "Freescale i.MX53 Evaluation Kit";
compatible = "fsl,imx53-evk", "fsl,imx53";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
};
memory {
reg = <0x70000000 0x80000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio3 14 0>;
status = "okay";
};
ecspi@50010000 { /* ECSPI1 */
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
esdhc@50020000 { /* ESDHC3 */
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
};
wdog@53f98000 { /* WDOG1 */
status = "okay";
};
iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc-evk";
reg = <0x53fa8000 0x4000>;
};
uart1: uart@53fbc000 {
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
sdma@63fb0000 {
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
};
i2c@63fc4000 { /* I2C2 */
status = "okay";
pmic: mc13892@08 {
compatible = "fsl,mc13892", "fsl,mc13xxx";
reg = <0x08>;
};
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
};
fec@63fec000 {
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
};
leds {
compatible = "gpio-leds";
green {
label = "Heartbeat";
gpios = <&gpio7 7 0>;
linux,default-trigger = "heartbeat";
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx53.dtsi"
/ {
model = "Freescale i.MX53 Quick Start Board";
compatible = "fsl,imx53-qsb", "fsl,imx53";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
};
memory {
reg = <0x70000000 0x40000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio3 13 0>;
status = "okay";
};
esdhc@50020000 { /* ESDHC3 */
cd-gpios = <&gpio3 11 0>;
wp-gpios = <&gpio3 12 0>;
status = "okay";
};
};
wdog@53f98000 { /* WDOG1 */
status = "okay";
};
iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc-qsb";
reg = <0x53fa8000 0x4000>;
};
uart1: uart@53fbc000 {
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
sdma@63fb0000 {
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
};
i2c@63fc4000 { /* I2C2 */
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
};
i2c@63fc8000 { /* I2C1 */
status = "okay";
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
pmic: dialog@48 {
compatible = "dialog,da9053", "dialog,da9052";
reg = <0x48>;
};
};
fec@63fec000 {
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power Button";
gpios = <&gpio1 8 0>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
volume-up {
label = "Volume Up";
gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};
leds {
compatible = "gpio-leds";
user {
label = "Heartbeat";
gpios = <&gpio7 7 0>;
linux,default-trigger = "heartbeat";
};
};
};

168
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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx53.dtsi"
/ {
model = "Freescale i.MX53 Smart Mobile Reference Design Board";
compatible = "fsl,imx53-smd", "fsl,imx53";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
};
memory {
reg = <0x70000000 0x40000000>;
};
soc {
aips@50000000 { /* AIPS1 */
spba@50000000 {
esdhc@50004000 { /* ESDHC1 */
cd-gpios = <&gpio3 13 0>;
wp-gpios = <&gpio4 11 0>;
status = "okay";
};
esdhc@50008000 { /* ESDHC2 */
fsl,card-wired;
status = "okay";
};
uart3: uart@5000c000 {
fsl,uart-has-rtscts;
status = "okay";
};
ecspi@50010000 { /* ECSPI1 */
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
status = "okay";
zigbee: mc1323@0 {
compatible = "fsl,mc1323";
spi-max-frequency = <8000000>;
reg = <0>;
};
flash: m25p32@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "st,m25p";
spi-max-frequency = <20000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
esdhc@50020000 { /* ESDHC3 */
fsl,card-wired;
status = "okay";
};
};
wdog@53f98000 { /* WDOG1 */
status = "okay";
};
iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc-smd";
reg = <0x53fa8000 0x4000>;
};
uart1: uart@53fbc000 {
status = "okay";
};
uart2: uart@53fc0000 {
status = "okay";
};
};
aips@60000000 { /* AIPS2 */
sdma@63fb0000 {
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
};
i2c@63fc4000 { /* I2C2 */
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
};
magnetometer: mag3110@0e {
compatible = "fsl,mag3110";
reg = <0x0e>;
};
touchkey: mpr121@5a {
compatible = "fsl,mpr121";
reg = <0x5a>;
};
};
i2c@63fc8000 { /* I2C1 */
status = "okay";
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
camera: ov5642@3c {
compatible = "ovti,ov5642";
reg = <0x3c>;
};
pmic: dialog@48 {
compatible = "dialog,da9053", "dialog,da9052";
reg = <0x48>;
};
};
fec@63fec000 {
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
volume-up {
label = "Volume Up";
gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
};
volume-down {
label = "Volume Down";
gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/include/ "skeleton.dtsi"
/ {
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
};
tzic: tz-interrupt-controller@0fffc000 {
compatible = "fsl,imx53-tzic", "fsl,tzic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x0fffc000 0x4000>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
clock-frequency = <22579200>;
};
ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock";
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
clock-frequency = <24000000>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&tzic>;
ranges;
aips@50000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x50000000 0x10000000>;
ranges;
spba@50000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x50000000 0x40000>;
ranges;
esdhc@50004000 { /* ESDHC1 */
compatible = "fsl,imx53-esdhc";
reg = <0x50004000 0x4000>;
interrupts = <1>;
status = "disabled";
};
esdhc@50008000 { /* ESDHC2 */
compatible = "fsl,imx53-esdhc";
reg = <0x50008000 0x4000>;
interrupts = <2>;
status = "disabled";
};
uart3: uart@5000c000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x5000c000 0x4000>;
interrupts = <33>;
status = "disabled";
};
ecspi@50010000 { /* ECSPI1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
reg = <0x50010000 0x4000>;
interrupts = <36>;
status = "disabled";
};
esdhc@50020000 { /* ESDHC3 */
compatible = "fsl,imx53-esdhc";
reg = <0x50020000 0x4000>;
interrupts = <3>;
status = "disabled";
};
esdhc@50024000 { /* ESDHC4 */
compatible = "fsl,imx53-esdhc";
reg = <0x50024000 0x4000>;
interrupts = <4>;
status = "disabled";
};
};
gpio1: gpio@53f84000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f84000 0x4000>;
interrupts = <50 51>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@53f88000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f88000 0x4000>;
interrupts = <52 53>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@53f8c000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f8c000 0x4000>;
interrupts = <54 55>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@53f90000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53f90000 0x4000>;
interrupts = <56 57>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
wdog@53f98000 { /* WDOG1 */
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>;
interrupts = <58>;
status = "disabled";
};
wdog@53f9c000 { /* WDOG2 */
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f9c000 0x4000>;
interrupts = <59>;
status = "disabled";
};
uart1: uart@53fbc000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x53fbc000 0x4000>;
interrupts = <31>;
status = "disabled";
};
uart2: uart@53fc0000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x53fc0000 0x4000>;
interrupts = <32>;
status = "disabled";
};
gpio5: gpio@53fdc000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53fdc000 0x4000>;
interrupts = <103 104>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio6: gpio@53fe0000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53fe0000 0x4000>;
interrupts = <105 106>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio7: gpio@53fe4000 {
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
reg = <0x53fe4000 0x4000>;
interrupts = <107 108>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
i2c@53fec000 { /* I2C3 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
reg = <0x53fec000 0x4000>;
interrupts = <64>;
status = "disabled";
};
uart4: uart@53ff0000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x53ff0000 0x4000>;
interrupts = <13>;
status = "disabled";
};
};
aips@60000000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x60000000 0x10000000>;
ranges;
uart5: uart@63f90000 {
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
reg = <0x63f90000 0x4000>;
interrupts = <86>;
status = "disabled";
};
ecspi@63fac000 { /* ECSPI2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
reg = <0x63fac000 0x4000>;
interrupts = <37>;
status = "disabled";
};
sdma@63fb0000 {
compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
reg = <0x63fb0000 0x4000>;
interrupts = <6>;
};
cspi@63fc0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
reg = <0x63fc0000 0x4000>;
interrupts = <38>;
status = "disabled";
};
i2c@63fc4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
reg = <0x63fc4000 0x4000>;
interrupts = <63>;
status = "disabled";
};
i2c@63fc8000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
reg = <0x63fc8000 0x4000>;
interrupts = <62>;
status = "disabled";
};
fec@63fec000 {
compatible = "fsl,imx53-fec", "fsl,imx25-fec";
reg = <0x63fec000 0x4000>;
interrupts = <87>;
status = "disabled";
};
};
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/imx6q-arm2.dts Normal file
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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx6q.dtsi"
/ {
model = "Freescale i.MX6 Quad Armadillo2 Board";
compatible = "fsl,imx6q-arm2", "fsl,imx6q";
chosen {
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
};
memory {
reg = <0x10000000 0x80000000>;
};
soc {
aips-bus@02100000 { /* AIPS2 */
enet@02188000 {
phy-mode = "rgmii";
local-mac-address = [00 04 9F 01 1B 61];
status = "okay";
};
usdhc@02198000 { /* uSDHC3 */
cd-gpios = <&gpio6 11 0>;
wp-gpios = <&gpio6 14 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
usdhc@0219c000 { /* uSDHC4 */
fsl,card-wired;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
uart4: uart@021f0000 {
status = "okay";
};
};
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
leds {
compatible = "gpio-leds";
debug-led {
label = "Heartbeat";
gpios = <&gpio3 25 0>;
linux,default-trigger = "heartbeat";
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "imx6q.dtsi"
/ {
model = "Freescale i.MX6 Quad SABRE Lite Board";
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
memory {
reg = <0x10000000 0x40000000>;
};
soc {
aips-bus@02100000 { /* AIPS2 */
enet@02188000 {
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
status = "okay";
};
usdhc@02198000 { /* uSDHC3 */
cd-gpios = <&gpio7 0 0>;
wp-gpios = <&gpio7 1 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
usdhc@0219c000 { /* uSDHC4 */
cd-gpios = <&gpio2 6 0>;
wp-gpios = <&gpio2 7 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
uart2: uart@021e8000 {
status = "okay";
};
i2c@021a0000 { /* I2C1 */
status = "okay";
clock-frequency = <100000>;
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
};
};
};
};
regulators {
compatible = "simple-bus";
reg_2p5v: 2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};

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/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/include/ "skeleton.dtsi"
/ {
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
compatible = "arm,cortex-a9";
reg = <1>;
next-level-cache = <&L2>;
};
cpu@2 {
compatible = "arm,cortex-a9";
reg = <2>;
next-level-cache = <&L2>;
};
cpu@3 {
compatible = "arm,cortex-a9";
reg = <3>;
next-level-cache = <&L2>;
};
};
intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
reg = <0x00a01000 0x1000>,
<0x00a00100 0x100>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
clock-frequency = <24000000>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&intc>;
ranges;
timer@00a00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x00a00600 0x20>;
interrupts = <1 13 0xf01>;
};
L2: l2-cache@00a02000 {
compatible = "arm,pl310-cache";
reg = <0x00a02000 0x1000>;
interrupts = <0 92 0x04>;
cache-unified;
cache-level = <2>;
};
aips-bus@02000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x02000000 0x100000>;
ranges;
spba-bus@02000000 {
compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x02000000 0x40000>;
ranges;
spdif@02004000 {
reg = <0x02004000 0x4000>;
interrupts = <0 52 0x04>;
};
ecspi@02008000 { /* eCSPI1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02008000 0x4000>;
interrupts = <0 31 0x04>;
status = "disabled";
};
ecspi@0200c000 { /* eCSPI2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x0200c000 0x4000>;
interrupts = <0 32 0x04>;
status = "disabled";
};
ecspi@02010000 { /* eCSPI3 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02010000 0x4000>;
interrupts = <0 33 0x04>;
status = "disabled";
};
ecspi@02014000 { /* eCSPI4 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02014000 0x4000>;
interrupts = <0 34 0x04>;
status = "disabled";
};
ecspi@02018000 { /* eCSPI5 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
reg = <0x02018000 0x4000>;
interrupts = <0 35 0x04>;
status = "disabled";
};
uart1: uart@02020000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <0 26 0x04>;
status = "disabled";
};
esai@02024000 {
reg = <0x02024000 0x4000>;
interrupts = <0 51 0x04>;
};
ssi@02028000 { /* SSI1 */
reg = <0x02028000 0x4000>;
interrupts = <0 46 0x04>;
};
ssi@0202c000 { /* SSI2 */
reg = <0x0202c000 0x4000>;
interrupts = <0 47 0x04>;
};
ssi@02030000 { /* SSI3 */
reg = <0x02030000 0x4000>;
interrupts = <0 48 0x04>;
};
asrc@02034000 {
reg = <0x02034000 0x4000>;
interrupts = <0 50 0x04>;
};
spba@0203c000 {
reg = <0x0203c000 0x4000>;
};
};
vpu@02040000 {
reg = <0x02040000 0x3c000>;
interrupts = <0 3 0x04 0 12 0x04>;
};
aipstz@0207c000 { /* AIPSTZ1 */
reg = <0x0207c000 0x4000>;
};
pwm@02080000 { /* PWM1 */
reg = <0x02080000 0x4000>;
interrupts = <0 83 0x04>;
};
pwm@02084000 { /* PWM2 */
reg = <0x02084000 0x4000>;
interrupts = <0 84 0x04>;
};
pwm@02088000 { /* PWM3 */
reg = <0x02088000 0x4000>;
interrupts = <0 85 0x04>;
};
pwm@0208c000 { /* PWM4 */
reg = <0x0208c000 0x4000>;
interrupts = <0 86 0x04>;
};
flexcan@02090000 { /* CAN1 */
reg = <0x02090000 0x4000>;
interrupts = <0 110 0x04>;
};
flexcan@02094000 { /* CAN2 */
reg = <0x02094000 0x4000>;
interrupts = <0 111 0x04>;
};
gpt@02098000 {
compatible = "fsl,imx6q-gpt";
reg = <0x02098000 0x4000>;
interrupts = <0 55 0x04>;
};
gpio1: gpio@0209c000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x0209c000 0x4000>;
interrupts = <0 66 0x04 0 67 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@020a0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020a0000 0x4000>;
interrupts = <0 68 0x04 0 69 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@020a4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020a4000 0x4000>;
interrupts = <0 70 0x04 0 71 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@020a8000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020a8000 0x4000>;
interrupts = <0 72 0x04 0 73 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio5: gpio@020ac000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020ac000 0x4000>;
interrupts = <0 74 0x04 0 75 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio6: gpio@020b0000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020b0000 0x4000>;
interrupts = <0 76 0x04 0 77 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio7: gpio@020b4000 {
compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
reg = <0x020b4000 0x4000>;
interrupts = <0 78 0x04 0 79 0x04>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
kpp@020b8000 {
reg = <0x020b8000 0x4000>;
interrupts = <0 82 0x04>;
};
wdog@020bc000 { /* WDOG1 */
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020bc000 0x4000>;
interrupts = <0 80 0x04>;
status = "disabled";
};
wdog@020c0000 { /* WDOG2 */
compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
reg = <0x020c0000 0x4000>;
interrupts = <0 81 0x04>;
status = "disabled";
};
ccm@020c4000 {
compatible = "fsl,imx6q-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>;
};
anatop@020c8000 {
compatible = "fsl,imx6q-anatop";
reg = <0x020c8000 0x1000>;
interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
};
usbphy@020c9000 { /* USBPHY1 */
reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>;
};
usbphy@020ca000 { /* USBPHY2 */
reg = <0x020ca000 0x1000>;
interrupts = <0 45 0x04>;
};
snvs@020cc000 {
reg = <0x020cc000 0x4000>;
interrupts = <0 19 0x04 0 20 0x04>;
};
epit@020d0000 { /* EPIT1 */
reg = <0x020d0000 0x4000>;
interrupts = <0 56 0x04>;
};
epit@020d4000 { /* EPIT2 */
reg = <0x020d4000 0x4000>;
interrupts = <0 57 0x04>;
};
src@020d8000 {
compatible = "fsl,imx6q-src";
reg = <0x020d8000 0x4000>;
interrupts = <0 91 0x04 0 96 0x04>;
};
gpc@020dc000 {
compatible = "fsl,imx6q-gpc";
reg = <0x020dc000 0x4000>;
interrupts = <0 89 0x04 0 90 0x04>;
};
iomuxc@020e0000 {
reg = <0x020e0000 0x4000>;
};
dcic@020e4000 { /* DCIC1 */
reg = <0x020e4000 0x4000>;
interrupts = <0 124 0x04>;
};
dcic@020e8000 { /* DCIC2 */
reg = <0x020e8000 0x4000>;
interrupts = <0 125 0x04>;
};
sdma@020ec000 {
compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
reg = <0x020ec000 0x4000>;
interrupts = <0 2 0x04>;
};
};
aips-bus@02100000 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x02100000 0x100000>;
ranges;
caam@02100000 {
reg = <0x02100000 0x40000>;
interrupts = <0 105 0x04 0 106 0x04>;
};
aipstz@0217c000 { /* AIPSTZ2 */
reg = <0x0217c000 0x4000>;
};
enet@02188000 {
compatible = "fsl,imx6q-fec";
reg = <0x02188000 0x4000>;
interrupts = <0 118 0x04 0 119 0x04>;
status = "disabled";
};
mlb@0218c000 {
reg = <0x0218c000 0x4000>;
interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
};
usdhc@02190000 { /* uSDHC1 */
compatible = "fsl,imx6q-usdhc";
reg = <0x02190000 0x4000>;
interrupts = <0 22 0x04>;
status = "disabled";
};
usdhc@02194000 { /* uSDHC2 */
compatible = "fsl,imx6q-usdhc";
reg = <0x02194000 0x4000>;
interrupts = <0 23 0x04>;
status = "disabled";
};
usdhc@02198000 { /* uSDHC3 */
compatible = "fsl,imx6q-usdhc";
reg = <0x02198000 0x4000>;
interrupts = <0 24 0x04>;
status = "disabled";
};
usdhc@0219c000 { /* uSDHC4 */
compatible = "fsl,imx6q-usdhc";
reg = <0x0219c000 0x4000>;
interrupts = <0 25 0x04>;
status = "disabled";
};
i2c@021a0000 { /* I2C1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
reg = <0x021a0000 0x4000>;
interrupts = <0 36 0x04>;
status = "disabled";
};
i2c@021a4000 { /* I2C2 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
reg = <0x021a4000 0x4000>;
interrupts = <0 37 0x04>;
status = "disabled";
};
i2c@021a8000 { /* I2C3 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
reg = <0x021a8000 0x4000>;
interrupts = <0 38 0x04>;
status = "disabled";
};
romcp@021ac000 {
reg = <0x021ac000 0x4000>;
};
mmdc@021b0000 { /* MMDC0 */
compatible = "fsl,imx6q-mmdc";
reg = <0x021b0000 0x4000>;
};
mmdc@021b4000 { /* MMDC1 */
reg = <0x021b4000 0x4000>;
};
weim@021b8000 {
reg = <0x021b8000 0x4000>;
interrupts = <0 14 0x04>;
};
ocotp@021bc000 {
reg = <0x021bc000 0x4000>;
};
ocotp@021c0000 {
reg = <0x021c0000 0x4000>;
interrupts = <0 21 0x04>;
};
tzasc@021d0000 { /* TZASC1 */
reg = <0x021d0000 0x4000>;
interrupts = <0 108 0x04>;
};
tzasc@021d4000 { /* TZASC2 */
reg = <0x021d4000 0x4000>;
interrupts = <0 109 0x04>;
};
audmux@021d8000 {
reg = <0x021d8000 0x4000>;
};
mipi@021dc000 { /* MIPI-CSI */
reg = <0x021dc000 0x4000>;
};
mipi@021e0000 { /* MIPI-DSI */
reg = <0x021e0000 0x4000>;
};
vdoa@021e4000 {
reg = <0x021e4000 0x4000>;
interrupts = <0 18 0x04>;
};
uart2: uart@021e8000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x4000>;
interrupts = <0 27 0x04>;
status = "disabled";
};
uart3: uart@021ec000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x4000>;
interrupts = <0 28 0x04>;
status = "disabled";
};
uart4: uart@021f0000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x4000>;
interrupts = <0 29 0x04>;
status = "disabled";
};
uart5: uart@021f4000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x4000>;
interrupts = <0 30 0x04>;
status = "disabled";
};
};
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/kirkwood-dreamplug.dts Normal file
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/dts-v1/;
/include/ "kirkwood.dtsi"
/ {
model = "Globalscale Technologies Dreamplug";
compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
};
ocp@f1000000 {
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/kirkwood.dtsi Normal file
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/include/ "skeleton.dtsi"
/ {
compatible = "mrvl,kirkwood";
ocp@f1000000 {
compatible = "simple-bus";
ranges = <0 0xf1000000 0x1000000>;
#address-cells = <1>;
#size-cells = <1>;
serial@12000 {
compatible = "ns16550a";
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <33>;
/* set clock-frequency in board dts */
status = "disabled";
};
serial@12100 {
compatible = "ns16550a";
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <34>;
/* set clock-frequency in board dts */
status = "disabled";
};
rtc@10300 {
compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <53>;
};
};
};

40
kernel/arch/arm/boot/dts/m7350-un-v3/mpq8092-iommu.dtsi Normal file
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "msm-iommu-v1.dtsi"
&jpeg_iommu {
status = "ok";
vdd-supply = <&gdsc_jpeg>;
};
&mdp_iommu {
status = "ok";
vdd-supply = <&gdsc_mdss>;
};
&venus_iommu {
status = "ok";
vdd-supply = <&gdsc_venus>;
};
&kgsl_iommu {
status = "ok";
qcom,needs-alt-core-clk;
vdd-supply = <&gdsc_oxili_cx>;
qcom,alt-vdd-supply = <&gdsc_oxili_gx>;
};
&vfe_iommu {
status = "ok";
vdd-supply = <&gdsc_vfe>;
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,ion {
compatible = "qcom,msm-ion";
#address-cells = <1>;
#size-cells = <0>;
qcom,ion-heap@30 { /* SYSTEM HEAP */
reg = <30>;
};
qcom,ion-heap@21 { /* SYSTEM CONTIG HEAP */
reg = <21>;
};
qcom,ion-heap@25 { /* IOMMU HEAP */
reg = <25>;
};
};
};

324
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* QPNP controlled regulators: */
&spmi_bus {
qcom,pma8084@1 {
pma8084_s1: regulator@1400 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_s3: regulator@1a00 {
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_s4: regulator@1d00 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_s5: regulator@2000 {
regulator-min-microvolt = <2150000>;
regulator-max-microvolt = <2150000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_s6: regulator@2300 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_s8: regulator@2900 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_s12: regulator@3500 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
qcom,enable-time = <500>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_l1: regulator@4000 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
qcom,system-load = <10000>;
status = "okay";
};
pma8084_l2: regulator@4100 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l3: regulator@4200 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l4: regulator@4300 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l6: regulator@4500 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l9: regulator@4800 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l10: regulator@4900 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l11: regulator@4a00 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l12: regulator@4b00 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l13: regulator@4c00 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
status = "okay";
};
pma8084_l14: regulator@4d00 {
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l15: regulator@4e00 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l16: regulator@4f00 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l17: regulator@5000 {
regulator-min-microvolt = <3150000>;
regulator-max-microvolt = <3150000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
qcom,system-load = <100000>;
status = "okay";
};
pma8084_l18: regulator@5100 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l19: regulator@5200 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l20: regulator@5300 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
status = "okay";
};
pma8084_l21: regulator@5400 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
status = "okay";
};
pma8084_l22: regulator@5500 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
status = "okay";
};
pma8084_l23: regulator@5600 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l24: regulator@5700 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
regulator-always-on;
status = "okay";
};
pma8084_l25: regulator@5800 {
parent-supply = <&pma8084_s5>;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l26: regulator@5900 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_l27: regulator@5A00 {
parent-supply = <&pma8084_s3>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs1: regulator@8000 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs2: regulator@8100 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs3: regulator@8200 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_lvs4: regulator@8300 {
parent-supply = <&pma8084_s4>;
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
pma8084_mvs1: regulator@8400 {
qcom,enable-time = <200>;
qcom,pull-down-enable = <1>;
status = "okay";
};
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "mpq8092.dtsi"
/include/ "mpq8092-rumi.dtsi"
/ {
model = "Qualcomm MPQ8092 RUMI";
compatible = "qcom,mpq8092-rumi", "qcom,mpq8092", "qcom,rumi";
qcom,msm-id = <146 16 0>;
};
&soc {
serial@f9922000 {
status = "ok";
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
timer {
clock-frequency = <5000000>;
};
timer@f9020000 {
clock-frequency = <5000000>;
};
usb@f9a55000 {
status = "disable";
};
qcom,sdcc@f9824000 {
status = "disabled";
qcom,clk-rates = <400000 19200000>;
};
qcom,sdcc@f98a4000 {
status = "disabled";
qcom,clk-rates = <400000 19200000>;
};
qcom,sps@f998000 {
status = "disable";
};
spi@f9924000 {
status = "disable";
};
spi@f9923000 {
compatible = "qcom,spi-qup-v2";
reg = <0xf9923000 0x1000>;
interrupts = <0 95 0>;
spi-max-frequency = <24000000>;
#address-cells = <1>;
#size-cells = <0>;
gpios = <&msmgpio 3 0>, /* CLK */
<&msmgpio 1 0>, /* MISO */
<&msmgpio 0 0>; /* MOSI */
cs-gpios = <&msmgpio 9 0>;
ethernet-switch@2 {
compatible = "simtec,ks8851";
reg = <2>;
interrupt-parent = <&msmgpio>;
interrupts = <90 0>;
spi-max-frequency = <5000000>;
};
};
i2c@f9966000 {
status = "disable";
};
i2c@f9967000 {
status = "disable";
cell-index = <0>;
compatible = "qcom,i2c-qup";
reg = <0Xf9967000 0x1000>;
reg-names = "qup_phys_addr";
interrupts = <0 105 0>;
interrupt-names = "qup_err_intr";
qcom,i2c-bus-freq = <100000>;
qcom,i2c-src-freq = <19200000>;
gpios = <&msmgpio 83 0>,/* DAT */
<&msmgpio 84 0>;/* CLK */
};
slim@fe12f000 {
status = "disable";
};
qcom,mdss_dsi@fd922800 {
status = "disable";
};
qcom,spmi@fc4c0000 {
status = "disable";
};
qcom,ssusb@F9200000 {
status = "disable";
};
qcom,lpass@fe200000 {
status = "disable";
};
qcom,pronto@fb21b000 {
status = "disable";
};
qcom,mss@fc880000 {
status = "disable";
};
qcom,kgsl-3d0@fdb00000 {
status = "disabled";
};
};
&gdsc_venus {
status = "disabled";
};
&gdsc_jpeg {
status = "disabled";
};
&gdsc_oxili_gx {
status = "disabled";
};
&gdsc_oxili_cx {
status = "disabled";
};
&gdsc_usb_hsic {
status = "disabled";
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "mpq8092.dtsi"
/ {
model = "Qualcomm MPQ8092 Simulator";
compatible = "qcom,mpq8092-sim", "qcom,mpq8092", "qcom,sim";
qcom,msm-id = <126 16 0>;
};
&soc {
serial@f991f000 {
status = "ok";
};
serial@f995e000 {
status = "ok";
};
};
&pma8084_gpios {
gpio@c000 { /* GPIO 1 */
};
gpio@c100 { /* GPIO 2 */
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
};
gpio@c500 { /* GPIO 6 */
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
};
gpio@c800 { /* GPIO 9 */
};
gpio@c900 { /* GPIO 10 */
};
gpio@ca00 { /* GPIO 11 */
};
gpio@cb00 { /* GPIO 12 */
};
gpio@cc00 { /* GPIO 13 */
};
gpio@cd00 { /* GPIO 14 */
};
gpio@ce00 { /* GPIO 15 */
};
gpio@cf00 { /* GPIO 16 */
};
gpio@d000 { /* GPIO 17 */
};
gpio@d100 { /* GPIO 18 */
};
gpio@d200 { /* GPIO 19 */
};
gpio@d300 { /* GPIO 20 */
};
gpio@d400 { /* GPIO 21 */
};
gpio@d500 { /* GPIO 22 */
};
};
&pma8084_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP5 */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
};
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton.dtsi"
/ {
model = "Qualcomm MPQ8092";
compatible = "qcom,mpq8092";
interrupt-parent = <&intc>;
soc: soc { };
};
/include/ "mpq8092-iommu.dtsi"
/include/ "msm-gdsc.dtsi"
/include/ "mpq8092-ion.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
intc: interrupt-controller@f9000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0xf9000000 0x1000>,
<0xf9002000 0x1000>;
};
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
ngpio = <146>;
interrupts = <0 208 0>;
qcom,direct-connect-irqs = <8>;
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0>, <1 3 0>;
clock-frequency = <19200000>;
};
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "arm,armv7-timer-mem";
reg = <0xf9020000 0x1000>;
clock-frequency = <19200000>;
frame@f9021000 {
frame-number = <0>;
interrupts = <0 8 0x4>,
<0 7 0x4>;
reg = <0xf9021000 0x1000>,
<0xf9022000 0x1000>;
};
frame@f9023000 {
frame-number = <1>;
interrupts = <0 9 0x4>;
reg = <0xf9023000 0x1000>;
status = "disabled";
};
frame@f9024000 {
frame-number = <2>;
interrupts = <0 10 0x4>;
reg = <0xf9024000 0x1000>;
status = "disabled";
};
frame@f9025000 {
frame-number = <3>;
interrupts = <0 11 0x4>;
reg = <0xf9025000 0x1000>;
status = "disabled";
};
frame@f9026000 {
frame-number = <4>;
interrupts = <0 12 0x4>;
reg = <0xf9026000 0x1000>;
status = "disabled";
};
frame@f9027000 {
frame-number = <5>;
interrupts = <0 13 0x4>;
reg = <0xf9027000 0x1000>;
status = "disabled";
};
frame@f9028000 {
frame-number = <6>;
interrupts = <0 14 0x4>;
reg = <0xf9028000 0x1000>;
status = "disabled";
};
};
serial@f991f000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf991f000 0x1000>;
interrupts = <0 109 0>;
status = "disabled";
};
serial@f9922000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf9922000 0x1000>;
interrupts = <0 112 0>;
status = "disabled";
};
serial@f995e000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf995e000 0x1000>;
interrupts = <0 114 0>;
status = "disabled";
};
qcom,msm-imem@fe805000 {
compatible = "qcom,msm-imem";
reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
};
spmi_bus: qcom,spmi@fc4c0000 {
cell-index = <0>;
compatible = "qcom,spmi-pmic-arb";
reg-names = "core", "intr", "cnfg";
reg = <0xfc4cf000 0x1000>,
<0Xfc4cb000 0x1000>,
<0Xfc4ca000 0x1000>;
/* 190,ee0_krait_hlos_spmi_periph_irq */
/* 187,channel_0_krait_hlos_trans_done_irq */
interrupts = <0 190 0 0 187 0>;
qcom,not-wakeup;
qcom,pmic-arb-ee = <0>;
qcom,pmic-arb-channel = <0>;
};
sdcc1: qcom,sdcc@f9824000 {
cell-index = <1>; /* SDC1 eMMC slot */
compatible = "qcom,msm-sdcc";
reg = <0xf9824000 0x800>;
reg-names = "core_mem";
interrupts = <0 123 0>;
interrupt-names = "core_irq";
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-width = <8>;
qcom,nonremovable;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
};
sdcc2: qcom,sdcc@f98a4000 {
cell-index = <2>; /* SDC2 SD card slot */
compatible = "qcom,msm-sdcc";
reg = <0xf98a4000 0x800>;
reg-names = "core_mem";
interrupts = <0 125 0>;
interrupt-names = "core_irq";
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-width = <4>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <800>;
};
sata: sata@fc580000 {
compatible = "qcom,msm-ahci";
reg = <0xfc580000 0x17c>;
interrupts = <0 243 0>;
};
qcom,wdt@f9017000 {
compatible = "qcom,msm-watchdog";
reg = <0xf9017000 0x1000>;
interrupts = <0 3 0>, <0 4 0>;
qcom,bark-time = <11000>;
qcom,pet-time = <10000>;
qcom,ipi-ping;
};
};
&gdsc_venus {
status = "ok";
};
&gdsc_mdss {
status = "ok";
};
&gdsc_jpeg {
status = "ok";
};
&gdsc_oxili_gx {
status = "ok";
};
&gdsc_oxili_cx {
status = "ok";
};
&gdsc_usb_hsic {
status = "ok";
};
/include/ "msm-pma8084.dtsi"
/include/ "mpq8092-regulator.dtsi"

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/*
* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
gdsc_venus: qcom,gdsc@fd8c1024 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_venus";
reg = <0xfd8c1024 0x4>;
status = "disabled";
};
gdsc_mdss: qcom,gdsc@fd8c2304 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_mdss";
reg = <0xfd8c2304 0x4>;
status = "disabled";
};
gdsc_jpeg: qcom,gdsc@fd8c35a4 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_jpeg";
reg = <0xfd8c35a4 0x4>;
status = "disabled";
};
gdsc_vfe: qcom,gdsc@fd8c36a4 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_vfe";
reg = <0xfd8c36a4 0x4>;
status = "disabled";
};
gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_oxili_gx";
reg = <0xfd8c4024 0x4>;
status = "disabled";
};
gdsc_oxili_cx: qcom,gdsc@fd8c4034 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_oxili_cx";
reg = <0xfd8c4034 0x4>;
status = "disabled";
};
gdsc_usb_hsic: qcom,gdsc@fc400404 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_usb_hsic";
reg = <0xfc400404 0x4>;
status = "disabled";
};
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
lpass_iommu: qcom,iommu@fd000000 {
compatible = "qcom,msm-smmu-v0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd000000 0x10000>;
interrupts = <0 248 0>;
qcom,glb-offset = <0xF000>;
label = "lpass_iommu";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <4>;
qcom,iommu-pmu-event-classes = <0x08
0x09
0x10
0x12
0x80>;
qcom,msm-bus,name = "lpass_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<11 512 0 0>,
<11 512 0 1000>;
status = "disabled";
lpass_q6_fw: qcom,iommu-ctx@fd000000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd000000 0x1000>;
interrupts = <0 250 0>;
qcom,iommu-ctx-mids = <0 15>;
label = "q6_fw";
};
lpass_audio_shared: qcom,iommu-ctx@fd001000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd001000 0x1000>;
interrupts = <0 250 0>;
qcom,iommu-ctx-mids = <1>;
label = "audio_shared";
};
lpass_video_shared: qcom,iommu-ctx@fd002000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd002000 0x1000>;
interrupts = <0 250 0>;
qcom,iommu-ctx-mids = <2>;
label = "video_shared";
};
lpass_q6_spare: qcom,iommu-ctx@fd003000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd003000 0x1000>;
interrupts = <0 250 0>;
qcom,iommu-ctx-mids = <3 4 5 6 7 8 9 10 11 12 13 14>;
label = "q6_spare";
};
};
copss_iommu: qcom,iommu@fd010000 {
compatible = "qcom,msm-smmu-v0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd010000 0x10000>;
interrupts = <0 252 0>;
qcom,glb-offset = <0xF000>;
label = "copss_iommu";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <4>;
qcom,iommu-pmu-event-classes = <0x08
0x09
0x10
0x12
0x80>;
qcom,msm-bus,name = "copss_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<88 512 0 0>,
<88 512 0 1000>;
status = "disabled";
qcom,iommu-ctx@fd010000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd010000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <0>;
label = "copss_0";
};
qcom,iommu-ctx@fd011000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd011000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <1>;
label = "copss_1";
};
qcom,iommu-ctx@fd012000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd012000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <2>;
label = "copss_2";
};
qcom,iommu-ctx@fd013000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd013000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <3>;
label = "copss_3";
};
qcom,iommu-ctx@fd014000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd014000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <4>;
label = "copss_4";
};
qcom,iommu-ctx@fd015000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd015000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <5>;
label = "copss_5";
};
qcom,iommu-ctx@fd016000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd016000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <6>;
label = "copss_6";
};
qcom,iommu-ctx@fd017000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd017000 0x1000>;
interrupts = <0 254 0>;
qcom,iommu-ctx-mids = <7>;
label = "copss_7";
};
};
mdpe_iommu: qcom,iommu@fd860000 {
compatible = "qcom,msm-smmu-v0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd860000 0x10000>;
interrupts = <0 245 0>;
qcom,glb-offset = <0xF000>;
label = "mdpe_iommu";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <4>;
qcom,iommu-pmu-event-classes = <0x08
0x09
0x10
0x12
0x80>;
qcom,msm-bus,name = "mdpe_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<92 512 0 0>,
<92 512 0 1000>;
status = "disabled";
qcom,iommu-ctx@fd860000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd860000 0x1000>;
interrupts = <0 247 0>;
qcom,iommu-ctx-mids = <0 1 3>;
label = "mdpe_0";
};
qcom,iommu-ctx@fd861000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd861000 0x1000>;
interrupts = <0 247 0>;
qcom,iommu-ctx-mids = <2>;
label = "mdpe_1";
};
};
mdps_iommu: qcom,iommu@fd870000 {
compatible = "qcom,msm-smmu-v0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd870000 0x10000>;
interrupts = <0 73 0>;
qcom,glb-offset = <0xF000>;
label = "mdps_iommu";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <4>;
qcom,iommu-pmu-event-classes = <0x08
0x09
0x10
0x12
0x80>;
qcom,msm-bus,name = "mdps_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<22 512 0 0>,
<22 512 0 1000>;
status = "disabled";
qcom,iommu-ctx@fd870000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd870000 0x1000>;
interrupts = <0 47 0>;
qcom,iommu-ctx-mids = <0>;
label = "mdps_0";
};
qcom,iommu-ctx@fd871000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd871000 0x1000>;
interrupts = <0 47 0>;
qcom,iommu-ctx-mids = <1>;
label = "mdps_1";
};
};
gfx_iommu: qcom,iommu@fd880000 {
compatible = "qcom,msm-smmu-v0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd880000 0x10000>;
interrupts = <0 38 0>;
qcom,glb-offset = <0xF000>;
qcom,needs-alt-core-clk;
label = "gfx_iommu";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <4>;
qcom,iommu-pmu-event-classes = <0x08
0x09
0x10
0x12
0x80>;
qcom,msm-bus,name = "gfx_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<26 512 0 0>,
<26 512 0 1000>;
status = "disabled";
qcom,iommu-ctx@fd880000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd880000 0x1000>;
interrupts = <0 241 0>;
qcom,iommu-ctx-mids = <0 1 2 3 4 5 6 7 8 9 10 11 12 13
14 15>;
label = "gfx3d_user";
};
qcom,iommu-ctx@fd881000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd881000 0x1000>;
interrupts = <0 241 0>;
qcom,iommu-ctx-mids = <16 17 18 19 20 21 22 23 24 25
26 27 28 29 30 31>;
label = "gfx3d_priv";
};
qcom,iommu-ctx@fd882000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd882000 0x1000>;
interrupts = <0 241 0>;
qcom,iommu-ctx-mids = <>;
label = "gfx3d_spare";
};
};
vfe_iommu: qcom,iommu@fd890000 {
compatible = "qcom,msm-smmu-v0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd890000 0x10000>;
interrupts = <0 62 0>;
qcom,glb-offset = <0xF000>;
label = "vfe_iommu";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <4>;
qcom,iommu-pmu-event-classes = <0x08
0x09
0x10
0x12
0x80>;
qcom,msm-bus,name = "vfe_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<29 512 0 0>,
<29 512 0 1000>;
status = "disabled";
qcom,iommu-ctx@fd890000 {
compatible = "qcom,msm-smmu-v0-ctx";
reg = <0xfd890000 0x1000>;
interrupts = <0 65 0>;
qcom,iommu-ctx-mids = <0 1 2 3 4 5 6 7 8 9>;
label = "vfe0";
};
};
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
jpeg_iommu: qcom,iommu@fda64000 {
compatible = "qcom,msm-smmu-v1";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfda64000 0x10000>;
reg-names = "iommu_base";
interrupts = <0 67 0>;
qcom,needs-alt-core-clk;
label = "jpeg_iommu";
status = "disabled";
qcom,msm-bus,name = "jpeg_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<62 512 0 0>,
<62 512 0 1000>;
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <8>;
qcom,iommu-pmu-event-classes = <0x00
0x01
0x08
0x09
0x0A
0x10
0x11
0x12
0x80
0x81
0x82
0x83
0x90
0x91
0x92
0xb0
0xb1>;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x2314
0x2394
0x2414
0x20ac
0x215c
0x220c
0x2008
0x200c
0x2010
0x2014>;
qcom,iommu-bfb-data = <0x0000ffff
0x0
0x4
0x4
0x0
0x0
0x10
0x50
0x0
0x10
0x20
0x0
0x0
0x0
0x0>;
qcom,iommu-ctx@fda6c000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfda6c000 0x1000>;
interrupts = <0 70 0>;
qcom,iommu-ctx-sids = <0>;
label = "jpeg_enc0";
};
qcom,iommu-ctx@fda6d000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfda6d000 0x1000>;
interrupts = <0 70 0>;
qcom,iommu-ctx-sids = <1>;
label = "jpeg_enc1";
};
qcom,iommu-ctx@fda6e000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfda6e000 0x1000>;
interrupts = <0 70 0>;
qcom,iommu-ctx-sids = <2>;
label = "jpeg_dec";
};
};
mdp_iommu: qcom,iommu@fd928000 {
compatible = "qcom,msm-smmu-v1";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfd928000 0x10000>;
reg-names = "iommu_base";
interrupts = <0 73 0>;
qcom,iommu-secure-id = <1>;
label = "mdp_iommu";
qcom,msm-bus,name = "mdp_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<22 512 0 0>,
<22 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <8>;
qcom,iommu-pmu-event-classes = <0x00
0x01
0x08
0x09
0x0A
0x10
0x11
0x12
0x80
0x81
0x82
0x83
0x90
0x91
0x92
0xb0
0xb1>;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x20ac
0x215c
0x220c
0x2314
0x2394
0x2414
0x2008
0x200c
0x2010
0x2014
0x2018
0x201c
0x2020>;
qcom,iommu-bfb-data = <0xffffffff
0x0
0x00000004
0x00000010
0x00000000
0x00000000
0x00000034
0x00000044
0x0
0x34
0x74
0x0
0x0
0x0
0x0
0x0
0x0
0x0>;
qcom,iommu-ctx@fd930000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfd930000 0x1000>;
interrupts = <0 47 0>;
qcom,iommu-ctx-sids = <0>;
label = "mdp_0";
};
qcom,iommu-ctx@fd931000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfd931000 0x1000>;
interrupts = <0 47 0>, <0 46 0>;
qcom,iommu-ctx-sids = <1>;
label = "mdp_1";
qcom,secure-context;
};
qcom,iommu-ctx@fd932000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfd932000 0x1000>;
interrupts = <0 47 0>, <0 46 0>;
qcom,iommu-ctx-sids = <>;
label = "mdp_2";
qcom,secure-context;
};
};
venus_iommu: qcom,iommu@fdc84000 {
compatible = "qcom,msm-smmu-v1";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfdc84000 0x10000
0xfdce0004 0x4>;
reg-names = "iommu_base", "clk_base";
interrupts = <0 45 0>;
qcom,iommu-secure-id = <0>;
qcom,needs-alt-core-clk;
label = "venus_iommu";
qcom,msm-bus,name = "venus_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<63 512 0 0>,
<63 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <8>;
qcom,iommu-pmu-event-classes = <0x00
0x01
0x08
0x09
0x0A
0x10
0x11
0x12
0x80
0x81
0x82
0x83
0x90
0x91
0x92
0xb0
0xb1>;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x20ac
0x215c
0x220c
0x2314
0x2394
0x2414
0x2008
0x200c
0x2010
0x2014
0x2018
0x201c
0x2020
0x2024
0x2028
0x202c
0x2030
0x2034
0x2038>;
qcom,iommu-bfb-data = <0xffffffff
0xffffffff
0x00000004
0x00000008
0x00000000
0x00000000
0x00000094
0x000000b4
0x0
0x94
0x114
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0>;
venus_ns: qcom,iommu-ctx@fdc8c000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfdc8c000 0x1000>;
interrupts = <0 42 0>;
qcom,iommu-ctx-sids = <0 1 2 3 4 5>;
label = "venus_ns";
};
venus_cp: qcom,iommu-ctx@fdc8d000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfdc8d000 0x1000>;
interrupts = <0 42 0>, <0 43 0>;
qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x85>;
label = "venus_cp";
qcom,secure-context;
};
venus_fw: qcom,iommu-ctx@fdc8e000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfdc8e000 0x1000>;
interrupts = <0 42 0>, <0 43 0>;
qcom,iommu-ctx-sids = <0xc0 0xc6>;
label = "venus_fw";
qcom,secure-context;
};
};
kgsl_iommu: qcom,iommu@fdb10000 {
compatible = "qcom,msm-smmu-v1";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfdb10000 0x10000>;
reg-names = "iommu_base";
interrupts = <0 38 0>;
label = "kgsl_iommu";
qcom,msm-bus,name = "kgsl_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<26 512 0 0>,
<26 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <8>;
qcom,iommu-pmu-event-classes = <0x00
0x01
0x08
0x09
0x0A
0x10
0x11
0x12
0x80
0x81
0x82
0x83
0x90
0x91
0x92
0xb0
0xb1>;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x20ac
0x215c
0x220c
0x2314
0x2394
0x2414
0x2008>;
qcom,iommu-bfb-data = <0x00000003
0x0
0x00000004
0x00000010
0x00000000
0x00000000
0x00000001
0x00000021
0x0
0x1
0x81
0x0>;
qcom,iommu-ctx@fdb18000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfdb18000 0x1000>;
interrupts = <0 241 0>;
qcom,iommu-ctx-sids = <0>;
label = "gfx3d_user";
};
qcom,iommu-ctx@fdb19000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfdb19000 0x1000>;
interrupts = <0 241 0>;
qcom,iommu-ctx-sids = <1>;
label = "gfx3d_priv";
};
};
vfe_iommu: qcom,iommu@fda44000 {
compatible = "qcom,msm-smmu-v1";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = <0xfda44000 0x10000>;
reg-names = "iommu_base";
interrupts = <0 62 0>;
qcom,needs-alt-core-clk;
label = "vfe_iommu";
qcom,msm-bus,name = "vfe_ebi";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,active-only;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<29 512 0 0>,
<29 512 0 1000>;
status = "disabled";
qcom,iommu-pmu-ngroups = <1>;
qcom,iommu-pmu-ncounters = <8>;
qcom,iommu-pmu-event-classes = <0x00
0x01
0x08
0x09
0x0A
0x10
0x11
0x12
0x80
0x81
0x82
0x83
0x90
0x91
0x92
0xb0
0xb1>;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x2314
0x2394
0x2414
0x20ac
0x215c
0x220c
0x2008
0x200c
0x2010
0x2014
0x2018
0x201c
0x2020>;
qcom,iommu-bfb-data = <0xffffffff
0x00000000
0x4
0x8
0x0
0x0
0x20
0x78
0x0
0x20
0x36
0x0
0x0
0x0
0x0
0x0
0x0
0x0>;
qcom,iommu-ctx@fda4c000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfda4c000 0x1000>;
interrupts = <0 65 0>;
qcom,iommu-ctx-sids = <0>;
label = "vfe0";
};
qcom,iommu-ctx@fda4d000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfda4d000 0x1000>;
interrupts = <0 65 0>;
qcom,iommu-ctx-sids = <1>;
label = "vfe1";
};
qcom,iommu-ctx@fda4e000 {
compatible = "qcom,msm-smmu-v1-ctx";
reg = <0xfda4e000 0x1000>;
interrupts = <0 65 0>;
qcom,iommu-ctx-sids = <2>;
label = "cpp";
};
};
};

301
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/* Copyright (c) 2012, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&rpm_bus {
rpm-regulator-smpa1 {
qcom,resource-name = "smpa";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s1 {
regulator-name = "8019_s1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpa2 {
qcom,resource-name = "smpa";
qcom,resource-id = <2>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s2 {
regulator-name = "8019_s2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpa3 {
qcom,resource-name = "smpa";
qcom,resource-id = <3>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s3 {
regulator-name = "8019_s3";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpa4 {
qcom,resource-name = "smpa";
qcom,resource-id = <4>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s4 {
regulator-name = "8019_s4";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa1 {
qcom,resource-name = "ldoa";
qcom,resource-id = <1>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l1 {
regulator-name = "8019_l1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa2 {
qcom,resource-name = "ldoa";
qcom,resource-id = <2>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l2 {
regulator-name = "8019_l2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa3 {
qcom,resource-name = "ldoa";
qcom,resource-id = <3>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l3 {
regulator-name = "8019_l3";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa4 {
qcom,resource-name = "ldoa";
qcom,resource-id = <4>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l4 {
regulator-name = "8019_l4";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa5 {
qcom,resource-name = "ldoa";
qcom,resource-id = <5>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l5 {
regulator-name = "8019_l5";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa6 {
qcom,resource-name = "ldoa";
qcom,resource-id = <6>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l6 {
regulator-name = "8019_l6";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa7 {
qcom,resource-name = "ldoa";
qcom,resource-id = <7>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l7 {
regulator-name = "8019_l7";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa8 {
qcom,resource-name = "ldoa";
qcom,resource-id = <8>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l8 {
regulator-name = "8019_l8";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa9 {
qcom,resource-name = "ldoa";
qcom,resource-id = <9>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l9 {
regulator-name = "8019_l9";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa10 {
qcom,resource-name = "ldoa";
qcom,resource-id = <10>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l10 {
regulator-name = "8019_l10";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa11 {
qcom,resource-name = "ldoa";
qcom,resource-id = <11>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l11 {
regulator-name = "8019_l11";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa12 {
qcom,resource-name = "ldoa";
qcom,resource-id = <12>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l12 {
regulator-name = "8019_l12";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa13 {
qcom,resource-name = "ldoa";
qcom,resource-id = <13>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l13 {
regulator-name = "8019_l13";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa14 {
qcom,resource-name = "ldoa";
qcom,resource-id = <14>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l14 {
regulator-name = "8019_l14";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
};

415
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/* Copyright (c) 2012-2013, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&spmi_bus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
qcom,pm8019@0 {
spmi-slave-container;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
qcom,power_on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
interrupts = <0x0 0x8 0x2>;
interrupt-names = "cblpwr";
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
qcom,pon_1 {
qcom,pon-type = <2>;
qcom,pull-up = <1>;
linux,code = <116>;
};
};
clkdiv@5b00 {
reg = <0x5b00 0x100>;
compatible = "qcom,qpnp-clkdiv";
qcom,cxo-freq = <19200000>;
};
clkdiv@5c00 {
reg = <0x5c00 0x100>;
compatible = "qcom,qpnp-clkdiv";
qcom,cxo-freq = <19200000>;
};
clkdiv@5d00 {
reg = <0x5d00 0x100>;
compatible = "qcom,qpnp-clkdiv";
qcom,cxo-freq = <19200000>;
};
rtc {
spmi-dev-container;
compatible = "qcom,qpnp-rtc";
#address-cells = <1>;
#size-cells = <1>;
qcom,qpnp-rtc-write = <0>;
qcom,qpnp-rtc-alarm-pwrup = <0>;
qcom,pm8019_rtc_rw@6000 {
reg = <0x6000 0x100>;
};
qcom,pm8019_rtc_alarm@6100 {
reg = <0x6100 0x100>;
interrupts = <0x0 0x61 0x1>;
};
};
pm8019_gpios: gpios {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8019-gpio";
gpio@c000 {
reg = <0xc000 0x100>;
qcom,pin-num = <1>;
};
gpio@c100 {
reg = <0xc100 0x100>;
qcom,pin-num = <2>;
};
gpio@c200 {
reg = <0xc200 0x100>;
qcom,pin-num = <3>;
};
gpio@c300 {
reg = <0xc300 0x100>;
qcom,pin-num = <4>;
};
gpio@c400 {
reg = <0xc400 0x100>;
qcom,pin-num = <5>;
};
gpio@c500 {
reg = <0xc500 0x100>;
qcom,pin-num = <6>;
};
};
pm8019_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8019-mpp";
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
};
mpp@a400 {
reg = <0xa400 0x100>;
qcom,pin-num = <5>;
};
mpp@a500 {
reg = <0xa500 0x100>;
qcom,pin-num = <6>;
};
};
pm8019_vadc: vadc@3100 {
compatible = "qcom,qpnp-vadc";
reg = <0x3100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x31 0x0>;
interrupt-names = "eoc-int-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
qcom,vadc-poll-eoc;
chan@8 {
label = "die_temp";
reg = <8>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <3>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@9 {
label = "ref_625mv";
reg = <9>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@a {
label = "ref_1250v";
reg = <0xa>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
};
pm8019_adc_tm: vadc@3400 {
compatible = "qcom,qpnp-adc-tm";
reg = <0x3400 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x34 0x0>,
<0x0 0x34 0x3>,
<0x0 0x34 0x4>;
interrupt-names = "eoc-int-en-set",
"high-thr-en-set",
"low-thr-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
};
};
qcom,pm8019@1 {
spmi-slave-container;
reg = <0x1>;
#address-cells = <1>;
#size-cells = <1>;
regulator@1400 {
regulator-name = "8019_s1";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1400 0x300>;
status = "disabled";
qcom,ctl@1400 {
reg = <0x1400 0x100>;
};
qcom,ps@1500 {
reg = <0x1500 0x100>;
};
qcom,freq@1600 {
reg = <0x1600 0x100>;
};
};
regulator@1700 {
regulator-name = "8019_s2";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1700 0x300>;
status = "disabled";
qcom,ctl@1700 {
reg = <0x1700 0x100>;
};
qcom,ps@1800 {
reg = <0x1800 0x100>;
};
qcom,freq@1900 {
reg = <0x1900 0x100>;
};
};
regulator@1a00 {
regulator-name = "8019_s3";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1a00 0x300>;
status = "disabled";
qcom,ctl@1a00 {
reg = <0x1a00 0x100>;
};
qcom,ps@1b00 {
reg = <0x1b00 0x100>;
};
qcom,freq@1c00 {
reg = <0x1c00 0x100>;
};
};
regulator@1d00 {
regulator-name = "8019_s4";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1d00 0x300>;
status = "disabled";
qcom,ctl@1d00 {
reg = <0x1d00 0x100>;
};
qcom,ps@1e00 {
reg = <0x1e00 0x100>;
};
qcom,freq@1f00 {
reg = <0x1f00 0x100>;
};
};
regulator@4000 {
regulator-name = "8019_l1";
reg = <0x4000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4100 {
regulator-name = "8019_l2";
reg = <0x4100 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4200 {
regulator-name = "8019_l3";
reg = <0x4200 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4300 {
regulator-name = "8019_l4";
reg = <0x4300 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4400 {
regulator-name = "8019_l5";
reg = <0x4400 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4500 {
regulator-name = "8019_l6";
reg = <0x4500 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4600 {
regulator-name = "8019_l7";
reg = <0x4600 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4700 {
regulator-name = "8019_l8";
reg = <0x4700 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4800 {
regulator-name = "8019_l9";
reg = <0x4800 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4900 {
regulator-name = "8019_l10";
reg = <0x4900 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4a00 {
regulator-name = "8019_l11";
reg = <0x4a00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4b00 {
regulator-name = "8019_l12";
reg = <0x4b00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4c00 {
regulator-name = "8019_l13";
reg = <0x4c00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4d00 {
regulator-name = "8019_l14";
reg = <0x4d00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4e00 {
regulator-name = "8019_ldo_xo";
reg = <0x4e00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4f00 {
regulator-name = "8019_ldo_rfclk";
reg = <0x4f00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
};
};

381
kernel/arch/arm/boot/dts/m7350-un-v3/msm-pm8110-rpm-regulator.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&rpm_bus {
rpm-regulator-smpa1 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s1 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_s1";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa3 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <3>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s3 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_s3";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa4 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <4>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s4 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_s4";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa1 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <1>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l1 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l1";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa2 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <2>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l2 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l2";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa3 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <3>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l3 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l3";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa4 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <4>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l4 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l4";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa5 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <5>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l5 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l5";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa6 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <6>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l6 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l6";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa7 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <7>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l7 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l7";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa8 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <8>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l8 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l8";
qcom,set = <1>;
status = "disabled";
};
};
rpm-regulator-ldoa9 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <9>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l9 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l9";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa10 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <10>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l10 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l10";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa12 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <12>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l12 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l12";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa14 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <14>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l14 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l14";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa15 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <15>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l15 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l15";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa16 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <16>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l16 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l16";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa17 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <17>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l17 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l17";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa18 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <18>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l18 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l18";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa19 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <19>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l19 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l19";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa20 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <20>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l20 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l20";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa21 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <21>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l21 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l21";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa22 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <22>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l22 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8110_l22";
qcom,set = <3>;
status = "disabled";
};
};
};

608
kernel/arch/arm/boot/dts/m7350-un-v3/msm-pm8110.dtsi Normal file
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@ -0,0 +1,608 @@
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&spmi_bus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
qcom,pm8110@0 {
spmi-slave-container;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
interrupts = <0x0 0x8 0x0>,
<0x0 0x8 0x1>,
<0x0 0x8 0x4>;
interrupt-names = "kpdpwr", "resin", "resin-bark";
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
qcom,pon_1 {
qcom,pon-type = <0>;
qcom,pull-up = <1>;
linux,code = <116>;
};
qcom,pon_2 {
qcom,pon-type = <1>;
qcom,pull-up = <1>;
linux,code = <114>;
};
};
pm8110_chg: qcom,charger {
spmi-dev-container;
compatible = "qcom,qpnp-charger";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
qcom,vddmax-mv = <4200>;
qcom,vddsafe-mv = <4230>;
qcom,vinmin-mv = <4200>;
qcom,vbatdet-mv = <4100>;
qcom,ibatmax-ma = <1500>;
qcom,ibatterm-ma = <200>;
qcom,ibatsafe-ma = <1500>;
qcom,thermal-mitigation = <1500 700 600 325>;
qcom,vbatdet-delta-mv = <350>;
qcom,tchg-mins = <150>;
qcom,chgr@1000 {
status = "disabled";
reg = <0x1000 0x100>;
interrupts = <0x0 0x10 0x0>,
<0x0 0x10 0x1>,
<0x0 0x10 0x2>,
<0x0 0x10 0x3>,
<0x0 0x10 0x4>,
<0x0 0x10 0x5>,
<0x0 0x10 0x6>,
<0x0 0x10 0x7>;
interrupt-names = "vbat-det-lo",
"vbat-det-hi",
"chgwdog",
"state-change",
"trkl-chg-on",
"fast-chg-on",
"chg-failed",
"chg-done";
};
qcom,buck@1100 {
status = "disabled";
reg = <0x1100 0x100>;
interrupts = <0x0 0x11 0x0>,
<0x0 0x11 0x1>,
<0x0 0x11 0x2>,
<0x0 0x11 0x3>,
<0x0 0x11 0x4>,
<0x0 0x11 0x5>,
<0x0 0x11 0x6>;
interrupt-names = "vbat-ov",
"vreg-ov",
"overtemp",
"vchg-loop",
"ichg-loop",
"ibat-loop",
"vdd-loop";
};
qcom,bat-if@1200 {
status = "disabled";
reg = <0x1200 0x100>;
interrupts = <0x0 0x12 0x0>,
<0x0 0x12 0x1>,
<0x0 0x12 0x2>,
<0x0 0x12 0x3>,
<0x0 0x12 0x4>;
interrupt-names = "batt-pres",
"bat-temp-ok",
"bat-fet-on",
"vcp-on",
"psi";
};
qcom,usb-chgpth@1300 {
status = "disabled";
reg = <0x1300 0x100>;
interrupts = <0 0x13 0x0>,
<0 0x13 0x1>,
<0x0 0x13 0x2>;
interrupt-names = "coarse-det-usb",
"usbin-valid",
"chg-gone";
};
qcom,chg-misc@1600 {
status = "disabled";
reg = <0x1600 0x100>;
};
};
pm8110_gpios: gpios {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8110-gpio";
gpio@c000 {
reg = <0xc000 0x100>;
qcom,pin-num = <1>;
};
gpio@c100 {
reg = <0xc100 0x100>;
qcom,pin-num = <2>;
};
gpio@c200 {
reg = <0xc200 0x100>;
qcom,pin-num = <3>;
};
gpio@c300 {
reg = <0xc300 0x100>;
qcom,pin-num = <4>;
};
};
pm8110_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8110-mpp";
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
};
};
pm8110_vadc: vadc@3100 {
compatible = "qcom,qpnp-vadc";
reg = <0x3100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x31 0x0>;
interrupt-names = "eoc-int-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
chan@8 {
label = "die_temp";
reg = <8>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <3>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@9 {
label = "ref_625mv";
reg = <9>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@a {
label = "ref_1250v";
reg = <0xa>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
};
iadc@3600 {
compatible = "qcom,qpnp-iadc";
reg = <0x3600 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x36 0x0>;
interrupt-names = "eoc-int-en-set";
qcom,adc-bit-resolution = <16>;
qcom,adc-vdd-reference = <1800>;
chan@0 {
label = "internal_rsense";
reg = <0>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <1>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
};
pm8110_adc_tm: vadc@3400 {
compatible = "qcom,qpnp-adc-tm";
reg = <0x3400 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x34 0x0>,
<0x0 0x34 0x3>,
<0x0 0x34 0x4>;
interrupt-names = "eoc-int-en-set",
"high-thr-en-set",
"low-thr-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
};
qcom,temp-alarm@2400 {
compatible = "qcom,qpnp-temp-alarm";
reg = <0x2400 0x100>;
interrupts = <0x0 0x24 0x0>;
label = "pm8110_tz";
qcom,channel-num = <8>;
qcom,threshold-set = <0>;
};
pm8110_bms: qcom,bms {
spmi-dev-container;
compatible = "qcom,qpnp-bms";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
qcom,r-sense-uohm = <10000>;
qcom,v-cutoff-uv = <3400000>;
qcom,max-voltage-uv = <4200000>;
qcom,r-conn-mohm = <0>;
qcom,shutdown-soc-valid-limit = <20>;
qcom,adjust-soc-low-threshold = <15>;
qcom,ocv-voltage-high-threshold-uv = <3750000>;
qcom,ocv-voltage-low-threshold-uv = <3650000>;
qcom,low-soc-calculate-soc-threshold = <15>;
qcom,low-soc-calculate-soc-ms = <5000>;
qcom,calculate-soc-ms = <20000>;
qcom,chg-term-ua = <100000>;
qcom,batt-type = <0>;
qcom,low-voltage-threshold = <3420000>;
qcom,tm-temp-margin = <5000>;
qcom,low-ocv-correction-limit-uv = <100>;
qcom,high-ocv-correction-limit-uv = <50>;
qcom,hold-soc-est = <3>;
qcom,bms-iadc@3800 {
reg = <0x3800 0x100>;
};
qcom,bms-bms@4000 {
reg = <0x4000 0x100>;
interrupts = <0x0 0x40 0x0>,
<0x0 0x40 0x1>,
<0x0 0x40 0x2>,
<0x0 0x40 0x3>,
<0x0 0x40 0x4>,
<0x0 0x40 0x5>,
<0x0 0x40 0x6>,
<0x0 0x40 0x7>;
interrupt-names = "vsense_for_r",
"vsense_avg",
"sw_cc_thr",
"ocv_thr",
"charge_begin",
"good_ocv",
"ocv_for_r",
"cc_thr";
};
};
qcom,pm8110_rtc {
spmi-dev-container;
compatible = "qcom,qpnp-rtc";
#address-cells = <1>;
#size-cells = <1>;
qcom,qpnp-rtc-write = <0>;
qcom,qpnp-rtc-alarm-pwrup = <0>;
qcom,pm8110_rtc_rw@6000 {
reg = <0x6000 0x100>;
};
qcom,pm8110_rtc_alarm@6100 {
reg = <0x6100 0x100>;
interrupts = <0x0 0x61 0x1>;
};
};
qcom,leds@a100 {
compatible = "qcom,leds-qpnp";
reg = <0xa100 0x100>;
label = "mpp";
};
qcom,leds@a200 {
compatible = "qcom,leds-qpnp";
reg = <0xa200 0x100>;
label = "mpp";
};
};
qcom,pm8110@1 {
spmi-slave-container;
reg = <0x1>;
#address-cells = <1>;
#size-cells = <1>;
regulator@1400 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_s1";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1400 0x300>;
status = "disabled";
qcom,ctl@1400 {
reg = <0x1400 0x100>;
};
qcom,ps@1500 {
reg = <0x1500 0x100>;
};
qcom,freq@1600 {
reg = <0x1600 0x100>;
};
};
regulator@1700 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_s2";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1700 0x300>;
status = "disabled";
qcom,ctl@1700 {
reg = <0x1700 0x100>;
};
qcom,ps@1800 {
reg = <0x1800 0x100>;
};
qcom,freq@1900 {
reg = <0x1900 0x100>;
};
};
regulator@1a00 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_s3";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1a00 0x300>;
status = "disabled";
qcom,ctl@1a00 {
reg = <0x1a00 0x100>;
};
qcom,ps@1b00 {
reg = <0x1b00 0x100>;
};
qcom,freq@1c00 {
reg = <0x1c00 0x100>;
};
};
regulator@1d00 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_s4";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1d00 0x300>;
status = "disabled";
qcom,ctl@1d00 {
reg = <0x1d00 0x100>;
};
qcom,ps@1e00 {
reg = <0x1e00 0x100>;
};
qcom,freq@1f00 {
reg = <0x1f00 0x100>;
};
};
regulator@4000 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l1";
reg = <0x4000 0x100>;
status = "disabled";
};
regulator@4100 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l2";
reg = <0x4100 0x100>;
status = "disabled";
};
regulator@4200 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l3";
reg = <0x4200 0x100>;
status = "disabled";
};
regulator@4300 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l4";
reg = <0x4300 0x100>;
status = "disabled";
};
regulator@4400 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l5";
reg = <0x4400 0x100>;
status = "disabled";
};
regulator@4500 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l6";
reg = <0x4500 0x100>;
status = "disabled";
};
regulator@4600 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l7";
reg = <0x4600 0x100>;
status = "disabled";
};
regulator@4700 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l8";
reg = <0x4700 0x100>;
status = "disabled";
};
regulator@4800 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l9";
reg = <0x4800 0x100>;
status = "disabled";
};
regulator@4900 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l10";
reg = <0x4900 0x100>;
status = "disabled";
};
regulator@4b00 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l12";
reg = <0x4b00 0x100>;
status = "disabled";
};
regulator@4d00 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l14";
reg = <0x4d00 0x100>;
status = "disabled";
};
regulator@4e00 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l15";
reg = <0x4e00 0x100>;
status = "disabled";
};
regulator@4f00 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l16";
reg = <0x4f00 0x100>;
status = "disabled";
};
regulator@5000 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l17";
reg = <0x5000 0x100>;
status = "disabled";
};
regulator@5100 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l18";
reg = <0x5100 0x100>;
status = "disabled";
};
regulator@5200 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l19";
reg = <0x5200 0x100>;
status = "disabled";
};
regulator@5300 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l20";
reg = <0x5300 0x100>;
status = "disabled";
};
regulator@5400 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l21";
reg = <0x5400 0x100>;
status = "disabled";
};
regulator@5500 {
compatible = "qcom,qpnp-regulator";
regulator-name = "8110_l22";
reg = <0x5500 0x100>;
status = "disabled";
};
qcom,vibrator@c000 {
compatible = "qcom,qpnp-vibrator";
reg = <0xc000 0x100>;
label = "vibrator";
status = "disabled";
};
};
};

492
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&rpm_bus {
rpm-regulator-smpa1 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s1 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_s1";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa3 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <3>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s3 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_s3";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa4 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <4>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s4 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_s4";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa5 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <5>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s5 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_s5";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa1 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <1>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l1 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l1";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa2 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <2>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l2 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l2";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa3 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <3>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l3 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l3";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa4 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <4>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l4 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l4";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa5 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <5>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l5 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l5";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa6 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <6>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l6 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l6";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa7 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <7>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l7 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l7";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa8 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <8>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l8 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l8";
qcom,set = <1>;
status = "disabled";
};
};
rpm-regulator-ldoa9 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <9>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l9 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l9";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa10 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <10>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l10 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l10";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa12 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <12>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l12 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l12";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa14 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <14>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l14 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l14";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa15 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <15>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l15 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l15";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa16 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <16>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l16 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l16";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa17 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <17>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l17 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l17";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa18 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <18>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l18 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l18";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa19 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <19>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l19 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l19";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa20 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <20>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l20 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l20";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa21 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <21>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <5000>;
status = "disabled";
regulator-l21 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l21";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa22 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <22>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l22 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l22";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa23 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <23>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l23 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l23";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa24 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <24>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l24 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l24";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa26 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <26>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l26 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l26";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa27 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <27>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l27 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l27";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa28 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <28>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l28 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l28";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-vsa1 {
compatible = "qcom,rpm-regulator-smd-resource";
qcom,resource-name = "vsa";
qcom,resource-id = <1>;
qcom,regulator-type = <2>;
status = "disabled";
regulator-lvs1 {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_lvs1";
qcom,set = <3>;
status = "disabled";
};
};
};

833
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&spmi_bus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
qcom,pm8226@0 {
spmi-slave-container;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
interrupts = <0x0 0x8 0x0>,
<0x0 0x8 0x1>,
<0x0 0x8 0x4>;
interrupt-names = "kpdpwr", "resin", "resin-bark";
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
qcom,pon_1 {
qcom,pon-type = <0>;
qcom,pull-up = <1>;
linux,code = <116>;
};
qcom,pon_2 {
qcom,pon-type = <1>;
qcom,support-reset = <1>;
qcom,pull-up = <1>;
qcom,s1-timer = <0>;
qcom,s2-timer = <2000>;
qcom,s2-type = <1>;
linux,code = <114>;
};
};
pm8226_chg: qcom,charger {
spmi-dev-container;
compatible = "qcom,qpnp-charger";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
qcom,vddmax-mv = <4200>;
qcom,vddsafe-mv = <4230>;
qcom,vinmin-mv = <4200>;
qcom,vbatdet-delta-mv = <150>;
qcom,ibatmax-ma = <1500>;
qcom,ibatterm-ma = <100>;
qcom,ibatsafe-ma = <1500>;
qcom,thermal-mitigation = <1500 700 600 325>;
qcom,tchg-mins = <150>;
qcom,chgr@1000 {
status = "disabled";
reg = <0x1000 0x100>;
interrupts = <0x0 0x10 0x0>,
<0x0 0x10 0x1>,
<0x0 0x10 0x2>,
<0x0 0x10 0x3>,
<0x0 0x10 0x4>,
<0x0 0x10 0x5>,
<0x0 0x10 0x6>,
<0x0 0x10 0x7>;
interrupt-names = "vbat-det-lo",
"vbat-det-hi",
"chgwdog",
"state-change",
"trkl-chg-on",
"fast-chg-on",
"chg-failed",
"chg-done";
};
qcom,buck@1100 {
status = "disabled";
reg = <0x1100 0x100>;
interrupts = <0x0 0x11 0x0>,
<0x0 0x11 0x1>,
<0x0 0x11 0x2>,
<0x0 0x11 0x3>,
<0x0 0x11 0x4>,
<0x0 0x11 0x5>,
<0x0 0x11 0x6>;
interrupt-names = "vbat-ov",
"vreg-ov",
"overtemp",
"vchg-loop",
"ichg-loop",
"ibat-loop",
"vdd-loop";
};
qcom,bat-if@1200 {
status = "disabled";
reg = <0x1200 0x100>;
interrupts = <0x0 0x12 0x0>,
<0x0 0x12 0x1>,
<0x0 0x12 0x2>,
<0x0 0x12 0x3>,
<0x0 0x12 0x4>;
interrupt-names = "batt-pres",
"bat-temp-ok",
"bat-fet-on",
"vcp-on",
"psi";
};
pm8226_chg_otg: qcom,usb-chgpth@1300 {
status = "disabled";
reg = <0x1300 0x100>;
interrupts = <0 0x13 0x0>,
<0 0x13 0x1>,
<0x0 0x13 0x2>;
interrupt-names = "coarse-det-usb",
"usbin-valid",
"chg-gone";
};
pm8226_chg_boost: qcom,boost@1500 {
status = "disabled";
reg = <0x1500 0x100>;
interrupts = <0x0 0x15 0x0>,
<0x0 0x15 0x1>;
interrupt-names = "boost-pwr-ok",
"limit-error";
};
qcom,chg-misc@1600 {
status = "disabled";
reg = <0x1600 0x100>;
};
};
pm8226_bms: qcom,bms {
spmi-dev-container;
compatible = "qcom,qpnp-bms";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
qcom,r-sense-uohm = <10000>;
qcom,v-cutoff-uv = <3400000>;
qcom,max-voltage-uv = <4200000>;
qcom,r-conn-mohm = <0>;
qcom,shutdown-soc-valid-limit = <20>;
qcom,adjust-soc-low-threshold = <15>;
qcom,ocv-voltage-high-threshold-uv = <3750000>;
qcom,ocv-voltage-low-threshold-uv = <3650000>;
qcom,low-soc-calculate-soc-threshold = <15>;
qcom,low-soc-calculate-soc-ms = <5000>;
qcom,calculate-soc-ms = <20000>;
qcom,chg-term-ua = <100000>;
qcom,batt-type = <0>;
qcom,tm-temp-margin = <5000>;
qcom,low-ocv-correction-limit-uv = <100>;
qcom,high-ocv-correction-limit-uv = <50>;
qcom,hold-soc-est = <3>;
qcom,low-voltage-threshold = <3420000>;
qcom,bms-iadc@3800 {
reg = <0x3800 0x100>;
};
qcom,bms-bms@4000 {
reg = <0x4000 0x100>;
interrupts = <0x0 0x40 0x0>,
<0x0 0x40 0x1>,
<0x0 0x40 0x2>,
<0x0 0x40 0x3>,
<0x0 0x40 0x4>,
<0x0 0x40 0x5>,
<0x0 0x40 0x6>,
<0x0 0x40 0x7>;
interrupt-names = "vsense_for_r",
"vsense_avg",
"sw_cc_thr",
"ocv_thr",
"charge_begin",
"good_ocv",
"ocv_for_r",
"cc_thr";
};
};
qcom,leds@a100 {
compatible = "qcom,leds-qpnp";
reg = <0xa100 0x100>;
label = "mpp";
};
qcom,leds@a300 {
compatible = "qcom,leds-qpnp";
reg = <0xa300 0x100>;
label = "mpp";
};
qcom,leds@a500 {
compatible = "qcom,leds-qpnp";
reg = <0xa500 0x100>;
label = "mpp";
};
pm8226_gpios: gpios {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8226-gpio";
gpio@c000 {
reg = <0xc000 0x100>;
qcom,pin-num = <1>;
};
gpio@c100 {
reg = <0xc100 0x100>;
qcom,pin-num = <2>;
};
gpio@c200 {
reg = <0xc200 0x100>;
qcom,pin-num = <3>;
};
gpio@c300 {
reg = <0xc300 0x100>;
qcom,pin-num = <4>;
};
gpio@c400 {
reg = <0xc400 0x100>;
qcom,pin-num = <5>;
};
gpio@c500 {
reg = <0xc500 0x100>;
qcom,pin-num = <6>;
};
gpio@c600 {
reg = <0xc600 0x100>;
qcom,pin-num = <7>;
};
gpio@c700 {
reg = <0xc700 0x100>;
qcom,pin-num = <8>;
};
};
pm8226_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8226-mpp";
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
};
mpp@a400 {
reg = <0xa400 0x100>;
qcom,pin-num = <5>;
};
mpp@a500 {
reg = <0xa500 0x100>;
qcom,pin-num = <6>;
};
mpp@a600 {
reg = <0xa600 0x100>;
qcom,pin-num = <7>;
};
mpp@a700 {
reg = <0xa700 0x100>;
qcom,pin-num = <8>;
};
};
pm8226_vadc: vadc@3100 {
compatible = "qcom,qpnp-vadc";
reg = <0x3100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x31 0x0>;
interrupt-names = "eoc-int-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
chan@8 {
label = "die_temp";
reg = <8>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <3>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@9 {
label = "ref_625mv";
reg = <9>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@a {
label = "ref_1250v";
reg = <0xa>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
chan@c {
label = "ref_buf_625mv";
reg = <0xc>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
};
iadc@3600 {
compatible = "qcom,qpnp-iadc";
reg = <0x3600 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x36 0x0>;
interrupt-names = "eoc-int-en-set";
qcom,adc-bit-resolution = <16>;
qcom,adc-vdd-reference = <1800>;
chan@0 {
label = "internal_rsense";
reg = <0>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <1>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
qcom,fast-avg-setup = <0>;
};
};
pm8226_adc_tm: vadc@3400 {
compatible = "qcom,qpnp-adc-tm";
reg = <0x3400 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x34 0x0>,
<0x0 0x34 0x3>,
<0x0 0x34 0x4>;
interrupt-names = "eoc-int-en-set",
"high-thr-en-set",
"low-thr-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
};
qcom,temp-alarm@2400 {
compatible = "qcom,qpnp-temp-alarm";
reg = <0x2400 0x100>;
interrupts = <0x0 0x24 0x0>;
label = "pm8226_tz";
qcom,channel-num = <8>;
qcom,threshold-set = <0>;
};
qcom,pm8226_rtc {
spmi-dev-container;
compatible = "qcom,qpnp-rtc";
#address-cells = <1>;
#size-cells = <1>;
qcom,qpnp-rtc-write = <0>;
qcom,qpnp-rtc-alarm-pwrup = <0>;
qcom,pm8226_rtc_rw@6000 {
reg = <0x6000 0x100>;
};
qcom,pm8226_rtc_alarm@6100 {
reg = <0x6100 0x100>;
interrupts = <0x0 0x61 0x1>;
};
};
};
qcom,pm8226@1 {
spmi-slave-container;
reg = <0x1>;
#address-cells = <1>;
#size-cells = <1>;
regulator@1400 {
regulator-name = "8226_s1";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1400 0x300>;
status = "disabled";
qcom,ctl@1400 {
reg = <0x1400 0x100>;
};
qcom,ps@1500 {
reg = <0x1500 0x100>;
};
qcom,freq@1600 {
reg = <0x1600 0x100>;
};
};
regulator@1700 {
regulator-name = "8226_s2";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1700 0x300>;
status = "disabled";
qcom,ctl@1700 {
reg = <0x1700 0x100>;
};
qcom,ps@1800 {
reg = <0x1800 0x100>;
};
qcom,freq@1900 {
reg = <0x1900 0x100>;
};
};
regulator@1a00 {
regulator-name = "8226_s3";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1a00 0x300>;
status = "disabled";
qcom,ctl@1a00 {
reg = <0x1a00 0x100>;
};
qcom,ps@1b00 {
reg = <0x1b00 0x100>;
};
qcom,freq@1c00 {
reg = <0x1c00 0x100>;
};
};
regulator@1d00 {
regulator-name = "8226_s4";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1d00 0x300>;
status = "disabled";
qcom,ctl@1d00 {
reg = <0x1d00 0x100>;
};
qcom,ps@1e00 {
reg = <0x1e00 0x100>;
};
qcom,freq@1f00 {
reg = <0x1f00 0x100>;
};
};
regulator@2000 {
regulator-name = "8226_s5";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2000 0x300>;
status = "disabled";
qcom,ctl@2000 {
reg = <0x2000 0x100>;
};
qcom,ps@2100 {
reg = <0x2100 0x100>;
};
qcom,freq@2200 {
reg = <0x2200 0x100>;
};
};
regulator@4000 {
regulator-name = "8226_l1";
reg = <0x4000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4100 {
regulator-name = "8226_l2";
reg = <0x4100 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4200 {
regulator-name = "8226_l3";
reg = <0x4200 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4300 {
regulator-name = "8226_l4";
reg = <0x4300 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4400 {
regulator-name = "8226_l5";
reg = <0x4400 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4500 {
regulator-name = "8226_l6";
reg = <0x4500 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4600 {
regulator-name = "8226_l7";
reg = <0x4600 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4700 {
regulator-name = "8226_l8";
reg = <0x4700 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4800 {
regulator-name = "8226_l9";
reg = <0x4800 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4900 {
regulator-name = "8226_l10";
reg = <0x4900 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4b00 {
regulator-name = "8226_l12";
reg = <0x4b00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4d00 {
regulator-name = "8226_l14";
reg = <0x4d00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4e00 {
regulator-name = "8226_l15";
reg = <0x4e00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4f00 {
regulator-name = "8226_l16";
reg = <0x4f00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5000 {
regulator-name = "8226_l17";
reg = <0x5000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5100 {
regulator-name = "8226_l18";
reg = <0x5100 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5200 {
regulator-name = "8226_l19";
reg = <0x5200 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5300 {
regulator-name = "8226_l20";
reg = <0x5300 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5400 {
regulator-name = "8226_l21";
reg = <0x5400 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5500 {
regulator-name = "8226_l22";
reg = <0x5500 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5600 {
regulator-name = "8226_l23";
reg = <0x5600 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5700 {
regulator-name = "8226_l24";
reg = <0x5700 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5900 {
regulator-name = "8226_l26";
reg = <0x5900 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5a00 {
regulator-name = "8226_l27";
reg = <0x5a00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5b00 {
regulator-name = "8226_l28";
reg = <0x5b00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
qcom,leds@d800 {
compatible = "qcom,leds-qpnp";
reg = <0xd800 0x100>;
label = "wled";
};
pwm@b100 {
compatible = "qcom,qpnp-pwm";
reg = <0xb100 0x100>,
<0xb042 0x7e>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <0>;
};
pwm@b200 {
compatible = "qcom,qpnp-pwm";
reg = <0xb200 0x100>,
<0xb042 0x7e>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <1>;
};
pwm@b300 {
compatible = "qcom,qpnp-pwm";
reg = <0xb300 0x100>,
<0xb042 0x7e>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <2>;
};
pwm@b400 {
compatible = "qcom,qpnp-pwm";
reg = <0xb400 0x100>,
<0xb042 0x7e>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <3>;
};
pwm@b500 {
compatible = "qcom,qpnp-pwm";
reg = <0xb500 0x100>,
<0xb042 0x7e>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <4>;
};
pwm@b600 {
compatible = "qcom,qpnp-pwm";
reg = <0xb600 0x100>,
<0xb042 0x7e>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <5>;
};
regulator@8000 {
regulator-name = "8226_lvs1";
reg = <0x8000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
qcom,vibrator@c000 {
compatible = "qcom,qpnp-vibrator";
reg = <0xc000 0x100>;
label = "vibrator";
status = "disabled";
};
qcom,leds@d300 {
compatible = "qcom,leds-qpnp";
status = "okay";
reg = <0xd300 0x100>;
label = "flash";
flash_boost-supply = <&pm8226_chg_boost>;
pm8226_flash0: qcom,flash_0 {
qcom,max-current = <1000>;
qcom,default-state = "off";
qcom,headroom = <0>;
qcom,duration = <1280>;
qcom,clamp-curr = <200>;
qcom,startup-dly = <1>;
qcom,safety-timer;
label = "flash";
linux,default-trigger =
"flash0_trigger";
qcom,id = <1>;
linux,name = "led:flash_0";
qcom,current = <625>;
};
pm8226_flash1: qcom,flash_1 {
qcom,max-current = <1000>;
qcom,default-state = "off";
qcom,headroom = <0>;
qcom,duration = <1280>;
qcom,clamp-curr = <200>;
qcom,startup-dly = <1>;
qcom,safety-timer;
linux,default-trigger =
"flash1_trigger";
label = "flash";
qcom,id = <2>;
linux,name = "led:flash_1";
qcom,current = <625>;
};
};
};
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&spmi_bus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
qcom,pm8841@4 {
spmi-slave-container;
reg = <0x4>;
#address-cells = <1>;
#size-cells = <1>;
qcom,qpnp-revid@100 {
compatible = "qcom,qpnp-revid";
reg = <0x100 0x100>;
};
qcom,temp-alarm@2400 {
compatible = "qcom,qpnp-temp-alarm";
reg = <0x2400 0x100>;
interrupts = <0x4 0x24 0x0>;
label = "pm8841_tz";
qcom,threshold-set = <0>;
qcom,default-temp = <37000>;
};
pm8841_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pm8841-mpp";
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
};
};
};
qcom,pm8841@5 {
spmi-slave-container;
reg = <0x5>;
#address-cells = <1>;
#size-cells = <1>;
regulator@1400 {
regulator-name = "8841_s1";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1400 0x300>;
status = "disabled";
qcom,ctl@1400 {
reg = <0x1400 0x100>;
};
qcom,ps@1500 {
reg = <0x1500 0x100>;
};
qcom,freq@1600 {
reg = <0x1600 0x100>;
};
};
regulator@1700 {
regulator-name = "8841_s2";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1700 0x300>;
status = "disabled";
qcom,force-type = <0x1c 0x08>;
qcom,ctl@1700 {
reg = <0x1700 0x100>;
};
qcom,ps@1800 {
reg = <0x1800 0x100>;
};
qcom,freq@1900 {
reg = <0x1900 0x100>;
};
};
regulator@1a00 {
regulator-name = "8841_s3";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1a00 0x300>;
status = "disabled";
qcom,ctl@1a00 {
reg = <0x1a00 0x100>;
};
qcom,ps@1b00 {
reg = <0x1b00 0x100>;
};
qcom,freq@1c00 {
reg = <0x1c00 0x100>;
};
};
regulator@1d00 {
regulator-name = "8841_s4";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1d00 0x300>;
status = "disabled";
qcom,force-type = <0x1c 0x08>;
qcom,ctl@1d00 {
reg = <0x1d00 0x100>;
};
qcom,ps@1e00 {
reg = <0x1e00 0x100>;
};
qcom,freq@1f00 {
reg = <0x1f00 0x100>;
};
};
regulator@2000 {
regulator-name = "8841_s5";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2000 0x300>;
status = "disabled";
qcom,force-type = <0x1c 0x08>;
qcom,ctl@0 {
reg = <0x2000 0x100>;
};
qcom,ps@100 {
reg = <0x2100 0x100>;
};
qcom,freq@200 {
reg = <0x2200 0x100>;
};
};
regulator@2300 {
regulator-name = "8841_s6";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2300 0x300>;
status = "disabled";
qcom,force-type = <0x1c 0x08>;
qcom,ctl@2300 {
reg = <0x2300 0x100>;
};
qcom,ps@2400 {
reg = <0x2400 0x100>;
};
qcom,freq@2500 {
reg = <0x2500 0x100>;
};
};
regulator@2600 {
regulator-name = "8841_s7";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2600 0x300>;
status = "disabled";
qcom,force-type = <0x1c 0x08>;
qcom,ctl@2600 {
reg = <0x2600 0x100>;
};
qcom,ps@2700 {
reg = <0x2700 0x100>;
};
qcom,freq@2800 {
reg = <0x2800 0x100>;
};
};
regulator@2900 {
regulator-name = "8841_s8";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2900 0x300>;
status = "disabled";
qcom,force-type = <0x1c 0x08>;
qcom,ctl@2900 {
reg = <0x2900 0x100>;
};
qcom,ps@2a000 {
reg = <0x2a00 0x100>;
};
qcom,freq@2b00 {
reg = <0x2b00 0x100>;
};
};
};
};

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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&rpm_bus {
rpm-regulator-smpb1 {
qcom,resource-name = "smpb";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s1 {
regulator-name = "8841_s1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpb2 {
qcom,resource-name = "smpb";
qcom,resource-id = <2>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s2 {
regulator-name = "8841_s2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpb3 {
qcom,resource-name = "smpb";
qcom,resource-id = <3>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s3 {
regulator-name = "8841_s3";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpb4 {
qcom,resource-name = "smpb";
qcom,resource-id = <4>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s4 {
regulator-name = "8841_s4";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpa1 {
qcom,resource-name = "smpa";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s1 {
regulator-name = "8941_s1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpa2 {
qcom,resource-name = "smpa";
qcom,resource-id = <2>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s2 {
regulator-name = "8941_s2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-smpa3 {
qcom,resource-name = "smpa";
qcom,resource-id = <3>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-s3 {
regulator-name = "8941_s3";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa1 {
qcom,resource-name = "ldoa";
qcom,resource-id = <1>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l1 {
regulator-name = "8941_l1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa2 {
qcom,resource-name = "ldoa";
qcom,resource-id = <2>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l2 {
regulator-name = "8941_l2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa3 {
qcom,resource-name = "ldoa";
qcom,resource-id = <3>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l3 {
regulator-name = "8941_l3";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa4 {
qcom,resource-name = "ldoa";
qcom,resource-id = <4>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l4 {
regulator-name = "8941_l4";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa5 {
qcom,resource-name = "ldoa";
qcom,resource-id = <5>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l5 {
regulator-name = "8941_l5";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa6 {
qcom,resource-name = "ldoa";
qcom,resource-id = <6>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l6 {
regulator-name = "8941_l6";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa7 {
qcom,resource-name = "ldoa";
qcom,resource-id = <7>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l7 {
regulator-name = "8941_l7";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa8 {
qcom,resource-name = "ldoa";
qcom,resource-id = <8>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l8 {
regulator-name = "8941_l8";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa9 {
qcom,resource-name = "ldoa";
qcom,resource-id = <9>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l9 {
regulator-name = "8941_l9";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa10 {
qcom,resource-name = "ldoa";
qcom,resource-id = <10>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l10 {
regulator-name = "8941_l10";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa11 {
qcom,resource-name = "ldoa";
qcom,resource-id = <11>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l11 {
regulator-name = "8941_l11";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa12 {
qcom,resource-name = "ldoa";
qcom,resource-id = <12>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l12 {
regulator-name = "8941_l12";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa13 {
qcom,resource-name = "ldoa";
qcom,resource-id = <13>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l13 {
regulator-name = "8941_l13";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa14 {
qcom,resource-name = "ldoa";
qcom,resource-id = <14>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l14 {
regulator-name = "8941_l14";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa15 {
qcom,resource-name = "ldoa";
qcom,resource-id = <15>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l15 {
regulator-name = "8941_l15";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa16 {
qcom,resource-name = "ldoa";
qcom,resource-id = <16>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l16 {
regulator-name = "8941_l16";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa17 {
qcom,resource-name = "ldoa";
qcom,resource-id = <17>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l17 {
regulator-name = "8941_l17";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa18 {
qcom,resource-name = "ldoa";
qcom,resource-id = <18>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l18 {
regulator-name = "8941_l18";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa19 {
qcom,resource-name = "ldoa";
qcom,resource-id = <19>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l19 {
regulator-name = "8941_l19";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa20 {
qcom,resource-name = "ldoa";
qcom,resource-id = <20>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l20 {
regulator-name = "8941_l20";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa21 {
qcom,resource-name = "ldoa";
qcom,resource-id = <21>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l21 {
regulator-name = "8941_l21";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa22 {
qcom,resource-name = "ldoa";
qcom,resource-id = <22>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l22 {
regulator-name = "8941_l22";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa23 {
qcom,resource-name = "ldoa";
qcom,resource-id = <23>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l23 {
regulator-name = "8941_l23";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-ldoa24 {
qcom,resource-name = "ldoa";
qcom,resource-id = <24>;
qcom,regulator-type = <0>;
qcom,hpm-min-load = <10000>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-l24 {
regulator-name = "8941_l24";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
/* TODO: find out correct resource names for LVS vs MVS */
rpm-regulator-vsa1 {
qcom,resource-name = "vsa";
qcom,resource-id = <1>;
qcom,regulator-type = <2>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-lvs1 {
regulator-name = "8941_lvs1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-vsa2 {
qcom,resource-name = "vsa";
qcom,resource-id = <2>;
qcom,regulator-type = <2>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-lvs2 {
regulator-name = "8941_lvs2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-vsa3 {
qcom,resource-name = "vsa";
qcom,resource-id = <3>;
qcom,regulator-type = <2>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-lvs3 {
regulator-name = "8941_lvs3";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-vsa4 {
qcom,resource-name = "vsa";
qcom,resource-id = <4>;
qcom,regulator-type = <2>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-mvs1 {
regulator-name = "8941_mvs1";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
rpm-regulator-vsa5 {
qcom,resource-name = "vsa";
qcom,resource-id = <5>;
qcom,regulator-type = <2>;
compatible = "qcom,rpm-regulator-smd-resource";
status = "disabled";
regulator-mvs2 {
regulator-name = "8941_mvs2";
qcom,set = <3>;
status = "disabled";
compatible = "qcom,rpm-regulator-smd";
};
};
};

666
kernel/arch/arm/boot/dts/m7350-un-v3/msm-pma8084.dtsi Normal file
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@ -0,0 +1,666 @@
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&spmi_bus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
qcom,pma8084@0 {
spmi-slave-container;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
pma8084_gpios: gpios {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pma8084-gpio";
gpio@c000 {
reg = <0xc000 0x100>;
qcom,pin-num = <1>;
};
gpio@c100 {
reg = <0xc100 0x100>;
qcom,pin-num = <2>;
};
gpio@c200 {
reg = <0xc200 0x100>;
qcom,pin-num = <3>;
};
gpio@c300 {
reg = <0xc300 0x100>;
qcom,pin-num = <4>;
};
gpio@c400 {
reg = <0xc400 0x100>;
qcom,pin-num = <5>;
};
gpio@c500 {
reg = <0xc500 0x100>;
qcom,pin-num = <6>;
};
gpio@c600 {
reg = <0xc600 0x100>;
qcom,pin-num = <7>;
};
gpio@c700 {
reg = <0xc700 0x100>;
qcom,pin-num = <8>;
};
gpio@c800 {
reg = <0xc800 0x100>;
qcom,pin-num = <9>;
};
gpio@c900 {
reg = <0xc900 0x100>;
qcom,pin-num = <10>;
};
gpio@ca00 {
reg = <0xca00 0x100>;
qcom,pin-num = <11>;
};
gpio@cb00 {
reg = <0xcb00 0x100>;
qcom,pin-num = <12>;
};
gpio@cc00 {
reg = <0xcc00 0x100>;
qcom,pin-num = <13>;
};
gpio@cd00 {
reg = <0xcd00 0x100>;
qcom,pin-num = <14>;
};
gpio@ce00 {
reg = <0xce00 0x100>;
qcom,pin-num = <15>;
};
gpio@cf00 {
reg = <0xcf00 0x100>;
qcom,pin-num = <16>;
};
gpio@d000 {
reg = <0xd000 0x100>;
qcom,pin-num = <17>;
};
gpio@d100 {
reg = <0xd100 0x100>;
qcom,pin-num = <18>;
};
gpio@d200 {
reg = <0xd200 0x100>;
qcom,pin-num = <19>;
};
gpio@d300 {
reg = <0xd300 0x100>;
qcom,pin-num = <20>;
};
gpio@d400 {
reg = <0xd400 0x100>;
qcom,pin-num = <21>;
};
gpio@d500 {
reg = <0xd500 0x100>;
qcom,pin-num = <22>;
};
};
pma8084_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
#gpio-cells = <2>;
#address-cells = <1>;
#size-cells = <1>;
label = "pma8084-mpp";
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
};
mpp@a400 {
reg = <0xa400 0x100>;
qcom,pin-num = <5>;
};
mpp@a500 {
reg = <0xa500 0x100>;
qcom,pin-num = <6>;
};
mpp@a600 {
reg = <0xa600 0x100>;
qcom,pin-num = <7>;
};
mpp@a700 {
reg = <0xa700 0x100>;
qcom,pin-num = <8>;
};
};
};
qcom,pma8084@1 {
spmi-slave-container;
reg = <0x1>;
#address-cells = <1>;
#size-cells = <1>;
regulator@1400 {
regulator-name = "8084_s1";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1400 0x300>;
status = "disabled";
qcom,ctl@1400 {
reg = <0x1400 0x100>;
};
qcom,ps@1500 {
reg = <0x1500 0x100>;
};
qcom,freq@1600 {
reg = <0x1600 0x100>;
};
};
regulator@1700 {
regulator-name = "8084_s2";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1700 0x300>;
status = "disabled";
qcom,ctl@1700 {
reg = <0x1700 0x100>;
};
qcom,ps@1800 {
reg = <0x1800 0x100>;
};
qcom,freq@1900 {
reg = <0x1900 0x100>;
};
};
regulator@1a00 {
regulator-name = "8084_s3";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1a00 0x300>;
status = "disabled";
qcom,ctl@1a00 {
reg = <0x1a00 0x100>;
};
qcom,ps@1b00 {
reg = <0x1b00 0x100>;
};
qcom,freq@1c00 {
reg = <0x1c00 0x100>;
};
};
regulator@1d00 {
regulator-name = "8084_s4";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x1d00 0x300>;
status = "disabled";
qcom,ctl@1d00 {
reg = <0x1d00 0x100>;
};
qcom,ps@1e00 {
reg = <0x1e00 0x100>;
};
qcom,freq@1f00 {
reg = <0x1f00 0x100>;
};
};
regulator@2000 {
regulator-name = "8084_s5";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2000 0x300>;
status = "disabled";
qcom,ctl@2000 {
reg = <0x2000 0x100>;
};
qcom,ps@2100 {
reg = <0x2100 0x100>;
};
qcom,freq@2200 {
reg = <0x2200 0x100>;
};
};
regulator@2300 {
regulator-name = "8084_s6";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2300 0x300>;
status = "disabled";
qcom,ctl@2300 {
reg = <0x2300 0x100>;
};
qcom,ps@2400 {
reg = <0x2400 0x100>;
};
qcom,freq@2500 {
reg = <0x2500 0x100>;
};
};
regulator@2600 {
regulator-name = "8084_s7";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2600 0x300>;
status = "disabled";
qcom,ctl@2600 {
reg = <0x2600 0x100>;
};
qcom,ps@2700 {
reg = <0x2700 0x100>;
};
qcom,freq@2800 {
reg = <0x2800 0x100>;
};
};
regulator@2900 {
regulator-name = "8084_s8";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2900 0x300>;
status = "disabled";
qcom,ctl@2900 {
reg = <0x2900 0x100>;
};
qcom,ps@2a00 {
reg = <0x2a00 0x100>;
};
qcom,freq@2b00 {
reg = <0x2b00 0x100>;
};
};
regulator@2c00 {
regulator-name = "8084_s9";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2c00 0x300>;
status = "disabled";
qcom,ctl@2c00 {
reg = <0x2c00 0x100>;
};
qcom,ps@2d00 {
reg = <0x2d00 0x100>;
};
qcom,freq@2e00 {
reg = <0x2e00 0x100>;
};
};
regulator@2f00 {
regulator-name = "8084_s10";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x2f00 0x300>;
status = "disabled";
qcom,ctl@2f00 {
reg = <0x2f00 0x100>;
};
qcom,ps@3000 {
reg = <0x3000 0x100>;
};
qcom,freq@3100 {
reg = <0x3100 0x100>;
};
};
regulator@3200 {
regulator-name = "8084_s11";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x3200 0x300>;
status = "disabled";
qcom,ctl@3200 {
reg = <0x3200 0x100>;
};
qcom,ps@3300 {
reg = <0x3300 0x100>;
};
qcom,freq@3400 {
reg = <0x3400 0x100>;
};
};
regulator@3500 {
regulator-name = "8084_s12";
spmi-dev-container;
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-regulator";
reg = <0x3500 0x300>;
status = "disabled";
qcom,ctl@3500 {
reg = <0x3500 0x100>;
};
qcom,ps@3600 {
reg = <0x3600 0x100>;
};
qcom,freq@3700 {
reg = <0x3700 0x100>;
};
};
regulator@4000 {
regulator-name = "8084_l1";
reg = <0x4000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4100 {
regulator-name = "8084_l2";
reg = <0x4100 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4200 {
regulator-name = "8084_l3";
reg = <0x4200 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4300 {
regulator-name = "8084_l4";
reg = <0x4300 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4400 {
regulator-name = "8084_l5";
reg = <0x4400 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4500 {
regulator-name = "8084_l6";
reg = <0x4500 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4600 {
regulator-name = "8084_l7";
reg = <0x4600 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4700 {
regulator-name = "8084_l8";
reg = <0x4700 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4800 {
regulator-name = "8084_l9";
reg = <0x4800 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4900 {
regulator-name = "8084_l10";
reg = <0x4900 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4a00 {
regulator-name = "8084_l11";
reg = <0x4a00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4b00 {
regulator-name = "8084_l12";
reg = <0x4b00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4c00 {
regulator-name = "8084_l13";
reg = <0x4c00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4d00 {
regulator-name = "8084_l14";
reg = <0x4d00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4e00 {
regulator-name = "8084_l15";
reg = <0x4e00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@4f00 {
regulator-name = "8084_l16";
reg = <0x4f00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5000 {
regulator-name = "8084_l17";
reg = <0x5000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5100 {
regulator-name = "8084_l18";
reg = <0x5100 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5200 {
regulator-name = "8084_l19";
reg = <0x5200 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5300 {
regulator-name = "8084_l20";
reg = <0x5300 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5400 {
regulator-name = "8084_l21";
reg = <0x5400 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5500 {
regulator-name = "8084_l22";
reg = <0x5500 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5600 {
regulator-name = "8084_l23";
reg = <0x5600 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5700 {
regulator-name = "8084_l24";
reg = <0x5700 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5800 {
regulator-name = "8084_l25";
reg = <0x5800 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5900 {
regulator-name = "8084_l26";
reg = <0x5900 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@5a00 {
regulator-name = "8084_l27";
reg = <0x5a00 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@8000 {
regulator-name = "8084_lvs1";
reg = <0x8000 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@8100 {
regulator-name = "8084_lvs2";
reg = <0x8100 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@8200 {
regulator-name = "8084_lvs3";
reg = <0x8200 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@8300 {
regulator-name = "8084_lvs4";
reg = <0x8300 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
regulator@8400 {
regulator-name = "8084_mvs1";
reg = <0x8400 0x100>;
compatible = "qcom,qpnp-regulator";
status = "disabled";
};
};
};

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/*
* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
led_flash0: qcom,camera-led-flash {
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
};
};
&cci {
actuator0: qcom,actuator@6e {
cell-index = <3>;
reg = <0x6c>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
};
qcom,camera@6f {
compatible = "qcom,ov8825";
reg = <0x6f>;
qcom,slave-id = <0x6c 0x300a 0x8825>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,actuator-src = <&actuator0>;
qcom,led-flash-src = <&led_flash0>;
qcom,mount-angle = <0>;
qcom,sensor-name = "ov8825";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
cam_vio-supply = <&pm8226_lvs1>;
cam_vaf-supply = <&pm8226_l15>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
"cam_vaf";
qcom,cam-vreg-type = <0 1 0 0>;
qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 37 0>,
<&msmgpio 36 0>;
qcom,gpio-reset = <1>;
qcom,gpio-standby = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET1",
"CAM_STANDBY";
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x1f>;
qcom,sensor-position = <0>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
qcom,camera@6d {
compatible = "qcom,ov9724";
reg = <0x6d>;
qcom,slave-id = <0x20 0x0 0x9724>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <1>;
qcom,mount-angle = <0>;
qcom,sensor-name = "ov9724";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
cam_vio-supply = <&pm8226_lvs1>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
qcom,cam-vreg-type = <0 1 0>;
qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
qcom,cam-vreg-op-mode = <200000 0 80000>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 28 0>,
<&msmgpio 35 0>;
qcom,gpio-reset = <1>;
qcom,gpio-standby = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET",
"CAM_STANDBY";
qcom,gpio-set-tbl-num = <1 1>;
qcom,gpio-set-tbl-flags = <0 2>;
qcom,gpio-set-tbl-delay = <1000 4000>;
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x3>;
qcom,sensor-position = <1>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
status = "ok";
};
};

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/*
* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
led_flash0: qcom,camera-led-flash {
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
};
};
&cci {
actuator0: qcom,actuator@6e {
cell-index = <3>;
reg = <0x6c>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
};
qcom,camera@6f {
compatible = "qcom,ov8825";
reg = <0x6f>;
qcom,slave-id = <0x6c 0x300a 0x8825>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,actuator-src = <&actuator0>;
qcom,led-flash-src = <&led_flash0>;
qcom,mount-angle = <0>;
qcom,sensor-name = "ov8825";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
cam_vio-supply = <&pm8226_lvs1>;
cam_vaf-supply = <&pm8226_l15>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
"cam_vaf";
qcom,cam-vreg-type = <0 1 0 0>;
qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 37 0>,
<&msmgpio 35 0>;
qcom,gpio-reset = <1>;
qcom,gpio-standby = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET1",
"CAM_STANDBY";
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x1f>;
qcom,sensor-position = <0>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
qcom,camera@6d {
compatible = "qcom,ov9724";
reg = <0x6d>;
qcom,slave-id = <0x20 0x0 0x9724>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <1>;
qcom,mount-angle = <270>;
qcom,sensor-name = "ov9724";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
cam_vio-supply = <&pm8226_lvs1>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
qcom,cam-vreg-type = <0 1 0>;
qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
qcom,cam-vreg-op-mode = <200000 0 80000>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 28 0>,
<&msmgpio 36 0>;
qcom,gpio-reset = <1>;
qcom,gpio-standby = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET",
"CAM_STANDBY";
qcom,gpio-set-tbl-num = <1 1>;
qcom,gpio-set-tbl-flags = <0 2>;
qcom,gpio-set-tbl-delay = <1000 4000>;
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x3>;
qcom,sensor-position = <1>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
status = "ok";
};
};

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/*
* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
led_flash0: qcom,camera-led-flash {
cell-index = <0>;
compatible = "qcom,camera-led-flash";
qcom,flash-type = <1>;
qcom,flash-source = <&pm8226_flash0 &pm8226_flash1>;
};
};
&cci {
actuator0: qcom,actuator@6e {
cell-index = <3>;
reg = <0x6c>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
};
qcom,camera@6f {
compatible = "qcom,ov8825";
reg = <0x6f>;
qcom,slave-id = <0x6c 0x300a 0x8825>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,actuator-src = <&actuator0>;
qcom,led-flash-src = <&led_flash0>;
qcom,mount-angle = <270>;
qcom,sensor-name = "ov8825";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
cam_vio-supply = <&pm8226_lvs1>;
cam_vaf-supply = <&pm8226_l15>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
"cam_vaf";
qcom,cam-vreg-type = <0 1 0 0>;
qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 37 0>,
<&msmgpio 36 0>;
qcom,gpio-reset = <1>;
qcom,gpio-standby = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET1",
"CAM_STANDBY";
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x1f>;
qcom,sensor-position = <0>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
qcom,camera@6d {
compatible = "qcom,ov9724";
reg = <0x6d>;
qcom,slave-id = <0x20 0x0 0x9724>;
qcom,csiphy-sd-index = <1>;
qcom,csid-sd-index = <1>;
qcom,mount-angle = <270>;
qcom,sensor-name = "ov9724";
cam_vdig-supply = <&pm8226_l5>;
cam_vana-supply = <&pm8226_l19>;
cam_vio-supply = <&pm8226_lvs1>;
qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
qcom,cam-vreg-type = <0 1 0>;
qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
qcom,cam-vreg-op-mode = <200000 0 80000>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 28 0>,
<&msmgpio 35 0>;
qcom,gpio-reset = <1>;
qcom,gpio-standby = <2>;
qcom,gpio-req-tbl-num = <0 1 2>;
qcom,gpio-req-tbl-flags = <1 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET",
"CAM_STANDBY";
qcom,gpio-set-tbl-num = <1 1>;
qcom,gpio-set-tbl-flags = <0 2>;
qcom,gpio-set-tbl-delay = <1000 4000>;
qcom,csi-lane-assign = <0x4320>;
qcom,csi-lane-mask = <0x3>;
qcom,sensor-position = <1>;
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
status = "ok";
};
};

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/*
* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,msm-cam@fd8c0000 {
compatible = "qcom,msm-cam";
reg = <0xfd8c0000 0x10000>;
reg-names = "msm-cam";
};
qcom,csiphy@fda0ac00 {
cell-index = <0>;
compatible = "qcom,csiphy";
reg = <0xfda0ac00 0x200>,
<0xfda00030 0x4>;
reg-names = "csiphy", "csiphy_clk_mux";
interrupts = <0 78 0>;
interrupt-names = "csiphy";
};
qcom,csiphy@fda0b000 {
cell-index = <1>;
compatible = "qcom,csiphy";
reg = <0xfda0b000 0x200>,
<0xfda00038 0x4>;
reg-names = "csiphy", "csiphy_clk_mux";
interrupts = <0 79 0>;
interrupt-names = "csiphy";
};
qcom,csid@fda08000 {
cell-index = <0>;
compatible = "qcom,csid";
reg = <0xfda08000 0x100>;
reg-names = "csid";
interrupts = <0 51 0>;
interrupt-names = "csid";
qcom,csi-vdd-voltage = <1200000>;
qcom,mipi-csi-vdd-supply = <&pm8226_l4>;
};
qcom,csid@fda08400 {
cell-index = <1>;
compatible = "qcom,csid";
reg = <0xfda08400 0x100>;
reg-names = "csid";
interrupts = <0 52 0>;
interrupt-names = "csid";
qcom,csi-vdd-voltage = <1200000>;
qcom,mipi-csi-vdd-supply = <&pm8226_l4>;
};
qcom,ispif@fda0a000 {
cell-index = <0>;
compatible = "qcom,ispif";
reg = <0xfda0a000 0x500>,
<0xfda00020 0x10>;
reg-names = "ispif", "csi_clk_mux";
interrupts = <0 55 0>;
interrupt-names = "ispif";
};
qcom,vfe@fda10000 {
cell-index = <0>;
compatible = "qcom,vfe40";
reg = <0xfda10000 0x1000>,
<0xfda40000 0x200>;
reg-names = "vfe", "vfe_vbif";
interrupts = <0 57 0>;
interrupt-names = "vfe";
vdd-supply = <&gdsc_vfe>;
};
qcom,jpeg@fda1c000 {
cell-index = <0>;
compatible = "qcom,jpeg";
reg = <0xfda1c000 0x400>;
reg-names = "jpeg";
interrupts = <0 59 0>;
interrupt-names = "jpeg";
vdd-supply = <&gdsc_jpeg>;
};
qcom,irqrouter@fda00000 {
cell-index = <0>;
compatible = "qcom,irqrouter";
reg = <0xfda00000 0x100>;
reg-names = "irqrouter";
};
qcom,cpp@fda04000 {
cell-index = <0>;
compatible = "qcom,cpp";
reg = <0xfda04000 0x100>,
<0xfda40000 0x200>,
<0xfda18000 0x008>;
reg-names = "cpp", "cpp_vbif", "cpp_hw";
interrupts = <0 49 0>;
interrupt-names = "cpp";
vdd-supply = <&gdsc_vfe>;
};
cci: qcom,cci@fda0c000 {
cell-index = <0>;
compatible = "qcom,cci";
reg = <0xfda0c000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
reg-names = "cci";
interrupts = <0 50 0>;
interrupt-names = "cci";
gpios = <&msmgpio 29 0>,
<&msmgpio 30 0>;
qcom,gpio-tbl-num = <0 1>;
qcom,gpio-tbl-flags = <1 1>;
qcom,gpio-tbl-label = "CCI_I2C_DATA0",
"CCI_I2C_CLK0";
qcom,hw-thigh = <78>;
qcom,hw-tlow = <114>;
qcom,hw-tsu-sto = <28>;
qcom,hw-tsu-sta = <28>;
qcom,hw-thd-dat = <10>;
qcom,hw-thd-sta = <77>;
qcom,hw-tbuf = <118>;
qcom,hw-scl-stretch-en = <0>;
qcom,hw-trdhld = <6>;
qcom,hw-tsp = <1>;
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "dsi-panel-nt35590-720p-video.dtsi"
/include/ "msm8226-camera-sensor-cdp.dtsi"
&soc {
serial@f991f000 {
status = "ok";
};
qcom,mdss_dsi_nt35590_720p_video {
status = "ok";
};
i2c@f9927000 { /* BLSP1 QUP5 */
synaptics@20 {
compatible = "synaptics,rmi4";
reg = <0x20>;
interrupt-parent = <&msmgpio>;
interrupts = <17 0x2008>;
vdd-supply = <&pm8226_l19>;
vcc_i2c-supply = <&pm8226_lvs1>;
synaptics,reset-gpio = <&msmgpio 16 0x00>;
synaptics,irq-gpio = <&msmgpio 17 0x2008>;
synaptics,button-map = <139 102 158>;
synaptics,i2c-pull-up;
};
};
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
camera_focus {
label = "camera_focus";
gpios = <&msmgpio 108 0x1>;
linux,input-type = <1>;
linux,code = <0x210>;
gpio-key,wakeup;
debounce-interval = <15>;
};
camera_snapshot {
label = "camera_snapshot";
gpios = <&msmgpio 107 0x1>;
linux,input-type = <1>;
linux,code = <0x2fe>;
gpio-key,wakeup;
debounce-interval = <15>;
};
vol_up {
label = "volume_up";
gpios = <&msmgpio 106 0x1>;
linux,input-type = <1>;
linux,code = <115>;
gpio-key,wakeup;
debounce-interval = <15>;
};
};
spi@f9923000 {
ethernet-switch@3 {
compatible = "micrel,ks8851";
reg = <3>;
interrupt-parent = <&msmgpio>;
interrupts = <0 115 0>;
spi-max-frequency = <4800000>;
rst-gpio = <&msmgpio 114 0>;
vdd-io-supply = <&pm8226_lvs1>;
vdd-phy-supply = <&pm8226_lvs1>;
};
};
sound {
qcom,audio-routing =
"RX_BIAS", "MCLK",
"LDO_H", "MCLK",
"SPK_OUT", "MCLK",
"SPK_OUT", "EXT_VDD_SPKR",
"AMIC1", "MIC BIAS1 Internal1",
"MIC BIAS1 Internal1", "Handset Mic",
"AMIC2", "MIC BIAS2 External",
"MIC BIAS2 External", "Headset Mic",
"AMIC4", "MIC BIAS2 External",
"MIC BIAS2 External", "ANCRight Headset Mic",
"AMIC5", "MIC BIAS2 External",
"MIC BIAS2 External", "ANCLeft Headset Mic",
"DMIC1", "MIC BIAS1 External",
"MIC BIAS1 External", "Digital Mic1",
"DMIC2", "MIC BIAS1 External",
"MIC BIAS1 External", "Digital Mic2",
"DMIC3", "MIC BIAS3 External",
"MIC BIAS3 External", "Digital Mic3",
"DMIC4", "MIC BIAS3 External",
"MIC BIAS3 External", "Digital Mic4";
qcom,cdc-mclk-gpios = <&pm8226_gpios 1 0>;
qcom,cdc-vdd-spkr-gpios = <&pm8226_gpios 2 0>;
qcom,headset-jack-type-NO;
};
};
&sdcc1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
vdd-io-supply = <&pm8226_l6>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "disabled";
};
&sdhc_1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
vdd-io-supply = <&pm8226_l6>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "ok";
};
&sdcc2 {
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <600>;
#address-cells = <0>;
interrupt-parent = <&sdcc2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 220 0
2 &msmgpio 38 0x3>;
interrupt-names = "core_irq", "bam_irq", "status_irq";
cd-gpios = <&msmgpio 38 0x1>;
status = "disabled";
};
&sdhc_2 {
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
#address-cells = <0>;
interrupt-parent = <&sdhc_2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 221 0
2 &msmgpio 38 0x3>;
interrupt-names = "hc_irq", "pwr_irq", "status_irq";
cd-gpios = <&msmgpio 38 0x1>;
status = "ok";
};
&spmi_bus {
qcom,pm8226@0 {
qcom,leds@a100 {
status = "okay";
qcom,led_mpp_2 {
label = "mpp";
linux,name = "button-backlight";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "manual";
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x60>;
};
};
qcom,leds@a300 {
status = "okay";
qcom,led_mpp_4 {
label = "mpp";
linux,name = "green";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
qcom,pwm-channel = <0>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,use-blink;
};
};
qcom,leds@a500 {
status = "okay";
qcom,led_mpp_6 {
label = "mpp";
linux,name = "red";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
qcom,mode-ctrl = <0x60>;
qcom,source-sel = <10>;
qcom,pwm-channel = <5>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,use-blink;
};
};
};
qcom,pm8226@1 {
qcom,leds@d800 {
status = "okay";
qcom,wled_0 {
label = "wled";
linux,name = "wled:backlight";
linux,default-trigger = "bkl-trigger";
qcom,cs-out-en;
qcom,op-fdbck = <1>;
qcom,default-state = "on";
qcom,max-current = <20>;
qcom,ctrl-delay-us = <0>;
qcom,boost-curr-lim = <3>;
qcom,cp-sel = <0>;
qcom,switch-freq = <2>;
qcom,ovp-val = <0>;
qcom,num-strings = <1>;
qcom,id = <0>;
};
};
};
};
&pm8226_gpios {
gpio@c000 { /* GPIO 1 */
/* XO_PMIC_CDC_MCLK enable for tapan codec */
qcom,mode = <1>; /* Digital output */
qcom,output-type = <0>; /* CMOS logic */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO*/
qcom,vin-sel = <3>; /* QPNP_PIN_VIN3 */
qcom,out-strength = <3>;/* QPNP_PIN_OUT_STRENGTH_HIGH */
qcom,src-sel = <2>; /* QPNP_PIN_SEL_FUNC_1 */
qcom,master-en = <1>; /* Enable GPIO */
};
gpio@c100 { /* GPIO 2 */
qcom,mode = <1>;
qcom,output-type = <0>;
qcom,pull = <5>;
qcom,vin-sel = <3>;
qcom,out-strength = <3>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
};
gpio@c500 { /* GPIO 6 */
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
};
};
&pm8226_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP 5 */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
};
};
&pm8226_chg {
qcom,charging-disabled;
qcom,use-default-batt-values;
};
&usb_otg_sw {
status = "okay";
};

377
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
tmc_etr: tmc@fc322000 {
compatible = "arm,coresight-tmc";
reg = <0xfc322000 0x1000>,
<0xfc37c000 0x3000>;
reg-names = "tmc-base", "bam-base";
qcom,memory-reservation-type = "EBI1";
qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
coresight-id = <0>;
coresight-name = "coresight-tmc-etr";
coresight-nr-inports = <1>;
coresight-ctis = <&cti0 &cti8>;
};
tpiu: tpiu@fc318000 {
compatible = "arm,coresight-tpiu";
reg = <0xfc318000 0x1000>;
reg-names = "tpiu-base";
coresight-id = <1>;
coresight-name = "coresight-tpiu";
coresight-nr-inports = <1>;
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
};
replicator: replicator@fc31c000 {
compatible = "qcom,coresight-replicator";
reg = <0xfc31c000 0x1000>;
reg-names = "replicator-base";
coresight-id = <2>;
coresight-name = "coresight-replicator";
coresight-nr-inports = <1>;
coresight-outports = <0 1>;
coresight-child-list = <&tmc_etr &tpiu>;
coresight-child-ports = <0 0>;
};
tmc_etf: tmc@fc307000 {
compatible = "arm,coresight-tmc";
reg = <0xfc307000 0x1000>;
reg-names = "tmc-base";
coresight-id = <3>;
coresight-name = "coresight-tmc-etf";
coresight-nr-inports = <1>;
coresight-outports = <0>;
coresight-child-list = <&replicator>;
coresight-child-ports = <0>;
coresight-default-sink;
coresight-ctis = <&cti0 &cti8>;
};
funnel_merg: funnel@fc31b000 {
compatible = "arm,coresight-funnel";
reg = <0xfc31b000 0x1000>;
reg-names = "funnel-base";
coresight-id = <4>;
coresight-name = "coresight-funnel-merg";
coresight-nr-inports = <2>;
coresight-outports = <0>;
coresight-child-list = <&tmc_etf>;
coresight-child-ports = <0>;
};
funnel_in0: funnel@fc319000 {
compatible = "arm,coresight-funnel";
reg = <0xfc319000 0x1000>;
reg-names = "funnel-base";
coresight-id = <5>;
coresight-name = "coresight-funnel-in0";
coresight-nr-inports = <8>;
coresight-outports = <0>;
coresight-child-list = <&funnel_merg>;
coresight-child-ports = <0>;
};
funnel_in1: funnel@fc31a000 {
compatible = "arm,coresight-funnel";
reg = <0xfc31a000 0x1000>;
reg-names = "funnel-base";
coresight-id = <6>;
coresight-name = "coresight-funnel-in1";
coresight-nr-inports = <8>;
coresight-outports = <0>;
coresight-child-list = <&funnel_merg>;
coresight-child-ports = <1>;
};
funnel_a7ss: funnel@fc345000 {
compatible = "arm,coresight-funnel";
reg = <0xfc345000 0x1000>;
reg-names = "funnel-base";
coresight-id = <7>;
coresight-name = "coresight-funnel-a7ss";
coresight-nr-inports = <4>;
coresight-outports = <0>;
coresight-child-list = <&funnel_in1>;
coresight-child-ports = <5>;
};
funnel_mmss: funnel@fc364000 {
compatible = "arm,coresight-funnel";
reg = <0xfc364000 0x1000>;
reg-names = "funnel-base";
coresight-id = <8>;
coresight-name = "coresight-funnel-mmss";
coresight-nr-inports = <8>;
coresight-outports = <0>;
coresight-child-list = <&funnel_in1>;
coresight-child-ports = <1>;
};
stm: stm@fc321000 {
compatible = "arm,coresight-stm";
reg = <0xfc321000 0x1000>,
<0xfa280000 0x180000>;
reg-names = "stm-base", "stm-data-base";
coresight-id = <9>;
coresight-name = "coresight-stm";
coresight-nr-inports = <0>;
coresight-outports = <0>;
coresight-child-list = <&funnel_in1>;
coresight-child-ports = <7>;
};
etm0: etm@fc33c000 {
compatible = "arm,coresight-etm";
reg = <0xfc33c000 0x1000>;
reg-names = "etm-base";
coresight-id = <10>;
coresight-name = "coresight-etm0";
coresight-nr-inports = <0>;
coresight-outports = <0>;
coresight-child-list = <&funnel_a7ss>;
coresight-child-ports = <0>;
qcom,round-robin;
};
etm1: etm@fc33d000 {
compatible = "arm,coresight-etm";
reg = <0xfc33d000 0x1000>;
reg-names = "etm-base";
coresight-id = <11>;
coresight-name = "coresight-etm1";
coresight-nr-inports = <0>;
coresight-outports = <0>;
coresight-child-list = <&funnel_a7ss>;
coresight-child-ports = <1>;
qcom,round-robin;
};
etm2: etm@fc33e000 {
compatible = "arm,coresight-etm";
reg = <0xfc33e000 0x1000>;
reg-names = "etm-base";
coresight-id = <12>;
coresight-name = "coresight-etm2";
coresight-nr-inports = <0>;
coresight-outports = <0>;
coresight-child-list = <&funnel_a7ss>;
coresight-child-ports = <2>;
qcom,round-robin;
};
etm3: etm@fc33f000 {
compatible = "arm,coresight-etm";
reg = <0xfc33f000 0x1000>;
reg-names = "etm-base";
coresight-id = <13>;
coresight-name = "coresight-etm3";
coresight-nr-inports = <0>;
coresight-outports = <0>;
coresight-child-list = <&funnel_a7ss>;
coresight-child-ports = <3>;
qcom,round-robin;
};
csr: csr@fc302000 {
compatible = "qcom,coresight-csr";
reg = <0xfc302000 0x1000>;
reg-names = "csr-base";
coresight-id = <14>;
coresight-name = "coresight-csr";
coresight-nr-inports = <0>;
qcom,blk-size = <1>;
};
cti0: cti@fc308000 {
compatible = "arm,coresight-cti";
reg = <0xfc308000 0x1000>;
reg-names = "cti-base";
coresight-id = <15>;
coresight-name = "coresight-cti0";
coresight-nr-inports = <0>;
};
cti1: cti@fc309000 {
compatible = "arm,coresight-cti";
reg = <0xfc309000 0x1000>;
reg-names = "cti-base";
coresight-id = <16>;
coresight-name = "coresight-cti1";
coresight-nr-inports = <0>;
};
cti2: cti@fc30a000 {
compatible = "arm,coresight-cti";
reg = <0xfc30a000 0x1000>;
reg-names = "cti-base";
coresight-id = <17>;
coresight-name = "coresight-cti2";
coresight-nr-inports = <0>;
};
cti3: cti@fc30b000 {
compatible = "arm,coresight-cti";
reg = <0xfc30b000 0x1000>;
reg-names = "cti-base";
coresight-id = <18>;
coresight-name = "coresight-cti3";
coresight-nr-inports = <0>;
};
cti4: cti@fc30c000 {
compatible = "arm,coresight-cti";
reg = <0xfc30c000 0x1000>;
reg-names = "cti-base";
coresight-id = <19>;
coresight-name = "coresight-cti4";
coresight-nr-inports = <0>;
};
cti5: cti@fc30d000 {
compatible = "arm,coresight-cti";
reg = <0xfc30d000 0x1000>;
reg-names = "cti-base";
coresight-id = <20>;
coresight-name = "coresight-cti5";
coresight-nr-inports = <0>;
};
cti6: cti@fc30e000 {
compatible = "arm,coresight-cti";
reg = <0xfc30e000 0x1000>;
reg-names = "cti-base";
coresight-id = <21>;
coresight-name = "coresight-cti6";
coresight-nr-inports = <0>;
};
cti7: cti@fc30f000 {
compatible = "arm,coresight-cti";
reg = <0xfc30f000 0x1000>;
reg-names = "cti-base";
coresight-id = <22>;
coresight-name = "coresight-cti7";
coresight-nr-inports = <0>;
};
cti8: cti@fc310000 {
compatible = "arm,coresight-cti";
reg = <0xfc310000 0x1000>;
reg-names = "cti-base";
coresight-id = <23>;
coresight-name = "coresight-cti8";
coresight-nr-inports = <0>;
};
cti_l2: cti@fc340000 {
compatible = "arm,coresight-cti";
reg = <0xfc340000 0x1000>;
reg-names = "cti-base";
coresight-id = <24>;
coresight-name = "coresight-cti-l2";
coresight-nr-inports = <0>;
};
cti_cpu0: cti@fc341000 {
compatible = "arm,coresight-cti";
reg = <0xfc341000 0x1000>;
reg-names = "cti-base";
coresight-id = <25>;
coresight-name = "coresight-cti-cpu0";
coresight-nr-inports = <0>;
};
cti_cpu1: cti@fc342000 {
compatible = "arm,coresight-cti";
reg = <0xfc342000 0x1000>;
reg-names = "cti-base";
coresight-id = <26>;
coresight-name = "coresight-cti-cpu1";
coresight-nr-inports = <0>;
};
cti_cpu2: cti@fc343000 {
compatible = "arm,coresight-cti";
reg = <0xfc343000 0x1000>;
reg-names = "cti-base";
coresight-id = <27>;
coresight-name = "coresight-cti-cpu2";
coresight-nr-inports = <0>;
};
cti_cpu3: cti@fc344000 {
compatible = "arm,coresight-cti";
reg = <0xfc344000 0x1000>;
reg-names = "cti-base";
coresight-id = <28>;
coresight-name = "coresight-cti-cpu3";
coresight-nr-inports = <0>;
};
hwevent: hwevent@fd828018 {
compatible = "qcom,coresight-hwevent";
reg = <0xfd828018 0x80>,
<0xf9011080 0x80>,
<0xfd4ab160 0x80>;
reg-names = "mmss-mux", "apcs-mux", "ppss-mux";
coresight-id = <29>;
coresight-name = "coresight-hwevent";
coresight-nr-inports = <0>;
qcom,hwevent-clks = "core_mmss_clk";
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-fluid.dts Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "msm8226.dtsi"
/ {
model = "Qualcomm MSM 8226 FLUID";
compatible = "qcom,msm8226-fluid", "qcom,msm8226", "qcom,fluid";
qcom,msm-id = <145 3 0>,
<158 3 0>,
<159 3 0>,
<198 3 0>;
};
&soc {
serial@f991f000 {
status = "disabled";
};
};
&pm8226_bms {
status = "ok";
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
msm_gpu: qcom,kgsl-3d0@fdb00000 {
label = "kgsl-3d0";
compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
reg = <0xfdb00000 0x10000
0xfdb20000 0x10000>;
reg-names = "kgsl_3d0_reg_memory" , "kgsl_3d0_shader_memory";
interrupts = <0 33 0>;
interrupt-names = "kgsl_3d0_irq";
qcom,id = <0>;
qcom,chipid = <0x03000510>;
qcom,initial-pwrlevel = <1>;
qcom,idle-timeout = <8>; //<HZ/12>
qcom,strtstp-sleepwake;
qcom,clk-map = <0x00000016>; /* KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE */
/* Bus Scale Settings */
qcom,msm-bus,name = "grp3d";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <2>;
qcom,msm-bus,vectors-KBps =
<26 512 0 0>, <89 604 0 0>,
<26 512 0 1600000>, <89 604 0 3200000>,
<26 512 0 3200000>, <89 604 0 5120000>,
<26 512 0 4256000>, <89 604 0 6400000>;
/* GDSC oxili regulators */
vddcx-supply = "\0";
vdd-supply = <&gdsc_oxili_cx>;
/* IOMMU Data */
iommu = <&kgsl_iommu>;
/* Power levels */
qcom,gpu-pwrlevels {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-pwrlevels";
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <450000000>;
qcom,bus-freq = <3>;
qcom,io-fraction = <0>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <2>;
qcom,io-fraction = <33>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <200000000>;
qcom,bus-freq = <1>;
qcom,io-fraction = <100>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <19000000>;
qcom,bus-freq = <0>;
qcom,io-fraction = <0>;
};
};
qcom,dcvs-core-info {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,dcvs-core-info";
qcom,num-cores = <1>;
qcom,sensors = <0>;
qcom,core-core-type = <1>;
qcom,algo-disable-pc-threshold = <0>;
qcom,algo-em-win-size-min-us = <100000>;
qcom,algo-em-win-size-max-us = <300000>;
qcom,algo-em-max-util-pct = <97>;
qcom,algo-group-id = <95>;
qcom,algo-max-freq-chg-time-us = <100000>;
qcom,algo-slack-mode-dynamic = <100000>;
qcom,algo-slack-weight-thresh-pct = <0>;
qcom,algo-slack-time-min-us = <39000>;
qcom,algo-slack-time-max-us = <39000>;
qcom,algo-ss-win-size-min-us = <1000000>;
qcom,algo-ss-win-size-max-us = <1000000>;
qcom,algo-ss-util-pct = <95>;
qcom,algo-ss-no-corr-below-freq = <0>;
qcom,energy-active-coeff-a = <2492>;
qcom,energy-active-coeff-b = <0>;
qcom,energy-active-coeff-c = <0>;
qcom,energy-leakage-coeff-a = <11>;
qcom,energy-leakage-coeff-b = <157150>;
qcom,energy-leakage-coeff-c = <0>;
qcom,energy-leakage-coeff-d = <0>;
qcom,power-current-temp = <25>;
qcom,power-num-freq = <4>;
qcom,dcvs-freq@0 {
reg = <0>;
qcom,freq = <0>;
qcom,voltage = <0>;
qcom,is_trans_level = <0>;
qcom,active-energy-offset = <100>;
qcom,leakage-energy-offset = <0>;
};
qcom,dcvs-freq@1 {
reg = <1>;
qcom,freq = <0>;
qcom,voltage = <0>;
qcom,is_trans_level = <0>;
qcom,active-energy-offset = <100>;
qcom,leakage-energy-offset = <0>;
};
qcom,dcvs-freq@2 {
reg = <2>;
qcom,freq = <0>;
qcom,voltage = <0>;
qcom,is_trans_level = <0>;
qcom,active-energy-offset = <100>;
qcom,leakage-energy-offset = <0>;
};
qcom,dcvs-freq@3 {
reg = <3>;
qcom,freq = <0>;
qcom,voltage = <0>;
qcom,is_trans_level = <0>;
qcom,active-energy-offset = <844545>;
qcom,leakage-energy-offset = <0>;
};
};
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-iommu-domains.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,iommu-domains {
compatible = "qcom,iommu-domains";
venus_domain_ns: qcom,iommu-domain1 {
label = "venus_ns";
qcom,iommu-contexts = <&venus_ns>;
qcom,virtual-addr-pool = <0x40000000 0x3f000000
0x7f000000 0x1000000>;
};
venus_domain_cp: qcom,iommu-domain2 {
label = "venus_cp";
qcom,iommu-contexts = <&venus_cp>;
qcom,virtual-addr-pool = <0x1000000 0x3f000000>;
qcom,secure-domain;
};
};
};

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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "msm-iommu-v1.dtsi"
&jpeg_iommu {
status = "ok";
vdd-supply = <&gdsc_jpeg>;
qcom,iommu-enable-halt;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x2314
0x2394
0x2414
0x20ac
0x215c
0x220c
0x2008
0x200c
0x2010
0x2014>;
qcom,iommu-bfb-data = <0x0000ffff
0x00000000
0x4
0x4
0x0
0x0
0x10
0x50
0x0
0x10
0x20
0x0
0x0
0x0
0x0>;
};
&mdp_iommu {
status = "ok";
vdd-supply = <&gdsc_mdss>;
qcom,iommu-enable-halt;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x20ac
0x215c
0x220c
0x2314
0x2394
0x2414
0x2008
0x200c
0x2010
0x2014
0x2018
0x201c
0x2020>;
qcom,iommu-bfb-data = <0xffffffff
0x00000000
0x00000004
0x00000010
0x00000000
0x00000000
0x00000013
0x00000017
0x0
0x13
0x23
0x0
0x0
0x0
0x0
0x0
0x0
0x0>;
};
&venus_iommu {
status = "ok";
vdd-supply = <&gdsc_venus>;
qcom,iommu-enable-halt;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x20ac
0x215c
0x220c
0x2314
0x2394
0x2414
0x2008
0x200c
0x2010
0x2014
0x2018
0x201c
0x2020
0x2024
0x2028
0x202c
0x2030
0x2034
0x2038>;
qcom,iommu-bfb-data = <0xffffffff
0xffffffff
0x00000004
0x00000008
0x00000000
0x00000000
0x00000094
0x000000b4
0x0
0x94
0x114
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0>;
};
&venus_ns {
qcom,iommu-ctx-sids = <0 1 2 3 4 5 7>;
};
&venus_cp {
qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>;
};
&kgsl_iommu {
status = "ok";
vdd-supply = <&gdsc_oxili_cx>;
qcom,alt-vdd-supply = <&gdsc_oxili_gx>;
qcom,iommu-enable-halt;
qcom,needs-alt-core-clk;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x20ac
0x215c
0x220c
0x2314
0x2394
0x2414
0x2008>;
qcom,iommu-bfb-data = <0x00000003
0x0
0x00000004
0x00000010
0x00000000
0x00000000
0x00000001
0x00000011
0x0
0x1
0x41
0x0>;
};
&vfe_iommu {
status = "ok";
vdd-supply = <&gdsc_vfe>;
qcom,iommu-enable-halt;
qcom,iommu-bfb-regs = <0x204c
0x2050
0x2514
0x2540
0x256c
0x2314
0x2394
0x2414
0x20ac
0x215c
0x220c
0x2008
0x200c
0x2010
0x2014
0x2018
0x201c
0x2020>;
qcom,iommu-bfb-data = <0xffffffff
0x00000000
0x4
0x8
0x0
0x0
0x1b
0x5b
0x0
0x1b
0x2b
0x0
0x0
0x0
0x0
0x0
0x0
0x0>;
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,ion {
compatible = "qcom,msm-ion";
#address-cells = <1>;
#size-cells = <0>;
qcom,ion-heap@30 { /* SYSTEM HEAP */
reg = <30>;
};
qcom,ion-heap@21 { /* SYSTEM CONTIG HEAP */
reg = <21>;
};
qcom,ion-heap@8 { /* CP_MM HEAP */
compatible = "qcom,msm-ion-reserve";
reg = <8>;
qcom,heap-align = <0x1000>;
linux,contiguous-region = <&secure_mem>;
};
qcom,ion-heap@25 { /* IOMMU HEAP */
reg = <25>;
};
qcom,ion-heap@27 { /* QSECOM HEAP */
compatible = "qcom,msm-ion-reserve";
reg = <27>;
linux,contiguous-region = <&qsecom_mem>;
};
qcom,ion-heap@28 { /* AUDIO HEAP */
compatible = "qcom,msm-ion-reserve";
reg = <28>;
qcom,heap-align = <0x1000>;
qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */
qcom,memory-reservation-size = <0x314000>;
};
qcom,ion-heap@23 { /* OTHER PIL HEAP */
compatible = "qcom,msm-ion-reserve";
reg = <23>;
qcom,heap-align = <0x1000>;
qcom,memory-fixed = <0x06400000 0x2000000>;
};
qcom,ion-heap@26 { /* MODEM PIL HEAP */
compatible = "qcom,msm-ion-reserve";
reg = <26>;
qcom,heap-align = <0x1000>;
qcom,memory-fixed = <0x08400000 0x4E00000>;
};
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-mdss.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
reg = <0xfd900000 0x22100>,
<0xfd924000 0x1000>;
reg-names = "mdp_phys", "vbif_phys";
interrupts = <0 72 0>;
vdd-supply = <&gdsc_mdss>;
qcom,max-clk-rate = <200000000>;
qcom,mdss-pipe-vig-off = <0x00001200>;
qcom,mdss-pipe-rgb-off = <0x00001E00>;
qcom,mdss-pipe-dma-off = <0x00002A00>;
qcom,mdss-pipe-vig-fetch-id = <1>;
qcom,mdss-pipe-rgb-fetch-id = <7>;
qcom,mdss-pipe-dma-fetch-id = <4>;
qcom,mdss-smp-data = <7 4096>;
qcom,mdss-ctl-off = <0x00000600 0x00000700>;
qcom,mdss-mixer-intf-off = <0x00003200>;
qcom,mdss-mixer-wb-off = <0x00003E00>;
qcom,mdss-dspp-off = <0x00004600>;
qcom,mdss-pingpong-off = <0x00021B00>;
qcom,mdss-wb-off = <0x00011100 0x00013100>;
qcom,mdss-intf-off = <0x00000000 0x00021300>;
qcom,mdss-rot-block-size = <64>;
qcom,vbif-settings = <0x004 0x00000001>,
<0x0D8 0x00000707>,
<0x124 0x00000003>;
qcom,mdp-settings = <0x02E0 0x000000A9>,
<0x02E4 0x00000055>;
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
qcom,memory-reservation-type = "EBI1";
qcom,memory-reservation-size = <0x800000>;
};
mdss_fb1: qcom,mdss_fb_wfd {
cell-index = <1>;
compatible = "qcom,mdss-fb";
};
};
mdss_dsi0: qcom,mdss_dsi@fd922800 {
compatible = "qcom,mdss-dsi-ctrl";
label = "MDSS DSI CTRL->0";
cell-index = <0>;
reg = <0xfd922800 0x600>;
vdd-supply = <&pm8226_l15>;
vddio-supply = <&pm8226_l8>;
vdda-supply = <&pm8226_l4>;
qcom,supply-names = "vdd", "vddio", "vdda";
qcom,supply-min-voltage-level = <2800000 1800000 1200000>;
qcom,supply-max-voltage-level = <2800000 1800000 1200000>;
qcom,supply-peak-current = <150000 100000 100000>;
qcom,mdss-fb-map = <&mdss_fb0>;
};
qcom,mdss_wb_panel {
compatible = "qcom,mdss_wb";
qcom,mdss_pan_res = <1280 720>;
qcom,mdss_pan_bpp = <24>;
qcom,mdss-fb-map = <&mdss_fb1>;
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-mtp.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "dsi-panel-nt35590-720p-video.dtsi"
/include/ "msm8226-camera-sensor-mtp.dtsi"
&soc {
serial@f991f000 {
status = "ok";
};
qcom,mdss_dsi_nt35590_720p_video {
status = "ok";
};
i2c@f9927000 { /* BLSP1 QUP5 */
synaptics@20 {
compatible = "synaptics,rmi4";
reg = <0x20>;
interrupt-parent = <&msmgpio>;
interrupts = <17 0x2008>;
vdd-supply = <&pm8226_l19>;
vcc_i2c-supply = <&pm8226_lvs1>;
synaptics,reset-gpio = <&msmgpio 16 0x00>;
synaptics,irq-gpio = <&msmgpio 17 0x2008>;
synaptics,button-map = <139 102 158>;
synaptics,i2c-pull-up;
};
};
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
camera_focus {
label = "camera_focus";
gpios = <&msmgpio 108 0x1>;
linux,input-type = <1>;
linux,code = <0x210>;
gpio-key,wakeup;
debounce-interval = <15>;
};
camera_snapshot {
label = "camera_snapshot";
gpios = <&msmgpio 107 0x1>;
linux,input-type = <1>;
linux,code = <0x2fe>;
gpio-key,wakeup;
debounce-interval = <15>;
};
vol_up {
label = "volume_up";
gpios = <&msmgpio 106 0x1>;
linux,input-type = <1>;
linux,code = <115>;
gpio-key,wakeup;
debounce-interval = <15>;
};
};
spi@f9923000 {
ethernet-switch@3 {
compatible = "micrel,ks8851";
reg = <3>;
interrupt-parent = <&msmgpio>;
interrupts = <0 115 0>;
spi-max-frequency = <4800000>;
rst-gpio = <&msmgpio 114 0>;
vdd-io-supply = <&pm8226_lvs1>;
vdd-phy-supply = <&pm8226_lvs1>;
};
};
sound {
qcom,audio-routing =
"RX_BIAS", "MCLK",
"LDO_H", "MCLK",
"SPK_OUT", "MCLK",
"SPK_OUT", "EXT_VDD_SPKR",
"AMIC1", "MIC BIAS1 External",
"MIC BIAS1 External", "Handset Mic",
"AMIC2", "MIC BIAS2 External",
"MIC BIAS2 External", "Headset Mic",
"AMIC3", "MIC BIAS1 External",
"MIC BIAS1 External", "ANCRight Headset Mic",
"AMIC4", "MIC BIAS2 External",
"MIC BIAS2 External", "ANCLeft Headset Mic";
qcom,cdc-mclk-gpios = <&pm8226_gpios 1 0>;
qcom,cdc-vdd-spkr-gpios = <&pm8226_gpios 2 0>;
};
};
&usb_otg {
#address-cells = <0>;
interrupt-parent = <&usb_otg>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 134 0
1 &intc 0 140 0
2 &spmi_bus 0x0 0x0 0x9 0x0>;
interrupt-names = "core_irq", "async_irq", "pmic_id_irq";
qcom,hsusb-otg-mode = <3>;
vbus_otg-supply = <&usb_otg_sw>;
};
&sdcc1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
vdd-io-supply = <&pm8226_l6>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "disabled";
};
&sdhc_1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
vdd-io-supply = <&pm8226_l6>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "ok";
};
&sdcc2 {
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <600>; #address-cells = <0>; interrupt-parent = <&sdcc2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 220 0
2 &msmgpio 38 0x3>;
interrupt-names = "core_irq", "bam_irq", "status_irq";
cd-gpios = <&msmgpio 38 0x1>;
status = "disabled";
};
&sdhc_2 {
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
#address-cells = <0>;
interrupt-parent = <&sdhc_2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 221 0
2 &msmgpio 38 0x3>;
interrupt-names = "hc_irq", "pwr_irq", "status_irq";
cd-gpios = <&msmgpio 38 0x1>;
status = "ok";
};
&spmi_bus {
qcom,pm8226@0 {
qcom,leds@a100 {
status = "okay";
qcom,led_mpp_2 {
label = "mpp";
linux,name = "button-backlight";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "manual";
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x60>;
};
};
qcom,leds@a300 {
status = "okay";
qcom,led_mpp_4 {
label = "mpp";
linux,name = "green";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
qcom,pwm-channel = <0>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,use-blink;
};
};
qcom,leds@a500 {
status = "okay";
qcom,led_mpp_6 {
label = "mpp";
linux,name = "red";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
qcom,mode-ctrl = <0x60>;
qcom,source-sel = <10>;
qcom,pwm-channel = <5>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,use-blink;
};
};
};
qcom,pm8226@1 {
qcom,leds@d300 {
status = "okay";
};
qcom,leds@d800 {
status = "okay";
qcom,wled_0 {
label = "wled";
linux,name = "wled:backlight";
linux,default-trigger = "bkl-trigger";
qcom,cs-out-en;
qcom,op-fdbck = <1>;
qcom,default-state = "on";
qcom,max-current = <20>;
qcom,ctrl-delay-us = <0>;
qcom,boost-curr-lim = <3>;
qcom,cp-sel = <0>;
qcom,switch-freq = <2>;
qcom,ovp-val = <0>;
qcom,num-strings = <1>;
qcom,id = <0>;
};
};
};
};
&pm8226_gpios {
gpio@c000 { /* GPIO 1 */
/* XO_PMIC_CDC_MCLK enable for tapan codec */
qcom,mode = <1>; /* Digital output */
qcom,output-type = <0>; /* CMOS logic */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO*/
qcom,vin-sel = <3>; /* QPNP_PIN_VIN3 */
qcom,out-strength = <3>;/* QPNP_PIN_OUT_STRENGTH_HIGH */
qcom,src-sel = <2>; /* QPNP_PIN_SEL_FUNC_1 */
qcom,master-en = <1>; /* Enable GPIO */
};
gpio@c100 { /* GPIO 2 */
qcom,mode = <1>;
qcom,output-type = <0>;
qcom,pull = <5>;
qcom,vin-sel = <3>;
qcom,out-strength = <3>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
};
gpio@c500 { /* GPIO 6 */
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
};
};
&pm8226_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP 5 */
/* PA_THERM0 config */
qcom,mode = <4>; /* AIN input */
qcom,invert = <1>; /* Enable MPP */
qcom,ain-route = <0>; /* AMUX 5 */
qcom,master-en = <1>;
qcom,src-sel = <0>; /* Function constant */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
/* PA_THERM1 config */
qcom,mode = <4>; /* AIN input */
qcom,invert = <1>; /* Enable MPP */
qcom,ain-route = <3>; /* AMUX 8 */
qcom,master-en = <1>;
qcom,src-sel = <0>; /* Function constant */
};
};
&pm8226_vadc {
chan@14 {
label = "pa_therm0";
reg = <0x14>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@17 {
label = "pa_therm1";
reg = <0x17>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
};
&pm8226_bms {
status = "ok";
};
&pm8226_chg {
qcom,charging-disabled;
};
&usb_otg_sw {
status = "okay";
};
&slim_msm {
tapan_codec {
qcom,cdc-micbias1-ext-cap;
};
};

389
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/* Copyright (c) 2013 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton.dtsi"
&soc {
qcom,spm@f9089000 {
compatible = "qcom,spm-v2";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xf9089000 0x1000>;
qcom,core-id = <0>;
qcom,saw2-ver-reg = <0xfd0>;
qcom,saw2-cfg = <0x01>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
};
qcom,spm@f9099000 {
compatible = "qcom,spm-v2";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xf9099000 0x1000>;
qcom,core-id = <1>;
qcom,saw2-ver-reg = <0xfd0>;
qcom,saw2-cfg = <0x01>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
};
qcom,spm@f90a9000 {
compatible = "qcom,spm-v2";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xf90a9000 0x1000>;
qcom,core-id = <2>;
qcom,saw2-ver-reg = <0xfd0>;
qcom,saw2-cfg = <0x01>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
};
qcom,spm@f90b9000 {
compatible = "qcom,spm-v2";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xf90b9000 0x1000>;
qcom,core-id = <3>;
qcom,saw2-ver-reg = <0xfd0>;
qcom,saw2-cfg = <0x01>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-spm-cmd-wfi = [60 03 60 0b 0f];
qcom,saw2-spm-cmd-spc = [00 20 10 80 30 90 5b 60 03 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
qcom,saw2-spm-cmd-pc = [00 20 10 80 30 90 5b 60 07 60 3b 76 76
0b 94 5b 80 10 06 26 30 0f];
};
qcom,spm@f9012000 {
compatible = "qcom,spm-v2";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xf9012000 0x1000>;
qcom,core-id = <0xffff>; /* L2/APCS SAW */
qcom,saw2-ver-reg = <0xfd0>;
qcom,saw2-cfg = <0x14>;
qcom,saw2-spm-dly= <0x3c102800>;
qcom,saw2-spm-ctl = <0x0>;
qcom,saw2-pmic-data0 = <0x02030080>;
qcom,saw2-pmic-data1 = <0x00030000>;
qcom,vctl-timeout-us = <50>;
qcom,vctl-port = <0x0>;
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
qcom,saw2-spm-cmd-ret = [00 03 00 7b 0f];
qcom,saw2-spm-cmd-pc = [00 32 b0 10 e0 d0 6b c0 42 f0
11 07 01 b0 4e c0 d0 12 e0 6b 50 02 32
50 f0 7b 0f]; /*APCS_PMIC_OFF_L2RAM_OFF*/
};
qcom,lpm-resources {
compatible = "qcom,lpm-resources";
#address-cells = <1>;
#size-cells = <0>;
qcom,lpm-resources@0 {
reg = <0x0>;
qcom,name = "vdd-dig";
qcom,type = <0x61706d73>; /* "smpa" */
qcom,id = <0x01>;
qcom,key = <0x6e726f63>; /* "corn" */
qcom,init-value = <3>; /* SVS SOC */
};
qcom,lpm-resources@1 {
reg = <0x1>;
qcom,name = "vdd-mem";
qcom,type = <0x616F646C>; /* "ldoa" */
qcom,id = <0x03>;
qcom,key = <0x6e726f63>; /* "corn" */
qcom,init-value = <3>; /* SVS SOC */
};
qcom,lpm-resources@2 {
reg = <0x2>;
qcom,name = "pxo";
qcom,type = <0x306b6c63>; /* "clk0" */
qcom,id = <0x00>;
qcom,key = <0x62616e45>; /* "Enab" */
qcom,init-value = "xo_on";
};
qcom,lpm-resources@3 {
reg = <0x3>;
qcom,name = "l2";
qcom,local-resource-type;
qcom,init-value = "l2_cache_retention";
};
};
qcom,lpm-levels {
compatible = "qcom,lpm-levels";
#address-cells = <1>;
#size-cells = <0>;
qcom,lpm-level@0 {
reg = <0x0>;
qcom,mode = "wfi";
qcom,xo = "xo_on";
qcom,l2 = "l2_cache_active";
qcom,vdd-mem-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-mem-lower-bound = <4>; /* NORMAL */
qcom,vdd-dig-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-dig-lower-bound = <4>; /* NORMAL */
qcom,irqs-detectable;
qcom,gpio-detectable;
qcom,latency-us = <1>;
qcom,ss-power = <784>;
qcom,energy-overhead = <190000>;
qcom,time-overhead = <100>;
};
qcom,lpm-level@1 {
reg = <0x1>;
qcom,mode = "standalone_pc";
qcom,xo = "xo_on";
qcom,l2 = "l2_cache_active";
qcom,vdd-mem-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-mem-lower-bound = <4>; /* NORMAL */
qcom,vdd-dig-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-dig-lower-bound = <4>; /* NORMAL */
qcom,irqs-detectable;
qcom,gpio-detectable;
qcom,latency-us = <3000>;
qcom,ss-power = <725>;
qcom,energy-overhead = <99500>;
qcom,time-overhead = <3130>;
};
qcom,lpm-level@2 {
reg = <0x2>;
qcom,mode = "pc";
qcom,xo = "xo_on";
qcom,l2 = "l2_cache_retention";
qcom,vdd-mem-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-mem-lower-bound = <4>; /* NORMAL */
qcom,vdd-dig-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-dig-lower-bound = <4>; /* NORMAL */
qcom,irqs-detectable;
qcom,gpio-detectable;
qcom,latency-us = <8000>;
qcom,ss-power = <138>;
qcom,energy-overhead = <1208400>;
qcom,time-overhead = <9200>;
};
qcom,lpm-level@3 {
reg = <0x3>;
qcom,mode = "pc";
qcom,xo = "xo_on";
qcom,l2 = "l2_cache_pc";
qcom,vdd-mem-upper-bound = <4>; /* NORMAL */
qcom,vdd-mem-lower-bound = <3>; /* SVS SOC */
qcom,vdd-dig-upper-bound = <4>; /* NORMAL */
qcom,vdd-dig-lower-bound = <3>; /* SVS SOC */
qcom,irqs-detectable;
qcom,gpio-detectable;
qcom,latency-us = <9000>;
qcom,ss-power = <110>;
qcom,energy-overhead = <1250300>;
qcom,time-overhead = <9500>;
};
qcom,lpm-level@4 {
reg = <0x4>;
qcom,mode = "pc";
qcom,xo = "xo_off";
qcom,l2 = "l2_cache_pc";
qcom,vdd-mem-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-mem-lower-bound = <4>; /* NORMAL */
qcom,vdd-dig-upper-bound = <6>; /* SUPER TURBO */
qcom,vdd-dig-lower-bound = <4>; /* NORMAL */
qcom,latency-us = <16300>;
qcom,ss-power = <63>;
qcom,energy-overhead = <2128000>;
qcom,time-overhead = <24200>;
};
qcom,lpm-level@5 {
reg = <0x5>;
qcom,mode = "pc";
qcom,xo = "xo_off";
qcom,l2 = "l2_cache_pc";
qcom,vdd-mem-upper-bound = <4>; /* NORMAL */
qcom,vdd-mem-lower-bound = <3>; /* SVS SOC */
qcom,vdd-dig-upper-bound = <4>; /* NORMAL */
qcom,vdd-dig-lower-bound = <3>; /* SVS SOC */
qcom,latency-us = <24000>;
qcom,ss-power = <10>;
qcom,energy-overhead = <3202600>;
qcom,time-overhead = <33000>;
};
qcom,lpm-level@6 {
reg = <0x6>;
qcom,mode = "pc";
qcom,xo = "xo_off";
qcom,l2 = "l2_cache_pc";
qcom,vdd-mem-upper-bound = <3>; /* SVS SOC */
qcom,vdd-mem-lower-bound = <1>; /* RETENTION */
qcom,vdd-dig-upper-bound = <3>; /* SVS SOC */
qcom,vdd-dig-lower-bound = <1>; /* RETENTION */
qcom,latency-us = <26000>;
qcom,ss-power = <2>;
qcom,energy-overhead = <4252000>;
qcom,time-overhead = <38000>;
};
};
qcom,pm-boot {
compatible = "qcom,pm-boot";
qcom,mode = "tz";
};
qcom,mpm@fc4281d0 {
compatible = "qcom,mpm-v2";
reg = <0xfc4281d0 0x1000>, /* MSM_RPM_MPM_BASE 4K */
<0xf9011008 0x4>; /* MSM_APCS_GCC_BASE 4K */
reg-names = "vmpm", "ipc";
interrupts = <0 171 1>;
qcom,ipc-bit-offset = <1>;
qcom,gic-parent = <&intc>;
qcom,gic-map = <47 172>, /* usb2_hsic_async_wakeup_irq */
<53 104>, /* mdss_irq */
<62 222>, /* ee0_krait_hlos_spmi_periph_irq */
<2 216>, /* tsens_upper_lower_int */
<0xff 56>, /* q6_wdog_expired_irq */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
<0xff 60>, /* mss_to_apps_irq(3) */
<0xff 61>, /* mss_a2_bam_irq */
<0xff 173>, /* o_wcss_apss_smd_hi */
<0xff 174>, /* o_wcss_apss_smd_med */
<0xff 175>, /* o_wcss_apss_smd_low */
<0xff 176>, /* o_wcss_apss_smsm_irq */
<0xff 177>, /* o_wcss_apss_wlan_data_xfer_done */
<0xff 178>, /* o_wcss_apss_wlan_rx_data_avail */
<0xff 179>, /* o_wcss_apss_asic_intr
<0xff 181>, /* o_wcss_apss_wdog_bite_and_reset_rdy */
<0xff 188>, /* lpass_irq_out_apcs(0) */
<0xff 189>, /* lpass_irq_out_apcs(1) */
<0xff 190>, /* lpass_irq_out_apcs(2) */
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
<0xff 194>, /* lpass_irq_out_apcs[6] */
<0xff 195>, /* lpass_irq_out_apcs[7] */
<0xff 196>, /* lpass_irq_out_apcs[8] */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
<0xff 203>, /* rpm_ipc(7) */
<0xff 204>, /* rpm_ipc(24) */
<0xff 205>, /* rpm_ipc(25) */
<0xff 206>, /* rpm_ipc(26) */
<0xff 207>, /* rpm_ipc(27) */
<0xff 258>, /* rpm_ipc(28) */
<0xff 259>, /* rpm_ipc(29) */
<0xff 275>, /* rpm_ipc(30) */
<0xff 276>, /* rpm_ipc(31) */
<0xff 269>, /* rpm_wdog_expired_irq */
<0xff 240>; /* summary_irq_kpss */
qcom,gpio-parent = <&msmgpio>;
qcom,gpio-map = <3 1>,
<4 4 >,
<5 5 >,
<6 9 >,
<7 13>,
<8 17>,
<9 21>,
<10 27>,
<11 29>,
<12 31>,
<13 33>,
<14 35>,
<15 37>,
<16 38>,
<17 39>,
<18 41>,
<19 46>,
<20 48>,
<21 49>,
<22 50>,
<23 51>,
<24 52>,
<25 54>,
<26 62>,
<27 63>,
<28 64>,
<29 65>,
<30 66>,
<31 67>,
<32 68>,
<33 69>,
<34 71>,
<35 72>,
<36 106>,
<37 107>,
<38 108>,
<39 109>,
<40 110>,
<54 111>,
<55 113>;
};
qcom,pm-8x60@fe805664 {
compatible = "qcom,pm-8x60";
reg = <0xfe805664 0x40>;
qcom,pc-mode = "tz_l2_int";
qcom,use-sync-timer;
qcom,pc-resets-timer;
};
qcom,rpm-log@fc19dc00 {
compatible = "qcom,rpm-log";
reg = <0xfc19dc00 0x4000>;
qcom,rpm-addr-phys = <0xfc000000>;
qcom,offset-version = <4>;
qcom,offset-page-buffer-addr = <36>;
qcom,offset-log-len = <40>;
qcom,offset-log-len-mask = <44>;
qcom,offset-page-indices = <56>;
};
qcom,rpm-stats@fc19dba0 {
compatible = "qcom,rpm-stats";
reg = <0xfc19dba0 0x1000>;
reg-names = "phys_addr_base";
qcom,sleep-stats-version = <2>;
};
};

406
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "dsi-panel-nt35590-720p-video.dtsi"
/include/ "msm8226-camera-sensor-qrd.dtsi"
&soc {
serial@f991f000 {
status = "ok";
};
qcom,mdss_dsi_nt35590_720p_video {
status = "ok";
};
i2c@f9927000 { /* BLSP1 QUP5 */
synaptics@20 {
compatible = "synaptics,rmi4";
reg = <0x20>;
interrupt-parent = <&msmgpio>;
interrupts = <17 0x2008>;
vdd-supply = <&pm8226_l19>;
vcc_i2c-supply = <&pm8226_lvs1>;
synaptics,reset-gpio = <&msmgpio 16 0x00>;
synaptics,irq-gpio = <&msmgpio 17 0x2008>;
synaptics,button-map = <139 102 158>;
synaptics,i2c-pull-up;
};
};
gpio_keys {
compatible = "gpio-keys";
input-name = "gpio-keys";
camera_focus {
label = "camera_focus";
gpios = <&msmgpio 108 0x1>;
linux,input-type = <1>;
linux,code = <0x210>;
gpio-key,wakeup;
debounce-interval = <15>;
};
camera_snapshot {
label = "camera_snapshot";
gpios = <&msmgpio 107 0x1>;
linux,input-type = <1>;
linux,code = <0x2fe>;
gpio-key,wakeup;
debounce-interval = <15>;
};
vol_up {
label = "volume_up";
gpios = <&msmgpio 106 0x1>;
linux,input-type = <1>;
linux,code = <115>;
gpio-key,wakeup;
debounce-interval = <15>;
};
};
spi@f9923000 {
ethernet-switch@3 {
compatible = "micrel,ks8851";
reg = <3>;
interrupt-parent = <&msmgpio>;
interrupts = <0 115 0>;
spi-max-frequency = <4800000>;
rst-gpio = <&msmgpio 114 0>;
vdd-io-supply = <&pm8226_lvs1>;
vdd-phy-supply = <&pm8226_lvs1>;
};
};
sound {
qcom,audio-routing =
"RX_BIAS", "MCLK",
"LDO_H", "MCLK",
"SPK_OUT", "MCLK",
"SPK_OUT", "EXT_VDD_SPKR",
"AMIC1", "MIC BIAS1 External",
"MIC BIAS1 External", "Handset Mic",
"AMIC2", "MIC BIAS2 External",
"MIC BIAS2 External", "Headset Mic",
"AMIC3", "MIC BIAS1 External",
"MIC BIAS1 External", "ANCRight Headset Mic",
"AMIC4", "MIC BIAS2 External",
"MIC BIAS2 External", "ANCLeft Headset Mic";
qcom,cdc-mclk-gpios = <&pm8226_gpios 1 0>;
qcom,cdc-vdd-spkr-gpios = <&pm8226_gpios 2 0>;
qcom,cdc-us-euro-gpios = <&msmgpio 69 0>;
};
};
&sdcc1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
vdd-io-supply = <&pm8226_l6>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "disabled";
};
&sdhc_1 {
vdd-supply = <&pm8226_l17>;
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
vdd-io-supply = <&pm8226_l6>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "ok";
};
&sdcc2 {
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <600>;
#address-cells = <0>;
interrupt-parent = <&sdcc2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 220 0
2 &msmgpio 38 0x3>;
interrupt-names = "core_irq", "bam_irq", "status_irq";
cd-gpios = <&msmgpio 38 0x1>;
status = "disabled";
};
&sdhc_2 {
vdd-supply = <&pm8226_l18>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
#address-cells = <0>;
interrupt-parent = <&sdhc_2>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 221 0
2 &msmgpio 38 0x3>;
interrupt-names = "hc_irq", "pwr_irq", "status_irq";
cd-gpios = <&msmgpio 38 0x1>;
status = "ok";
};
&spmi_bus {
qcom,pm8226@0 {
qcom,leds@a100 {
status = "okay";
qcom,led_mpp_2 {
label = "mpp";
linux,name = "button-backlight";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "manual";
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x60>;
};
};
qcom,leds@a300 {
status = "okay";
qcom,led_mpp_4 {
label = "mpp";
linux,name = "green";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
qcom,pwm-channel = <0>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,use-blink;
};
};
qcom,leds@a500 {
status = "okay";
qcom,led_mpp_6 {
label = "mpp";
linux,name = "red";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
qcom,mode-ctrl = <0x60>;
qcom,source-sel = <10>;
qcom,pwm-channel = <5>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,use-blink;
};
};
};
qcom,pm8226@1 {
qcom,leds@d300 {
status = "okay";
};
qcom,leds@d800 {
status = "okay";
qcom,wled_0 {
label = "wled";
linux,name = "wled:backlight";
linux,default-trigger = "bkl-trigger";
qcom,cs-out-en;
qcom,op-fdbck = <1>;
qcom,default-state = "on";
qcom,max-current = <20>;
qcom,ctrl-delay-us = <0>;
qcom,boost-curr-lim = <3>;
qcom,cp-sel = <0>;
qcom,switch-freq = <2>;
qcom,ovp-val = <0>;
qcom,num-strings = <1>;
qcom,id = <0>;
};
};
qcom,vibrator@c000 {
status = "okay";
qcom,vib-timeout-ms = <15000>;
qcom,vib-vtg-level-mV = <3100>;
};
};
};
&pm8226_bms {
status = "okay";
qcom,batt-type = <4>;
qcom,max-voltage-uv = <4350000>;
};
&pm8226_chg {
status = "okay";
qcom,chg-vddmax-mv = <4350>;
qcom,chg-vddsafe-mv = <4350>;
};
&pm8226_gpios {
gpio@c000 { /* GPIO 1 */
/* XO_PMIC_CDC_MCLK enable for tapan codec */
qcom,mode = <1>; /* Digital output */
qcom,output-type = <0>; /* CMOS logic */
qcom,pull = <5>; /* QPNP_PIN_PULL_NO*/
qcom,vin-sel = <3>; /* QPNP_PIN_VIN3 */
qcom,out-strength = <3>;/* QPNP_PIN_OUT_STRENGTH_HIGH */
qcom,src-sel = <2>; /* QPNP_PIN_SEL_FUNC_1 */
qcom,master-en = <1>; /* Enable GPIO */
};
gpio@c100 { /* GPIO 2 */
qcom,mode = <1>;
qcom,output-type = <0>;
qcom,pull = <5>;
qcom,vin-sel = <3>;
qcom,out-strength = <3>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
};
gpio@c500 { /* GPIO 6 */
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
};
};
&pm8226_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP 5 */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
};
};
&slim_msm {
tapan_codec {
qcom,cdc-micbias1-ext-cap;
};
};

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* SPM controlled regulators: */
&spmi_bus {
qcom,pm8226@1 {
pm8226_s2: spm-regulator@1700 {
compatible = "qcom,spm-regulator";
regulator-name = "8226_s2";
reg = <0x1700 0x100>;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1275000>;
};
};
};
/* CPR controlled regulator */
&soc {
apc_vreg_corner: regulator@f9018000 {
status = "okay";
compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xf9011064 4>, <0xfc4b80b0 8>,
<0xfc4bc450 16>;
reg-names = "rbcpr", "rbcpr_clk", "pvs_efuse", "cpr_efuse";
interrupts = <0 15 0>;
regulator-name = "apc_corner";
regulator-min-microvolt = <1>;
regulator-max-microvolt = <3>;
qcom,num-efuse-bits = <5>;
qcom,pvs-bin-process = <0 0 0 0 0 1 1 1 1 1 2 2 2 2 2 2
2 2 2 2 3 3 3 3 3 3 3 3 0 0 0 0>;
qcom,pvs-corner-ceiling-slow = <1155000 1160000 1275000>;
qcom,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
qcom,vdd-mx-vmax = <1350000>;
qcom,vdd-mx-vmin-method = <1>;
qcom,cpr-ref-clk = <19200>;
qcom,cpr-timer-delay = <5000>;
qcom,cpr-timer-cons-up = <1>;
qcom,cpr-timer-cons-down = <2>;
qcom,cpr-irq-line = <0>;
qcom,cpr-step-quotient = <15>;
qcom,cpr-up-threshold = <1>;
qcom,cpr-down-threshold = <2>;
qcom,cpr-idle-clocks = <5>;
qcom,cpr-gcnt-time = <1>;
qcom,vdd-apc-step-up-limit = <1>;
qcom,vdd-apc-step-down-limit = <1>;
qcom,cpr-apc-volt-step = <5000>;
};
};
/* RPM controlled regulators: */
&rpm_bus {
rpm-regulator-smpa1 {
status = "okay";
pm8226_s1: regulator-s1 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1275000>;
status = "okay";
};
pm8226_s1_corner: regulator-s1-corner {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_s1_corner";
qcom,set = <3>;
regulator-min-microvolt = <1>;
regulator-max-microvolt = <7>;
qcom,use-voltage-corner;
qcom,consumer-supplies = "vdd_dig", "";
};
pm8226_s1_corner_ao: regulator-s1-corner-ao {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_s1_corner_ao";
qcom,set = <1>;
regulator-min-microvolt = <1>;
regulator-max-microvolt = <7>;
qcom,use-voltage-corner;
qcom,consumer-supplies = "vdd_sr2_dig", "";
};
};
rpm-regulator-smpa3 {
status = "okay";
pm8226_s3: regulator-s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
qcom,init-voltage = <1200000>;
status = "okay";
};
};
rpm-regulator-smpa4 {
status = "okay";
pm8226_s4: regulator-s4 {
regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>;
qcom,init-voltage = <2100000>;
status = "okay";
};
};
rpm-regulator-smpa5 {
status = "okay";
pm8226_s5: regulator-s5 {
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1150000>;
qcom,init-voltage = <1150000>;
status = "okay";
};
};
rpm-regulator-ldoa1 {
status = "okay";
pm8226_l1: regulator-l1 {
regulator-name = "8226_l1";
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,init-voltage = <1225000>;
status = "okay";
};
};
rpm-regulator-ldoa2 {
status = "okay";
pm8226_l2: regulator-l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,init-voltage = <1200000>;
status = "okay";
};
};
rpm-regulator-ldoa3 {
status = "okay";
pm8226_l3: regulator-l3 {
regulator-name = "8226_l3";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1275000>;
status = "okay";
};
pm8226_l3_ao: regulator-3-ao {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l3_ao";
qcom,set = <1>;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1275000>;
status = "okay";
};
pm8226_l3_so: regulator-l3-so {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l3_so";
qcom,set = <2>;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1275000>;
qcom,init-voltage = <750000>;
status = "okay";
};
};
rpm-regulator-ldoa4 {
status = "okay";
pm8226_l4: regulator-l4 {
regulator-name = "8226_l4";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,init-voltage = <1200000>;
status = "okay";
};
};
rpm-regulator-ldoa5 {
status = "okay";
pm8226_l5: regulator-l5 {
regulator-name = "8226_l5";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,init-voltage = <1200000>;
status = "okay";
};
};
rpm-regulator-ldoa6 {
status = "okay";
pm8226_l6: regulator-l6 {
regulator-name = "8226_l6";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
status = "okay";
};
};
rpm-regulator-ldoa7 {
status = "okay";
pm8226_l7: regulator-l7 {
regulator-name = "8226_l7";
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <1850000>;
qcom,init-voltage = <1850000>;
status = "okay";
};
};
rpm-regulator-ldoa8 {
status = "okay";
pm8226_l8: regulator-l8 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
status = "okay";
};
pm8226_l8_ao: regulator-l8-ao {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l8_ao";
qcom,set = <1>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
qcom,consumer-supplies = "vdd_sr2_pll", "";
};
pm8226_l8_so: regulator-l8-so {
compatible = "qcom,rpm-regulator-smd";
regulator-name = "8226_l8_so";
qcom,set = <2>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
qcom,init-enable = <0>;
};
};
rpm-regulator-ldoa9 {
status = "okay";
pm8226_l9: regulator-l9 {
regulator-name = "8226_l9";
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
qcom,init-voltage = <2050000>;
status = "okay";
};
};
rpm-regulator-ldoa10 {
status = "okay";
pm8226_l10: regulator-l10 {
regulator-name = "8226_l10";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
status = "okay";
};
};
rpm-regulator-ldoa12 {
status = "okay";
pm8226_l12: regulator-l12 {
regulator-name = "8226_l12";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
status = "okay";
};
};
rpm-regulator-ldoa14 {
status = "okay";
pm8226_l14: regulator-l14 {
regulator-name = "8226_l14";
regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <2750000>;
qcom,init-voltage = <2750000>;
status = "okay";
};
};
rpm-regulator-ldoa15 {
status = "okay";
pm8226_l15: regulator-l15 {
regulator-name = "8226_l15";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
qcom,init-voltage = <2800000>;
status = "okay";
};
};
rpm-regulator-ldoa16 {
status = "okay";
pm8226_l16: regulator-l16 {
regulator-name = "8226_l16";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
qcom,init-voltage = <3300000>;
status = "okay";
};
};
rpm-regulator-ldoa17 {
status = "okay";
pm8226_l17: regulator-l17 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <2950000>;
status = "okay";
};
};
rpm-regulator-ldoa18 {
status = "okay";
pm8226_l18: regulator-l18 {
regulator-name = "8226_l18";
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <2950000>;
status = "okay";
};
};
rpm-regulator-ldoa19 {
status = "okay";
pm8226_l19: regulator-l19 {
regulator-name = "8226_l19";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
qcom,init-voltage = <2850000>;
status = "okay";
};
};
rpm-regulator-ldoa20 {
status = "okay";
pm8226_l20: regulator-l20 {
regulator-name = "8226_l20";
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
qcom,init-voltage = <3075000>;
status = "okay";
};
};
rpm-regulator-ldoa21 {
status = "okay";
pm8226_l21: regulator-l21 {
regulator-name = "8226_l21";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <2950000>;
status = "okay";
};
};
rpm-regulator-ldoa22 {
status = "okay";
pm8226_l22: regulator-l22 {
regulator-name = "8226_l22";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <2950000>;
status = "okay";
};
};
rpm-regulator-ldoa23 {
status = "okay";
pm8226_l23: regulator-l23 {
regulator-name = "8226_l23";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <2950000>;
status = "okay";
};
};
rpm-regulator-ldoa24 {
status = "okay";
pm8226_l24: regulator-l24 {
regulator-name = "8226_l24";
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
qcom,init-voltage = <1300000>;
status = "okay";
};
};
rpm-regulator-ldoa26 {
status = "okay";
pm8226_l26: regulator-l26 {
regulator-name = "8226_l26";
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,init-voltage = <1225000>;
status = "okay";
};
};
rpm-regulator-ldoa27 {
status = "okay";
pm8226_l27: regulator-l27 {
regulator-name = "8226_l27";
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
qcom,init-voltage = <2050000>;
status = "okay";
};
};
rpm-regulator-ldoa28 {
status = "okay";
pm8226_l28: regulator-l28 {
regulator-name = "8226_l28";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <2950000>;
status = "okay";
};
};
rpm-regulator-vsa1 {
status = "okay";
pm8226_lvs1: regulator-lvs1 {
status = "okay";
};
};
};
&pm8226_chg_boost {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "8226_smbbp_boost";
};
&soc {
usb_otg_sw: regulator-ncp380 {
compatible = "regulator-fixed";
regulator-name = "usb_otg_sw";
gpio = <&msmgpio 67 0>;
parent-supply = <&pm8226_chg_boost>;
startup-delay-us = <4000>;
enable-active-high;
status = "disabled";
};
};

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kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-sim.dts Normal file
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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "msm8226.dtsi"
/include/ "msm8226-camera.dtsi"
/ {
model = "Qualcomm MSM 8226 Simulator";
compatible = "qcom,msm8226-sim", "qcom,msm8226", "qcom,sim";
qcom,msm-id = <145 16 0>,
<158 16 0>,
<159 16 0>,
<198 16 0>;
};
&soc {
serial@f991f000 {
status = "ok";
};
};
&sdcc1 {
qcom,vdd-always-on;
qcom,vdd-lpm-sup;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <800 500000>;
qcom,vdd-io-always-on;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <250 154000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
vdd-supply = <&pm8226_l17>;
vdd-io-supply = <&pm8226_l6>;
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
qcom,nonremovable;
status = "ok";
};
&sdcc2 {
vdd-supply = <&pm8226_l18>;
vdd-io-supply = <&pm8226_l21>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <9000 800000>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <800>;
status = "ok";
};
&pm8226_gpios {
gpio@c000 { /* GPIO 1 */
};
gpio@c100 { /* GPIO 2 */
};
gpio@c200 { /* GPIO 3 */
};
gpio@c300 { /* GPIO 4 */
};
gpio@c400 { /* GPIO 5 */
};
gpio@c500 { /* GPIO 6 */
};
gpio@c600 { /* GPIO 7 */
};
gpio@c700 { /* GPIO 8 */
};
};
&pm8226_mpps {
mpp@a000 { /* MPP 1 */
};
mpp@a100 { /* MPP 2 */
};
mpp@a200 { /* MPP 3 */
};
mpp@a300 { /* MPP 4 */
};
mpp@a400 { /* MPP 5 */
};
mpp@a500 { /* MPP 6 */
};
mpp@a600 { /* MPP 7 */
};
mpp@a700 { /* MPP 8 */
};
};

225
kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-smp2p.dtsi Normal file
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/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,smp2p-modem {
compatible = "qcom,smp2p";
reg = <0xf9011008 0x4>;
qcom,remote-pid = <1>;
qcom,irq-bitmask = <0x4000>;
interrupts = <0 27 1>;
};
qcom,smp2p-adsp {
compatible = "qcom,smp2p";
reg = <0xf9011008 0x4>;
qcom,remote-pid = <2>;
qcom,irq-bitmask = <0x400>;
interrupts = <0 158 1>;
};
qcom,smp2p-wcnss {
compatible = "qcom,smp2p";
reg = <0xf9011008 0x4>;
qcom,remote-pid = <4>;
qcom,irq-bitmask = <0x40000>;
interrupts = <0 143 1>;
};
smp2pgpio_smp2p_7_in: qcom,smp2pgpio-smp2p-7-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <7>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_7_in {
compatible = "qcom,smp2pgpio_test_smp2p_7_in";
gpios = <&smp2pgpio_smp2p_7_in 0 0>;
};
smp2pgpio_smp2p_7_out: qcom,smp2pgpio-smp2p-7-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <7>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_7_out {
compatible = "qcom,smp2pgpio_test_smp2p_7_out";
gpios = <&smp2pgpio_smp2p_7_out 0 0>;
};
smp2pgpio_smp2p_1_in: qcom,smp2pgpio-smp2p-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_1_in {
compatible = "qcom,smp2pgpio_test_smp2p_1_in";
gpios = <&smp2pgpio_smp2p_1_in 0 0>;
};
smp2pgpio_smp2p_1_out: qcom,smp2pgpio-smp2p-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <1>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_1_out {
compatible = "qcom,smp2pgpio_test_smp2p_1_out";
gpios = <&smp2pgpio_smp2p_1_out 0 0>;
};
smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <1>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
smp2pgpio_smp2p_2_in: qcom,smp2pgpio-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_2_in {
compatible = "qcom,smp2pgpio_test_smp2p_2_in";
gpios = <&smp2pgpio_smp2p_2_in 0 0>;
};
smp2pgpio_smp2p_2_out: qcom,smp2pgpio-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_2_out {
compatible = "qcom,smp2pgpio_test_smp2p_2_out";
gpios = <&smp2pgpio_smp2p_2_out 0 0>;
};
/* SMP2P SSR Driver for inbound entry from lpass. */
smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* SMP2P SSR Driver for outbound entry to lpass */
smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
smp2pgpio_smp2p_4_in: qcom,smp2pgpio-smp2p-4-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <4>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_4_in {
compatible = "qcom,smp2pgpio_test_smp2p_4_in";
gpios = <&smp2pgpio_smp2p_4_in 0 0>;
};
smp2pgpio_smp2p_4_out: qcom,smp2pgpio-smp2p-4-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <4>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
smp2pgpio_ssr_smp2p_4_in: qcom,smp2pgpio-ssr-smp2p-4-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <4>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
smp2pgpio_ssr_smp2p_4_out: qcom,smp2pgpio-ssr-smp2p-4-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <4>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
qcom,smp2pgpio_test_smp2p_4_out {
compatible = "qcom,smp2pgpio_test_smp2p_4_out";
gpios = <&smp2pgpio_smp2p_4_out 0 0>;
};
};

25
kernel/arch/arm/boot/dts/m7350-un-v3/msm8226-v1-cdp.dts Normal file
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@ -0,0 +1,25 @@
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "msm8226-v1.dtsi"
/include/ "msm8226-cdp.dtsi"
/ {
model = "Qualcomm MSM 8226 CDP";
compatible = "qcom,msm8226-cdp", "qcom,msm8226", "qcom,cdp";
qcom,msm-id = <145 1 0>,
<158 1 0>,
<159 1 0>,
<198 1 0>,
<205 1 0>;
};

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