82 lines
3.1 KiB
Plaintext
82 lines
3.1 KiB
Plaintext
MSM SuperSpeed USB3.0 SoC controller
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Required properties :
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- compatible : should be "qcom,dwc-usb3-msm"
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- reg: Address and length of the register set for the device
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Required regs are:
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"core_base" : usb controller register set
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- interrupts: IRQ lines used by this controller
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- interrupt-names : Interrupt resource entries are :
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"hs_phy_irq" : Interrupt from HS PHY for asynchronous events in LPM.
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"pwr_event_irq" : Interrupt to controller for asynchronous events in LPM.
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Used for SS-USB power events.
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Optional properties :
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- reg: Additional registers
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"tcsr_base" : top-level CSR register to be written during power-on reset
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initialize the internal MUX that controls whether to use USB3 controller
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with primary port.
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"ahb2phy_base" : top-level register to configure read/write wait cycle with
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both QMP and QUSB PHY registers.
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- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
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below optional properties:
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- qcom,msm_bus,name
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- qcom,msm_bus,num_cases
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- qcom,msm_bus,num_paths
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- qcom,msm_bus,vectors
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- interrupt-names : Optional interrupt resource entries are:
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"pmic_id_irq" : Interrupt from PMIC for external ID pin notification.
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"ss_phy_irq" : Interrupt from super speed phy for wake up notification.
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- qcom,charging-disabled: If present then battery charging using USB
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is disabled.
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- vbus_dwc3-supply: phandle to the 5V VBUS supply regulator used for host mode.
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- USB3_GDSC-supply : phandle to the globally distributed switch controller
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regulator node to the USB controller.
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- qcom,dwc-usb3-msm-tx-fifo-size: If present, represents RAM size available for
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TX fifo allocation in bytes
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- qcom,usb-dbm : phandle for the DBM device
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- qcom,lpm-to-suspend-delay-ms: Indicates timeout (in milliseconds) to release wakeup source
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after USB is kept into LPM.
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- qcom,ext-hub-reset-gpio: This corresponds to gpio which is used for HUB reset.
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- qcom,disable-dev-mode-pm: If present, it disables PM runtime functionality for device mode.
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- qcom,disable-host-mode-pm: If present, it disables XHCI PM runtime functionality when USB
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host mode is used.
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Sub nodes:
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- Sub node for "DWC3- USB3 controller".
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This sub node is required property for device node. The properties of this subnode
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are specified in dwc3.txt.
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Example MSM USB3.0 controller device node :
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usb@f9200000 {
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compatible = "qcom,dwc-usb3-msm";
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reg = <0xf9200000 0xfc000>,
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<0xfd4ab000 0x4>,
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<0xf9b3e000 0x3ff>;
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reg-names = "core_base",
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"tcsr_base",
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"ahb2phy_base",
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interrupts = <0 133 0>;
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interrupt-names = "hs_phy_irq";
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vbus_dwc3-supply = <&pm8941_mvs1>;
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USB3_GDSC-supply = <&gdsc_usb30>;
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qcom,dwc-usb3-msm-dbm-eps = <4>
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qcom,dwc_usb3-adc_tm = <&pm8941_adc_tm>;
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qcom,dwc-usb3-msm-tx-fifo-size = <29696>;
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qcom,usb-dbm = <&dbm_1p4>;
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qcom,lpm-to-suspend-delay-ms = <2>;
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qcom,msm_bus,name = "usb3";
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qcom,msm_bus,num_cases = <2>;
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qcom,msm_bus,num_paths = <1>;
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qcom,msm_bus,vectors =
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<61 512 0 0>,
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<61 512 240000000 960000000>;
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dwc3@f9200000 {
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compatible = "synopsys,dwc3";
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reg = <0xf9200000 0xfc000>;
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interrupts = <0 131 0>, <0 179 0>;
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interrupt-names = "irq", "otg_irq";
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tx-fifo-resize;
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};
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};
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