M7350/kernel/arch/arm/boot/dts/tr961-5200l-v2/msm9625.dtsi
2024-09-09 08:54:06 +00:00

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/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton.dtsi"
/ {
model = "Qualcomm MSM 9625";
compatible = "qcom,msm9625";
interrupt-parent = <&intc>;
aliases {
};
soc: soc { };
};
/include/ "msm9625-ion.dtsi"
/include/ "msm9625-pm.dtsi"
/include/ "msm9625-coresight.dtsi"
/include/ "msm9625-smp2p.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
intc: interrupt-controller@F9000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0xF9000000 0x1000>,
<0xF9002000 0x1000>;
};
l2: cache-controller@f9040000 {
compatible = "arm,pl310-cache";
reg = <0xf9040000 0x1000>;
cache-unified;
cache-level = <2>;
};
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
ngpio = <76>;
interrupts = <0 208 0>;
qcom,direct-connect-irqs = <8>;
};
qcom,mpm2-sleep-counter@fc4a3000 {
compatible = "qcom,mpm2-sleep-counter";
reg = <0xfc4a3000 0x1000>;
clock-frequency = <32768>;
};
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "arm,armv7-timer-mem";
reg = <0xf9020000 0x1000>;
clock-frequency = <19200000>;
frame@f9021000 {
frame-number = <0>;
interrupts = <0 7 0x4>,
<0 6 0x4>;
reg = <0xf9021000 0x1000>,
<0xf9022000 0x1000>;
};
frame@f9023000 {
frame-number = <1>;
interrupts = <0 8 0x4>;
reg = <0xf9023000 0x1000>;
status = "disabled";
};
frame@f9024000 {
frame-number = <2>;
interrupts = <0 9 0x4>;
reg = <0xf9024000 0x1000>;
status = "disabled";
};
frame@f9025000 {
frame-number = <3>;
interrupts = <0 10 0x4>;
reg = <0xf9025000 0x1000>;
status = "disabled";
};
frame@f9026000 {
frame-number = <4>;
interrupts = <0 11 0x4>;
reg = <0xf9026000 0x1000>;
status = "disabled";
};
frame@f9027000 {
frame-number = <5>;
interrupts = <0 12 0x4>;
reg = <0xf9027000 0x1000>;
status = "disabled";
};
frame@f9028000 {
frame-number = <6>;
interrupts = <0 13 0x4>;
reg = <0xf9028000 0x1000>;
status = "disabled";
};
frame@f9029000 {
frame-number = <7>;
interrupts = <0 14 0x4>;
reg = <0xf9029000 0x1000>;
status = "disabled";
};
};
qcom,sps@f9980000 {
compatible = "qcom,msm_sps";
reg = <0xf9984000 0x15000>,
<0xf9999000 0xb000>,
<0xfe803000 0x4800>;
interrupts = <0 94 0>;
qcom,device-type = <2>;
};
serial@f991f000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf991f000 0x1000>;
interrupts = <0 109 0>;
qcom,msm-bus,name = "blsp1_uart3";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<86 512 0 0>,
<86 512 500 800>;
};
hsusb_otg: usb@f9a55000 {
compatible = "qcom,hsusb-otg";
reg = <0xf9a55000 0x400>;
interrupts = <0 134 0 0 140 0>;
interrupt-names = "core_irq", "async_irq";
HSUSB_VDDCX-supply = <&pm8019_l12>;
HSUSB_1p8-supply = <&pm8019_l2>;
HSUSB_3p3-supply = <&pm8019_l4>;
vbus_otg-supply = <&usb_vbus>;
qcom,hsusb-otg-phy-type = <2>;
qcom,hsusb-otg-mode = <1>;
qcom,hsusb-otg-otg-control = <1>;
qcom,hsusb-otg-disable-reset;
qcom,hsusb-otg-delay-lpm-hndshk-on-disconnect;
qcom,hsusb-otg-delay-lpm;
qcom,hsusb-otg-mpm-dpsehv-int = <49>;
qcom,msm-bus,name = "usb2";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<87 512 0 0>,
<87 512 40000 640000>;
qcom,hsusb-log2-itc = <4>;
};
hsic_host: hsic@f9a15000 {
compatible = "qcom,hsic-host";
reg = <0xf9a15000 0x400>;
interrupts = <0 136 0>, <0 148 0>;
interrupt-names = "core_irq", "async_irq";
HSIC_VDDCX-supply = <&pm8019_l12>;
HSIC_GDSC-supply = <&gdsc_usb_hsic>;
qcom,msm-bus,name = "hsic";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<85 512 0 0>,
<85 512 40000 640000>;
qcom,pool-64-bit-align;
qcom,enable-hbm;
hsic,consider-ipa-handshake;
qcom,ahb-async-bridge-bypass;
hsic,disable-cerr;
qcom,disable-internal-clk-gating;
};
qcom,usbbam@f9a44000 {
compatible = "qcom,usb-bam-msm";
reg = <0xf9a44000 0x11000>,
<0xf9a04000 0x11000>;
reg-names = "hsusb", "hsic";
interrupts = <0 135 0 0 255 0>;
interrupt-names = "hsusb", "hsic";
qcom,usb-bam-num-pipes = <16>;
qcom,ignore-core-reset-ack;
qcom,disable-clk-gating;
qcom,pipe0 {
label = "hsusb-ipa-out-0";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <0>;
qcom,pipe-num = <0>;
qcom,peer-bam = <2>;
qcom,src-bam-physical-address = <0xf9a44000>;
qcom,src-bam-pipe-index = <1>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe1 {
label = "hsusb-ipa-in-0";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a44000>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe2 {
label = "hsusb-qdss-in-0";
qcom,usb-bam-mem-type = <0>;
qcom,bam-type = <1>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <1>;
qcom,src-bam-physical-address = <0xfc37c000>;
qcom,src-bam-pipe-index = <0>;
qcom,dst-bam-physical-address = <0xf9a44000>;
qcom,dst-bam-pipe-index = <2>;
qcom,data-fifo-offset = <0x4100>;
qcom,data-fifo-size = <0x700>;
qcom,descriptor-fifo-offset = <0x4000>;
qcom,descriptor-fifo-size = <0x100>;
};
qcom,pipe3 {
label = "hsic-ipa-in-0";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a04000>;
qcom,dst-bam-pipe-index = <3>;
qcom,data-fifo-size = <0xF800>;
qcom,descriptor-fifo-size = <0x3A58>;
qcom,reset-bam-on-connect;
};
qcom,pipe4 {
label = "hsic-ipa-in-1";
qcom,bam-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <1>;
qcom,peer-bam = <2>;
qcom,usb-bam-mem-type = <2>;
qcom,dst-bam-physical-address = <0xf9a04000>;
qcom,dst-bam-pipe-index = <4>;
qcom,data-fifo-size = <0xF800>;
qcom,descriptor-fifo-size = <0x3A58>;
qcom,reset-bam-on-connect;
};
qcom,pipe5 {
label = "hsic-ipa-in-2";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <2>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a04000>;
qcom,dst-bam-pipe-index = <5>;
qcom,data-fifo-size = <0xF800>;
qcom,descriptor-fifo-size = <0x3A58>;
qcom,reset-bam-on-connect;
};
qcom,pipe6 {
label = "hsic-ipa-in-3";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <3>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a04000>;
qcom,dst-bam-pipe-index = <6>;
qcom,data-fifo-size = <0xF800>;
qcom,descriptor-fifo-size = <0x3A58>;
qcom,reset-bam-on-connect;
};
qcom,pipe7 {
label = "hsic-ipa-out-0";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <2>;
qcom,dir = <0>;
qcom,pipe-num = <0>;
qcom,peer-bam = <2>;
qcom,src-bam-physical-address = <0xf9a04000>;
qcom,src-bam-pipe-index = <7>;
qcom,data-fifo-size = <0xDFE>;
qcom,descriptor-fifo-size = <0xB30>;
qcom,reset-bam-on-connect;
};
qcom,pipe8 {
label = "hsusb-ipa-out-1";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <0>;
qcom,pipe-num = <1>;
qcom,peer-bam = <2>;
qcom,src-bam-physical-address = <0xf9a44000>;
qcom,src-bam-pipe-index = <5>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe9 {
label = "hsusb-ipa-in-1";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <1>;
qcom,pipe-num = <1>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a44000>;
qcom,dst-bam-pipe-index = <4>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe10 {
label = "hsusb-ipa-out-2";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <0>;
qcom,pipe-num = <2>;
qcom,peer-bam = <2>;
qcom,src-bam-physical-address = <0xf9a44000>;
qcom,src-bam-pipe-index = <7>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe11 {
label = "hsusb-ipa-in-2";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <1>;
qcom,pipe-num = <2>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a44000>;
qcom,dst-bam-pipe-index = <6>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe12 {
label = "hsusb-ipa-out-3";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <0>;
qcom,pipe-num = <3>;
qcom,peer-bam = <2>;
qcom,src-bam-physical-address = <0xf9a44000>;
qcom,src-bam-pipe-index = <8>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
qcom,pipe13 {
label = "hsusb-ipa-in-3";
qcom,usb-bam-mem-type = <2>;
qcom,bam-type = <1>;
qcom,dir = <1>;
qcom,pipe-num = <3>;
qcom,peer-bam = <2>;
qcom,dst-bam-physical-address = <0xf9a44000>;
qcom,dst-bam-pipe-index = <9>;
qcom,data-fifo-size = <0x8000>;
qcom,descriptor-fifo-size = <0x2000>;
qcom,reset-bam-on-connect;
};
};
qcom,nand@f9ac0000 {
compatible = "qcom,msm-nand";
reg = <0xf9ac0000 0x1000>,
<0xf9ac4000 0x8000>;
reg-names = "nand_phys",
"bam_phys";
interrupts = <0 247 0>;
interrupt-names = "bam_irq";
};
qcom,wdt@f9017000 {
compatible = "qcom,msm-watchdog";
reg = <0xf9017000 0x1000>;
interrupts = <1 2 0>, <1 1 0>;
qcom,bark-time = <11000>;
qcom,pet-time = <10000>;
};
rpm_bus: qcom,rpm-smd {
compatible = "qcom,rpm-smd";
rpm-channel-name = "rpm_requests";
rpm-channel-type = <15>; /* SMD_APPS_RPM */
};
spmi_bus: qcom,spmi@fc4c0000 {
cell-index = <0>;
compatible = "qcom,spmi-pmic-arb";
reg-names = "core", "intr", "cnfg";
reg = <0xfc4cf000 0x1000>,
<0Xfc4cb000 0x1000>,
<0Xfc4ca000 0x1000>;
/* 190,ee0_krait_hlos_spmi_periph_irq */
/* 187,channel_0_krait_hlos_trans_done_irq */
interrupts = <0 190 0 0 187 0>;
qcom,pmic-arb-ee = <0>;
qcom,pmic-arb-channel = <0>;
};
sdcc2: qcom,sdcc@f98a4000 {
cell-index = <2>; /* SDC2 SD card slot */
compatible = "qcom,msm-sdcc";
reg = <0xf98a4000 0x800>,
<0xf98a4800 0x100>,
<0xf9884000 0x7000>;
reg-names = "core_mem", "dml_mem", "bam_mem";
vdd-supply = <&ext_2p95v>;
vdd-io-supply = <&pm8019_l13>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <6 22000>;
qcom,pad-pull-on = <0x0 0x3 0x3>;
qcom,pad-pull-off = <0x0 0x3 0x3>;
qcom,pad-drv-on = <0x4 0x4 0x4>;
qcom,pad-drv-off = <0x0 0x0 0x0>;
qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
qcom,sup-voltages = <2950 2950>;
qcom,bus-width = <4>;
qcom,xpc;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
qcom,current-limit = <800>;
interrupt-parent = <&sdcc2>;
#address-cells = <0>;
interrupts = <0 1 2>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xffffffff>;
interrupt-map = <0 &intc 0 125 0
1 &intc 0 220 0
2 &msmgpio 66 0x3>;
interrupt-names = "core_irq", "bam_irq", "status_irq";
cd-gpios = <&msmgpio 66 0>;
};
ipa_hw: qcom,ipa@fd4c0000 {
compatible = "qcom,ipa";
reg = <0xfd4c0000 0x26000>,
<0xfd4c4000 0x14818>,
<0xfc834000 0x7000>;
reg-names = "ipa-base", "bam-base", "a2-bam-base";
interrupts = <0 252 0>,
<0 253 0>,
<0 29 1>;
interrupt-names = "ipa-irq", "bam-irq", "a2-bam-irq";
qcom,pipe1 {
label = "a2-to-ipa";
qcom,src-bam-physical-address = <0xfc834000>;
qcom,ipa-bam-mem-type = <0>;
qcom,src-bam-pipe-index = <1>;
qcom,dst-bam-physical-address = <0xfd4c0000>;
qcom,dst-bam-pipe-index = <6>;
qcom,data-fifo-offset = <0x1000>;
qcom,data-fifo-size = <0xd00>;
qcom,descriptor-fifo-offset = <0x1d00>;
qcom,descriptor-fifo-size = <0x300>;
};
qcom,pipe2 {
label = "ipa-to-a2";
qcom,src-bam-physical-address = <0xfd4c0000>;
qcom,ipa-bam-mem-type = <0>;
qcom,src-bam-pipe-index = <7>;
qcom,dst-bam-physical-address = <0xfc834000>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-offset = <0x00>;
qcom,data-fifo-size = <0xd00>;
qcom,descriptor-fifo-offset = <0xd00>;
qcom,descriptor-fifo-size = <0x300>;
};
};
qcom,acpuclk@f9010000 {
compatible = "qcom,acpuclk-9625";
reg = <0xf9010008 0x10>,
<0xf9008004 0x4>;
reg-names = "rcg_base", "pwr_base";
a5_cpu-supply = <&pm8019_l10_corner_ao>;
a5_mem-supply = <&pm8019_l12_ao>;
};
gdsc_usb_hsic: qcom,gdsc@fc400404 {
compatible = "qcom,gdsc";
reg = <0xfc400404 0x4>;
regulator-name = "gdsc_usb_hsic";
};
tsens@fc4a8000 {
compatible = "qcom,msm-tsens";
reg = <0xfc4a8000 0x2000>,
<0xfc4b8000 0x1000>;
reg-names = "tsens_physical", "tsens_eeprom_physical";
interrupts = <0 184 0>;
qcom,sensors = <5>;
qcom,slope = <3200 3200 3200 3200 3200>;
qcom,calib-mode = "fuse_map1";
};
qcom,msm-thermal {
compatible = "qcom,msm-thermal";
qcom,sensor-id = <0>;
qcom,poll-ms = <250>;
qcom,limit-temp = <60>;
qcom,temp-hysteresis = <10>;
qcom,freq-step = <2>;
qcom,freq-control-mask = <0x0>;
qcom,vdd-restriction-temp = <5>;
qcom,vdd-restriction-temp-hysteresis = <10>;
vdd-dig-supply = <&pm8019_l10_floor_corner>;
qcom,vdd-dig-rstr{
qcom,vdd-rstr-reg = "vdd-dig";
qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
qcom,min-level = <1>; /* No Request */
};
};
qcom,msm-rng@f9bff000 {
compatible = "qcom,msm-rng";
reg = <0xf9bff000 0x200>;
qcom,msm-rng-iface-clk;
};
i2c@f9925000 {
cell-index = <3>;
compatible = "qcom,i2c-qup";
reg = <0xf9925000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
reg-names = "qup_phys_addr";
interrupts = <0 97 0>;
interrupt-names = "qup_err_intr";
qcom,i2c-bus-freq = <400000>;
qcom,i2c-src-freq = <19200000>;
};
qcom,mss {
compatible = "qcom,pil-q6v5-mss";
interrupts = <0 24 1>;
qcom,is-not-loadable;
/* GPIO inputs from mss */
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
/* GPIO output to mss */
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
};
qcom,smem@0 {
compatible = "qcom,smem";
reg = <0x0 0x100000>,
<0xf9011000 0x1000>,
<0xfc428000 0x4000>;
reg-names = "smem", "irq-reg-base", "aux-mem1";
qcom,smd-modem {
compatible = "qcom,smd";
qcom,smd-edge = <0>;
qcom,smd-irq-offset = <0x8>;
qcom,smd-irq-bitmask = <0x1000>;
qcom,pil-string = "modem";
interrupts = <0 25 1>;
};
qcom,smsm-modem {
compatible = "qcom,smsm";
qcom,smsm-edge = <0>;
qcom,smsm-irq-offset = <0x8>;
qcom,smsm-irq-bitmask = <0x2000>;
interrupts = <0 26 1>;
};
qcom,smd-adsp {
compatible = "qcom,smd";
qcom,smd-edge = <1>;
qcom,smd-irq-offset = <0x8>;
qcom,smd-irq-bitmask = <0x100>;
qcom,pil-string = "adsp";
interrupts = <0 156 1>;
};
qcom,smsm-adsp {
compatible = "qcom,smsm";
qcom,smsm-edge = <1>;
qcom,smsm-irq-offset = <0x8>;
qcom,smsm-irq-bitmask = <0x200>;
interrupts = <0 157 1>;
};
qcom,smd-rpm {
compatible = "qcom,smd";
qcom,smd-edge = <15>;
qcom,smd-irq-offset = <0x8>;
qcom,smd-irq-bitmask = <0x1>;
interrupts = <0 168 1>;
qcom,irq-no-suspend;
};
};
qcom,qcedev@fd400000 {
compatible = "qcom,qcedev";
reg = <0xfd400000 0x20000>,
<0xfd404000 0x8000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <0 207 0>;
qcom,bam-pipe-pair = <1>;
};
qcom,qcrypto@fd440000 {
compatible = "qcom,qcrypto";
reg = <0xfd400000 0x20000>,
<0xfd404000 0x8000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <0 207 0>;
qcom,bam-pipe-pair = <2>;
};
jtag_mm: jtagmm@fc332000 {
compatible = "qcom,jtag-mm";
reg = <0xfc332000 0x1000>,
<0xfc330000 0x1000>;
reg-names = "etm-base","debug-base";
};
qcom,msm-rtb {
compatible = "qcom,msm-rtb";
qcom,memory-reservation-type = "EBI1";
qcom,memory-reservation-size = <0x1000>; /* 4K EBI1 buffer */
};
qcom,msm-mem-hole {
compatible = "qcom,msm-mem-hole";
qcom,memblock-remove = <0x1c00000 0x4c00000>; /* Address and Size of Hole */
};
sfpb_spinlock: qcom,ipc-spinlock@fd484000 {
compatible = "qcom,ipc-spinlock-sfpb";
reg = <0xfd484000 0x400>;
qcom,num-locks = <8>;
};
ldrex_spinlock: qcom,ipc-spinlock@fa00000 {
compatible = "qcom,ipc-spinlock-ldrex";
reg = <0xfa00000 0x200000>;
status = "disable";
};
cpu-pmu {
compatible = "arm,cortex-a5-pmu";
qcom,irq-is-percpu;
interrupts = <1 7 0x00>;
};
l2-pmu {
compatible = "qcom,l2-pmu";
interrupts = <0 1 0>;
};
/* [houjihai start] gpio keys */
gpio-keys {
compatible = "gpio-keys";
autorepeat;
input-name = "gpio-keys";
key-back {
label = "RESET";
linux,code = <158>;
gpios = <&msmgpio 15 1>;
gpio-key,wakeup;
debounce-interval = <15>;
};
};
/* [houjihai end] */
};
/include/ "msm-pm8019-rpm-regulator.dtsi"
/include/ "msm-pm8019.dtsi"
/include/ "msm9625-regulator.dtsi"
&pm8019_vadc {
chan@31 {
label = "batt_id_therm";
reg = <0x31>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <0>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
/* [linyunfeng] Detect voltage on resistor*/
chan@10 {
label = "vol_detect";
reg = <0x10>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <0>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
/* [linyunfeng] Detect battery voltage */
chan@11 {
label = "vbat";
reg = <0x11>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <0>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@33 {
label = "pa_therm0";
reg = <0x33>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@34 {
label = "pa_therm1";
reg = <0x34>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@32 {
label = "xo_therm";
reg = <0x32>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <4>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@3c {
label = "xo_therm_amux";
reg = <0x3c>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <4>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@13 {
label = "case_therm";
reg = <0x13>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
chan@15 {
label = "ambient_therm";
reg = <0x15>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
};
};
&pm8019_adc_tm {
/* Channel Node */
chan@33 {
label = "pa_therm0";
reg = <0x33>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
qcom,btm-channel-number = <0x48>;
qcom,thermal-node;
};
chan@34 {
label = "pa_therm1";
reg = <0x34>;
qcom,decimation = <0>;
qcom,pre-div-channel-scaling = <0>;
qcom,calibration-type = "ratiometric";
qcom,scale-function = <2>;
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <0>;
qcom,btm-channel-number = <0x68>;
qcom,thermal-node;
};
};