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M7350v7_en_gpl

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T
2024-09-09 08:59:52 +00:00
parent f75098198c
commit 46ba6f09ec
1372 changed files with 1231198 additions and 1184 deletions
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4
kernel/arch/arm/boot/dts/qcom/mdm9607-regulator.dtsi
View File

@ -328,8 +328,8 @@
regulator-min-microvolt = <1>;
regulator-max-microvolt = <7>;
qcom,cpr-voltage-ceiling = <1350000 1350000 1350000>;
qcom,cpr-voltage-floor = <1350000 1350000 1350000>;
qcom,cpr-voltage-ceiling = <1050000 1225000 1350000>;
qcom,cpr-voltage-floor = <1050000 1050000 1350000>;
vdd-apc-supply = <&mdm9607_s1>;
vdd-mx-supply = <&mdm9607_l12_level_ao>;

2
kernel/drivers/i2c/busses/i2c-msm-v2.c Normal file → Executable file
View File

@ -2965,7 +2965,7 @@ static int i2c_msm_init(void)
{
return platform_driver_register(&i2c_msm_driver);
}
arch_initcall(i2c_msm_init);
subsys_initcall(i2c_msm_init);
static void i2c_msm_exit(void)
{

13
kernel/drivers/mtd/nand/nand_ids.c
View File

@ -69,14 +69,20 @@ struct nand_flash_dev nand_flash_ids[] = {
{ .id = {0x98, 0xac, 0x90, 0x26, 0x76, 0x00, 0x00, 0x00} },
SZ_4K, SZ_512, SZ_256K, 0, 5, 128, NAND_ECC_INFO(8, SZ_512) },
{"MT29RZ2B1DZZHGSP 2G 1.8V 4-bit",
{ .id = {0x2c, 0xaa, 0x90, 0x15, 0x00, 0x00, 0x00, 0x00} },
SZ_2K, SZ_256, SZ_128K, 0, 4, 64, NAND_ECC_INFO(4, SZ_512) },
// Add by wuchao, 20.12.29, for ESMT FM6BD2G1GXA, this flash support ONFI, info here will not be used
{"FM6BD2G1GXA 2G 1.8V 8-bit",
{ .id = {0x2c, 0xaa, 0x90, 0x15, 0x06, 0x00, 0x00, 0x00} },
SZ_2K, SZ_256, SZ_128K, 0, 5, 128, NAND_ECC_INFO(8, SZ_512) },
{"KSLCMAL2TA0M2A 2G 1.8V 8-bit",
{ .id = {0x98, 0xaa, 0x90, 0x15, 0x00, 0x00, 0x00, 0x00} },
SZ_2K, SZ_256, SZ_128K, 0, 4, 128, NAND_ECC_INFO(8, SZ_512)},
// Add by wuchao, 20.12.29, for ESMT FM6BD2G1GA, this flash does not support ONFI
{"FM6BD2G1GA 2G 1.8V 8-bit",
{ .id = {0xc8, 0xaa, 0x90, 0x15, 0x00, 0x00, 0x00, 0x00} },
SZ_2K, SZ_256, SZ_128K, 0, 4, 64, NAND_ECC_INFO(4, SZ_512)},
LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS),
@ -206,6 +212,7 @@ struct nand_manufacturers nand_manuf_ids[] = {
{NAND_MFR_INTEL, "Intel"},
{NAND_MFR_WINBOND, "Winbond"},
{NAND_MFR_ESMT, "ESMT"},
{NAND_MFR_ESMT2, "ESMT"},
{0x0, "Unknown"}
};

618
kernel/drivers/oled/s90319fb.c
View File

@ -52,12 +52,16 @@ typedef unsigned int boolean;
#define FALSE 0
#endif
#define ID_GC9106 0x9106
#define ID_GC9104 0x9104
// reset
static int lcd_s90319_rsx;
static int lcd_s90319_cs;
static int lcd_s90319_boost_en;
static unsigned int lcd_id = 0;
enum GPIO_LCD_S90319 {
GPIO_LCD_CS = 0,
GPIO_LCD_RESET,
@ -65,6 +69,8 @@ enum GPIO_LCD_S90319 {
GPIO_LCD_RSX,
GPIO_LCD_VDD0,
GPIO_LCD_VDD1,
GPIO_LCD_MOSI,
GPIO_LCD_CLK,
GPIO_LCD_END,
};
@ -76,7 +82,8 @@ static const char *dts_gpio_name[] = {
[GPIO_LCD_RSX] = "qcom,oled-rsx-gpio",
[GPIO_LCD_VDD0] = "qcom,oled-vdd0-gpio",
[GPIO_LCD_VDD1] = "qcom,oled-vdd1-gpio",
[GPIO_LCD_MOSI] = "qcom,oled-mosi-gpio",
[GPIO_LCD_CLK] = "qcom,oled-clk-gpio",
[GPIO_LCD_END] = "",
};
@ -98,8 +105,6 @@ static struct spi_device *s90319_spi;
static uint8_t frame_data[COLUMN_NUM * ROW_NUM * 2] ={0};
static uint8_t frame_data_buf[COLUMN_NUM * ROW_NUM * 2] ={0};
static int lcd_s90319_rsx;
static struct mutex flush_mutex;
static struct mutex oled_panel_mutex;
@ -304,7 +309,6 @@ static int s90319_spi_txdata(uint8_t *txdata, const uint16_t length)
return spi_sync(s90319_spi, &spi_msg);
}
/************************************************************
Function : s90319_spi_write_cmd
Description: transfer cmd by spi
@ -393,7 +397,6 @@ void wr_dat(uint8_t data)
s90319_spi_write_data(&data, 1);
}
/************************************************************
Function : oled_s90319_fill_with_pic
Description: write pic data on location assign
@ -415,8 +418,17 @@ static int oled_s90319_fill_with_pic(const uint8_t *pic, const uint8_t x,
oled_s90319_set_col_addr[1] = x + X_OFFSET;
oled_s90319_set_col_addr[3] = x + width - 1 + X_OFFSET;
oled_s90319_set_row_addr[1] = y + Y_OFFSET;
oled_s90319_set_row_addr[3] = y + height - 1 + Y_OFFSET;
if (lcd_id == ID_GC9106 || lcd_id == ID_GC9104)
{
oled_s90319_set_row_addr[1] = y + Y_OFFSET_GC9106;
oled_s90319_set_row_addr[3] = y + height - 1 + Y_OFFSET_GC9106;
}
else
{
oled_s90319_set_row_addr[1] = y + Y_OFFSET;
oled_s90319_set_row_addr[3] = y + height - 1 + Y_OFFSET;
}
for (i = 0; i < height; i++){
for (j = 0; j < width * 2; j++)
@ -468,89 +480,485 @@ static void s90319fb_fillrect(struct fb_info *info, const struct fb_fillrect *re
oled_s90319_fill_with_pic(info->screen_base, x, y, width, height);
}
static void lcd_s90319_panel_init(void)
/*******************************************************************************
Function : spi_start
Description : Start or restart spi communication
Input : None
Output : None
Return : None
Others : None
*******************************************************************************/
void spi_start(void)
{
/* End Reset Sequence */
wr_comm(0x11); //Sleep out
mdelay (120); //Delay 120ms
/* Frame Rate */
wr_comm(0xB1);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_CS], 0);
//oled_udelay(SPI_SPEED_DURATION);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CS], 0);/* start condition */
//oled_udelay(SPI_SPEED_DURATION);
}
/*******************************************************************************
Function : spi_stop
Description : stop spi communication
Input : None
Output : None
Return : None
Others : None
*******************************************************************************/
void spi_stop(void)
{
//gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CS], 1); /* stop condition */
//oled_udelay(SPI_SPEED_DURATION);
}
/*******************************************************************************
Function : s90319_spi_txdata_byte
Description : Transfer data, from baseband chip to spi device.
Input : data: Data to transfer
Output : None
Return : None
Others : None
*******************************************************************************/
void s90319_spi_txdata_byte(uint8_t data)
{
int i = 0;
for(i = 7; (i >= 0)&&(i <= 7); i--) {
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CLK], 0);
//oled_udelay(SPI_SPEED_DURATION);
if(i == 7) {
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_MOSI], 0);
}
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_MOSI], (data >> i) & 0x01);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CLK], 1);
}
return;
}
int spi_txdata_by_gpio(uint8_t *txdata, const uint16_t length, int compress)
{
uint8_t j;
signed char m;
uint8_t data;
uint8_t data_first;
uint8_t data_second;
spi_start();
if (compress){
for(j = 0; j < length; j++, txdata++) {
data = *txdata;
for(m = 7; (m >= 0)&&(m <= 7); m--)
{
if((data >> m) & 0x01)
{
data_first = 0x00;
data_second = 0x00;
}
else
{
data_first = 0xFF;
data_second = 0xFF;
}
s90319_spi_txdata_byte(data_first);
s90319_spi_txdata_byte(data_second);
}
}
}
else
{
for(j = 0; j < length; j++, txdata++) {
s90319_spi_txdata_byte(*txdata);
}
}
spi_stop();
return 0;
}
/*******************************************************************************
Function : spi_write_cmd_by_gpio
Description : Transfer cmd.
Input : data: cmd to transfer
len: length of cmd
Output : None
Return : None
Others : None
*******************************************************************************/
int spi_write_cmd_by_gpio(const uint8_t *data, const uint16_t len)
{
int rc = 0;
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 0);
mdelay(1);
memcpy(frame_data, data, len);
rc = spi_txdata_by_gpio(frame_data, len, FALSE);
return rc;
}
/*******************************************************************************
Function : wr_comm
Description : write init cmd.
Input :
Output : None
Return : None
Others : None
*******************************************************************************/
void wr_comm_by_gpio(uint8_t cmd)
{
spi_write_cmd_by_gpio(&cmd, 1);
}
void oled_gpio_spi_config(void)
{
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_MOSI], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_CS], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_BOOST_EN], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_RESET], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_CLK], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_VDD0], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_VDD1], 0);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_RSX], 0);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_VDD0], 1);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_VDD1], 1);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CS], 0);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 0);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RESET], 1);
mdelay(120);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RESET], 0);
mdelay(100);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RESET], 1);
mdelay(120);
}
unsigned int oled_read_data(int num)
{
unsigned int i=0, dat=0;
for(i=0;i<num;i++)
{
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CLK], 0);
gpio_direction_input(lcd_s90319_gpio[GPIO_LCD_MOSI]);
dat=(dat<<1)|gpio_get_value(lcd_s90319_gpio[GPIO_LCD_MOSI]);
gpio_direction_output(lcd_s90319_gpio[GPIO_LCD_MOSI], 1);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CLK], 1);
}
//printk("dat:%x\n", dat);
return dat;
}
unsigned int get_lcd_id(void)
{
unsigned int id=0, id1=0, id2=0, id3=0;
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CS], 0);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 0);
wr_comm_by_gpio(0xda);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 1);
id1=oled_read_data(8);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 0);
wr_comm_by_gpio(0xdb);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 1);
id2=oled_read_data(8);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 0);
wr_comm_by_gpio(0xdc);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_RSX], 1);
id3=oled_read_data(8);
gpio_set_value(lcd_s90319_gpio[GPIO_LCD_CS], 1);
id = id1<<16|id2<<8|id3;
printk("id:%x\n", id);
return id;
}
/*******************************************************************************
Function : oled_st7735t_init
Description : init oled panel.
Input :
Output : None
Return : None
Others : None
*******************************************************************************/
static void oled_st7735t_init(void)
{
/* End ST7735T Reset Sequence */
wr_comm(0x11); //Sleep out
mdelay (120); //Delay 120ms
/* ST7735T Frame Rate */
wr_comm(0xB1);
wr_dat(0x01);
wr_dat(0x24);
wr_dat(0x24);
wr_comm(0xB2);
wr_dat(0x01);
wr_dat(0x24);
wr_dat(0x24);
wr_comm(0xB3);
wr_dat(0x01);
wr_dat(0x24);
wr_dat(0x24);
wr_dat(0x01);
wr_dat(0x24);
wr_dat(0x24);
/* End ST7735T Frame Rate */
wr_comm(0xB4); //Column inversion
wr_dat(0x01);
/* ST7735T Power Sequence */
wr_comm(0xC0);
wr_dat(0xC8);
wr_dat(0x08);
wr_dat(0x84);
wr_comm(0xC1);
wr_dat(0XC5);
wr_comm(0xC2);
wr_dat(0x0A);
wr_dat(0x00);
wr_comm(0xC3);
wr_dat(0x8A);
wr_dat(0x2A);
wr_comm(0xC4);
wr_dat(0x8A);
wr_dat(0xEE);
/* End ST7735T Power Sequence */
wr_comm(0xC5); //VCOM
wr_dat(0x22);
wr_comm(0x36); //MX, MY, RGB mode
wr_dat(0xc8);
/* ST7735T Gamma Sequence */
wr_comm(0xE0);
wr_dat(0x05);
wr_dat(0x1A);
wr_dat(0x0C);
wr_dat(0x0E);
wr_dat(0x3A);
wr_dat(0x34);
wr_dat(0x2D);
wr_dat(0x2F);
wr_dat(0x2D);
wr_dat(0x2A);
wr_dat(0x2F);
wr_dat(0x3C);
wr_dat(0x00);
wr_dat(0x01);
wr_dat(0x02);
wr_dat(0x10);
wr_comm(0xE1);
wr_dat(0x04);
wr_dat(0x1B);
wr_dat(0x0D);
wr_dat(0x0E);
wr_dat(0x2D);
wr_dat(0x29);
wr_dat(0x24);
wr_dat(0x29);
wr_dat(0x28);
wr_dat(0x26);
wr_dat(0x31);
wr_dat(0x3B);
wr_dat(0x00);
wr_dat(0x00);
wr_dat(0x03);
wr_dat(0x12);
/* End ST7735T Gamma Sequence */
wr_comm(0x3A); //65k mode
wr_dat(0x05);
wr_comm(0x2a);
wr_dat(0x00);
wr_dat(0x02);
wr_dat(0x00);
wr_dat(0x81);
wr_comm(0x2b);
wr_dat(0x00);
wr_dat(0x03);
wr_dat(0x00);
wr_dat(0x82);
wr_comm(0x29); //Display on
wr_comm(0x2C);
}
/*******************************************************************************
Function : oled_st7735s_init
Description : init oled panel.
Input :
Output : None
Return : None
Others : None
*******************************************************************************/
static void oled_st7735s_init(void)
{
/* End ST7735S Reset Sequence */
wr_comm(0x11); //Sleep out
mdelay (120); //Delay 120ms
/* ST7735S Frame Rate */
wr_comm(0xB1);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
wr_comm(0xB2);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
wr_comm(0xB3);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
/* End ST7735S Frame Rate */
wr_comm(0xB4); //Column inversion
wr_dat(0x07);
/* ST7735S Power Sequence */
wr_comm(0xC0);
wr_dat(0xC8);
wr_dat(0x08);
wr_dat(0x84);
wr_comm(0xC1);
wr_dat(0XC5);
wr_comm(0xC2);
wr_dat(0x0A);
wr_dat(0x00);
wr_comm(0xC3);
wr_dat(0x8A);
wr_dat(0x2A);
wr_comm(0xC4);
wr_dat(0x8A);
wr_dat(0xEE);
/* End ST7735S Power Sequence */
wr_comm(0xC5); //VCOM
wr_dat(0x0C);
wr_comm(0x36); //MX, MY, RGB mode
wr_dat(0xc8);
/* ST7735S Gamma Sequence */
wr_comm(0xE0);
wr_dat(0x05);
wr_dat(0x1A);
wr_dat(0x0C);
wr_dat(0x0E);
wr_dat(0x3A);
wr_dat(0x34);
wr_dat(0x2D);
wr_dat(0x2F);
wr_dat(0x2D);
wr_dat(0x2A);
wr_dat(0x2F);
wr_dat(0x3C);
wr_dat(0x00);
wr_dat(0x01);
wr_dat(0x02);
wr_dat(0x10);
wr_comm(0xE1);
wr_dat(0x04);
wr_dat(0x1B);
wr_dat(0x0D);
wr_dat(0x0E);
wr_dat(0x2D);
wr_dat(0x29);
wr_dat(0x24);
wr_dat(0x29);
wr_dat(0x28);
wr_dat(0x26);
wr_dat(0x31);
wr_dat(0x3B);
wr_dat(0x00);
wr_dat(0x00);
wr_dat(0x03);
wr_dat(0x12);
/* End ST7735S Gamma Sequence */
wr_comm(0x3A); //65k mode
wr_dat(0x05);
wr_comm(0x2a);
wr_dat(0x00);
wr_dat(0x02);
wr_dat(0x00);
wr_dat(0x81);
wr_comm(0x2b);
wr_dat(0x00);
wr_dat(0x03);
wr_dat(0x00);
wr_dat(0x82);
wr_comm(0x29); //Display on
wr_comm(0x2C);
}
#if 0
static void oled_gc9106_init(void)
{
wr_comm(0xfe);
wr_comm(0xfe);
wr_comm(0xef);
wr_comm(0xb3);
wr_dat(0x03);
wr_comm(0x21);
wr_comm(0x36);
wr_dat(0xd8);///
wr_comm(0x3a);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
wr_comm(0xB2);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
wr_comm(0xB3);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
wr_dat(0x05);
wr_dat(0x3A);
wr_dat(0x3A);
/* End Frame Rate */
wr_comm(0xB4); //Column inversion
wr_dat(0x07);
/* Power Sequence */
wr_comm(0xC0);
wr_dat(0xC8);
wr_dat(0x08);
wr_dat(0x84);
wr_comm(0xC1);
wr_dat(0XC5);
wr_comm(0xC2);
wr_dat(0x0A);
wr_dat(0x00);
wr_comm(0xC3);
wr_dat(0x8A);
wr_dat(0x2A);
wr_comm(0xC4);
wr_dat(0x8A);
wr_dat(0xEE);
/* End Power Sequence*/
wr_comm(0xC5); //VCOM
wr_dat(0x0C);
wr_comm(0x36); //MX, MY, RGB mode
wr_dat(0xc8);
/* Gamma Sequence */
wr_comm(0xE0);
wr_dat(0x05);
wr_dat(0x1A);
wr_dat(0x0C);
wr_dat(0x0E);
wr_dat(0x3A);
wr_dat(0x34);
wr_dat(0x2D);
wr_dat(0x2F);
wr_dat(0x2D);
wr_dat(0x2A);
wr_dat(0x2F);
wr_dat(0x3C);
wr_dat(0x00);
wr_dat(0x01);
wr_dat(0x02);
wr_dat(0x10);
wr_comm(0xE1);
wr_dat(0x04);
wr_comm(0xb4);
wr_dat(0x21);
//====================
wr_comm(0xb1);
wr_dat(0xc0);//e6_en e7_en
wr_comm(0xe6);
wr_dat(0x50);//50
wr_dat(0x43);
wr_comm(0xe7);
wr_dat(0x56);//38 62
wr_dat(0x43);
//=================
wr_comm(0xF0);
wr_dat(0x0B);
wr_dat(0x4D);
wr_dat(0x1B);
wr_dat(0x5E);
wr_dat(0x8C);
wr_dat(0x2C);
wr_dat(0x2D);
wr_dat(0x00);
wr_dat(0x00);
wr_dat(0x10);
wr_dat(0x12);
wr_dat(0x15);
wr_dat(0x14);
wr_dat(0x0F);
wr_comm(0xF1);
wr_dat(0x01);
wr_dat(0x28);
wr_dat(0x2D);
wr_dat(0x3A);
wr_dat(0xB8);
wr_dat(0x0D);
wr_dat(0x0E);
wr_dat(0x2D);
wr_dat(0x29);
wr_dat(0x24);
wr_dat(0x29);
wr_dat(0x28);
wr_dat(0x26);
wr_dat(0x31);
wr_dat(0x3B);
wr_dat(0x00);
wr_dat(0x00);
wr_dat(0x03);
wr_dat(0x12);
/* End Gamma Sequence */
wr_comm(0x3A); //65k mode
wr_dat(0x05);
wr_dat(0x08);
wr_dat(0x08);
wr_dat(0x18);
wr_dat(0x16);
wr_dat(0x0F);
wr_comm(0xfe);
wr_comm(0xff);
wr_comm(0x2a);
wr_dat(0x00);
@ -560,12 +968,27 @@ static void lcd_s90319_panel_init(void)
wr_comm(0x2b);
wr_dat(0x00);
wr_dat(0x03);
wr_dat(0x01);
wr_dat(0x00);
wr_dat(0x82);
wr_dat(0x80);
wr_comm(0x29); //Display on
wr_comm(0x2C);
wr_comm(0x11);
wr_comm(0x29);
mdelay(120);
wr_comm(0x2c);
}
#endif
static void lcd_s90319_panel_init(void)
{
if (lcd_id == 0x7C89F0)
{
oled_st7735s_init();
}
else
{
oled_st7735t_init();
}
}
@ -637,13 +1060,15 @@ static void s90319_disp_powerup(void)
s90319_state.disp_powered_up = TRUE;
oled_s90319_power_save(1);
oled_gpio_spi_config();
lcd_id = get_lcd_id();
gpio_direction_output(lcd_s90319_cs, 0);
/* 1 data, 0 command*/
gpio_direction_output(lcd_s90319_rsx, 0);
mdelay(5);
gpio_set_value_cansleep(lcd_s90319_cs, 0);
mdelay(3);
}
}
@ -714,8 +1139,17 @@ static void s90319fb_clear_screen (const struct fb_fillrect *rect)
oled_s90319_set_col_addr[1] = x + X_OFFSET;
oled_s90319_set_col_addr[3] = x + width - 1 + X_OFFSET;
oled_s90319_set_row_addr[1] = y + Y_OFFSET;
oled_s90319_set_row_addr[3] = y + height - 1 + Y_OFFSET;
if (lcd_id == ID_GC9106 || lcd_id == ID_GC9104)
{
oled_s90319_set_row_addr[1] = y + Y_OFFSET_GC9106;
oled_s90319_set_row_addr[3] = y + height - 1 + Y_OFFSET_GC9106;
}
else
{
oled_s90319_set_row_addr[1] = y + Y_OFFSET;
oled_s90319_set_row_addr[3] = y + height - 1 + Y_OFFSET;
}
for (i = 0; i < height; i++){
for (j = 0; j < width * 2; j++)
@ -786,7 +1220,7 @@ static int __init s90319fb_map_fb_memory(struct fb_info *info)
}
/*******************************************************************************
Function : s90319fb_unmap_video_memory
Function : s90319fb_unmap_vdeo_memory
Description : Free the DRAM memory of the frame buffer.
Input : info: Frame buffer structure.
Output : None

1
kernel/drivers/oled/s90319fb.h
View File

@ -48,6 +48,7 @@ struct s90319fb_display {
#define X_OFFSET 2
#define Y_OFFSET 3
#define Y_OFFSET_GC9106 1
uint8_t oled_s90319_set_col_addr[] = {
0x00, 0x00, 0x00, 0x00

9
kernel/drivers/power/Kconfig
View File

@ -243,6 +243,15 @@ config MP2617_CHARGER
The MP2617 charger chip is a charging solution. This driver supports
enabling and disabling charging, setting the input current limit.
config BQ25601_CHARGER
tristate "TI BQ25601 Battery Charger"
help
The BQ25601 device is a highly-integrated 3-A switch-mode battery charge
management and system power path management device for single cell Li-Ion
and Li-polymer battery. The low impedance power path optimizes switch-mode
operation efficiency, reduces battery charging time and extends battery
life during discharging phase.
config CHARGER_PCF50633
tristate "NXP PCF50633 MBC"
depends on MFD_PCF50633

1
kernel/drivers/power/Makefile
View File

@ -38,6 +38,7 @@ obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o
obj-$(CONFIG_BATTERY_TWL4030_MADC) += twl4030_madc_battery.o
obj-$(CONFIG_CHARGER_88PM860X) += 88pm860x_charger.o
obj-$(CONFIG_MP2617_CHARGER) += mp2617-charger.o
obj-$(CONFIG_BQ25601_CHARGER) += bq25601-charger.o
obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o
obj-$(CONFIG_BATTERY_JZ4740) += jz4740-battery.o
obj-$(CONFIG_BATTERY_INTEL_MID) += intel_mid_battery.o

1020
kernel/drivers/power/bq25601-charger.c Executable file
View File

File diff suppressed because it is too large Load Diff

1
kernel/include/linux/mtd/nand.h
View File

@ -725,6 +725,7 @@ struct nand_chip {
#define NAND_MFR_INTEL 0x89
#define NAND_MFR_WINBOND 0xef
#define NAND_MFR_ESMT 0xc8
#define NAND_MFR_ESMT2 0x2c
/* The maximum expected count of bytes in the NAND ID sequence */
#define NAND_MAX_ID_LEN 8

2
kernel/include/linux/netdevice.h Normal file → Executable file
View File

@ -1220,6 +1220,7 @@ enum netdev_priv_flags {
IFF_LIVE_ADDR_CHANGE = 1<<20,
IFF_MACVLAN = 1<<21,
IFF_XMIT_DST_RELEASE_PERM = 1<<22,
IFF_WAN_DEV = 1<<23,
};
#define IFF_802_1Q_VLAN IFF_802_1Q_VLAN
@ -1245,6 +1246,7 @@ enum netdev_priv_flags {
#define IFF_LIVE_ADDR_CHANGE IFF_LIVE_ADDR_CHANGE
#define IFF_MACVLAN IFF_MACVLAN
#define IFF_XMIT_DST_RELEASE_PERM IFF_XMIT_DST_RELEASE_PERM
#define IFF_WAN_DEV IFF_WAN_DEV
/**
* struct net_device - The DEVICE structure.

16
kernel/net/core/dev.c Normal file → Executable file
View File

@ -175,6 +175,13 @@ static int call_netdevice_notifiers_info(unsigned long val,
DEFINE_RWLOCK(dev_base_lock);
EXPORT_SYMBOL(dev_base_lock);
//[zhangguosong start] 2018-05-07
/*
*brief 对所有来自WAN的流量均设置数据包的mark字段
*/
#define MASK_FOR_WAN2LAN (0x00008000)
//[zhangguosong end]
/* protects napi_hash addition/deletion and napi_gen_id */
static DEFINE_SPINLOCK(napi_hash_lock);
@ -3412,6 +3419,14 @@ static int netif_rx_internal(struct sk_buff *skb)
net_timestamp_check(netdev_tstamp_prequeue, skb);
trace_netif_rx(skb);
//[zhangguosong start] 2018-05-07 for mark downstream (traffic from wan interface)
if (skb->dev && (skb->dev->priv_flags & IFF_WAN_DEV))
{
skb->mark |= MASK_FOR_WAN2LAN;
}
//[zhangguosong end]
#ifdef CONFIG_RPS
WARN_ONCE(skb_cloned(skb), "Cloned packet from dev %s\n",
skb->dev->name);
@ -5621,6 +5636,7 @@ void dev_set_rx_mode(struct net_device *dev)
netif_addr_unlock_bh(dev);
}
/**
* dev_get_flags - get flags reported to userspace
* @dev: device

44
kernel/net/core/dev_ioctl.c Normal file → Executable file
View File

@ -17,6 +17,35 @@
* match. --pb
*/
#define SIOCSIFPRIVFLAGS 0x89ba //set device priv_flags
#define SIOCGIFPRIVFLAGS 0x89bb //get device priv_flags
//[zhangguosong start] 2018-06-20
static unsigned int dev_get_privflags(const struct net_device *dev)
{
return dev->priv_flags;
}
static unsigned int dev_change_privflags(struct net_device *dev, unsigned int flags)
{
int old_flags = dev->priv_flags;
if ((old_flags ^ flags) & IFF_WAN_DEV)
{
if (old_flags & IFF_WAN_DEV)
{
dev->priv_flags &= ~IFF_WAN_DEV;
}
else
{
dev->priv_flags |= IFF_WAN_DEV;
}
}
return 0;
}
//[zhangguosong end]
static int dev_ifname(struct net *net, struct ifreq __user *arg)
{
struct ifreq ifr;
@ -115,6 +144,7 @@ static int dev_ifconf(struct net *net, char __user *arg)
return copy_to_user(arg, &ifc, sizeof(struct ifconf)) ? -EFAULT : 0;
}
#define ifr_iflags ifr_ifru.ifru_ivalue /* add by zhangguosong, for traffic control module */
/*
* Perform the SIOCxIFxxx calls, inside rcu_read_lock()
*/
@ -127,6 +157,10 @@ static int dev_ifsioc_locked(struct net *net, struct ifreq *ifr, unsigned int cm
return -ENODEV;
switch (cmd) {
//[zhangguosong start]
case SIOCGIFPRIVFLAGS: /* Get interface priv_flags */
ifr->ifr_iflags = dev_get_privflags(dev);
//[zhangguosng end]
case SIOCGIFFLAGS: /* Get interface flags */
ifr->ifr_flags = (short) dev_get_flags(dev);
return 0;
@ -248,6 +282,10 @@ static int dev_ifsioc(struct net *net, struct ifreq *ifr, unsigned int cmd)
ops = dev->netdev_ops;
switch (cmd) {
//[zhangguosong start] 2018-06-20
case SIOCSIFPRIVFLAGS:
return dev_change_privflags(dev, ifr->ifr_iflags);
//[zhangguosong end]
case SIOCSIFFLAGS: /* Set interface flags */
return dev_change_flags(dev, ifr->ifr_flags);
@ -427,6 +465,9 @@ int dev_ioctl(struct net *net, unsigned int cmd, void __user *arg)
* - atomic and do not require locking.
* - return a value
*/
//[zhangguosong start]
case SIOCGIFPRIVFLAGS:
//[zhangguosong end]
case SIOCGIFFLAGS:
case SIOCGIFMETRIC:
case SIOCGIFMTU:
@ -503,6 +544,9 @@ int dev_ioctl(struct net *net, unsigned int cmd, void __user *arg)
* - require strict serialization.
* - do not return a value
*/
//[zhangguosong start] 2018-06-20
case SIOCSIFPRIVFLAGS:
//[zhangguosong end]
case SIOCSIFFLAGS:
case SIOCSIFMETRIC:
case SIOCSIFMTU: