260 lines
7.1 KiB
Plaintext
260 lines
7.1 KiB
Plaintext
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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usb3: ssusb@8a00000 {
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compatible = "qcom,dwc-usb3-msm";
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reg = <0x08a00000 0xf8c00>,
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<0x0007e000 0x400>;
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reg-names = "core_base", "ahb2phy_base";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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interrupt-parent = <&usb3>;
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interrupts = <0 1 2 3>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0xffffffff>;
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interrupt-map = <0x0 0 &intc 0 202 0
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0x0 1 &intc 0 203 0
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0x0 2 &intc 0 180 0
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0x0 3 &spmi_bus 0x0 0x0 0xc4 0x0>;
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interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq",
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"pmic_id_irq";
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USB3_GDSC-supply = <&gdsc_usb30>;
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vdda33-supply = <&pmdcalifornium_l10>;
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vdda18-supply = <&pmdcalifornium_l5>;
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qcom,usb-dbm = <&dbm_1p5>;
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qcom,msm-bus,name = "usb3";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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<61 512 0 0>, <61 676 0 0>,
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<61 512 0 960000>, <61 676 0 2400>;
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qcom,lpm-to-suspend-delay-ms = <2000>;
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clocks = <&clock_gcc clk_gcc_usb30_master_clk>,
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<&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>,
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<&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
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<&clock_gcc clk_gcc_usb30_sleep_clk>,
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<&clock_gcc clk_cxo_dwc3_clk>,
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<&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>;
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clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk",
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"xo", "cfg_ahb_clk";
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dwc3@8a00000 {
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compatible = "snps,dwc3";
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reg = <0x08a00000 0xcd00>;
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interrupt-parent = <&intc>;
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interrupts = <0 131 0>;
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usb-phy = <&qusb_phy>, <&ssphy>;
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tx-fifo-resize;
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snps,nominal-elastic-buffer;
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snps,is-utmi-l1-suspend;
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snps,hird-threshold = /bits/ 8 <0x0>;
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snps,bus-suspend-enable;
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snps,usb3-u1u2-disable;
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snps,num-gsi-evt-buffs = <0x3>;
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};
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qcom,usbbam@0x8B04000 {
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compatible = "qcom,usb-bam-msm";
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reg = <0x8b04000 0x1b000>;
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interrupt-parent = <&intc>;
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interrupts = <0 132 0>;
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qcom,bam-type = <0>;
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qcom,usb-bam-fifo-baseaddr = <0x08604000>;
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qcom,usb-bam-num-pipes = <1>;
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qcom,ignore-core-reset-ack;
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qcom,disable-clk-gating;
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qcom,usb-bam-override-threshold = <0x4001>;
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qcom,usb-bam-max-mbps-highspeed = <400>;
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qcom,usb-bam-max-mbps-superspeed = <3600>;
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qcom,reset-bam-on-connect;
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qcom,pipe0 {
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label = "ssusb-qdss-in-0";
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qcom,usb-bam-mem-type = <2>;
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qcom,dir = <1>;
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qcom,pipe-num = <0>;
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qcom,peer-bam = <0>;
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qcom,peer-bam-physical-address = <0x00884000>;
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qcom,src-bam-pipe-index = <0>;
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qcom,dst-bam-pipe-index = <2>;
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qcom,data-fifo-offset = <0x0>;
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qcom,data-fifo-size = <0xc00>;
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qcom,descriptor-fifo-offset = <0xc00>;
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qcom,descriptor-fifo-size = <0x400>;
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};
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};
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};
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android_usb@86000c8 {
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compatible = "qcom,android-usb";
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reg = <0x086000c8 0xc8>;
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qcom,pm-qos-latency = <101 2001 30001>;
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qcom,supported-func = "ffs","audio","diag","serial",
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"mass_storage","rndis_gsi","ecm_gsi","rmnet_gsi",
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"mbim_gsi","dpl_gsi","gps","qdss";
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};
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qusb_phy: qusb@79000 {
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compatible = "qcom,qusb2phy";
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reg = <0x00079000 0x180>,
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<0x08af8800 0x400>,
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<0x01841030 0x4>,
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<0x01956044 0x4>;
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reg-names = "qusb_phy_base",
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"qscratch_base",
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"ref_clk_addr",
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"tcsr_phy_clk_scheme_sel";
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vdd-supply = <&pmdcalifornium_l4>;
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vdda18-supply = <&pmdcalifornium_l5>;
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vdda33-supply = <&pmdcalifornium_l10>;
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qcom,vdd-voltage-level = <0 928000 928000>;
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qcom,qusb-phy-init-seq = <0xf8 0x80
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0xb3 0x84
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0x83 0x88
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0xc0 0x8c
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0x30 0x08
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0x79 0x0c
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0x21 0x10
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0x14 0x9c
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0x9f 0x1c
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0x00 0x18>;
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phy_type = "utmi";
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clocks = <&clock_gcc clk_ln_bb_clk>,
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<&clock_gcc clk_gcc_qusb_ref_clk>,
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<&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,
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<&clock_gcc clk_gcc_qusb2a_phy_reset>;
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clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk",
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"phy_reset";
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};
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ssphy: ssphy@78000 {
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compatible = "qcom,usb-ssphy-qmp";
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reg = <0x00078000 0x45c>,
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<0x01947244 0x4>,
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<0x01956044 0x4>;
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reg-names = "qmp_phy_base",
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"vls_clamp_reg",
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"tcsr_phy_clk_scheme_sel";
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qcom,qmp-phy-init-seq = <0xac 0x14 0x1a 0x00
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0x34 0x08 0x08 0x00
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0x174 0x30 0x30 0x00
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0x3c 0x06 0x06 0x00
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0xb4 0x00 0x00 0x00
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0xb8 0x08 0x08 0x00
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0x194 0x06 0x06 0x3e8
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0x19c 0x01 0x01 0x00
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0x178 0x00 0x00 0x00
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0xd0 0x82 0x82 0x00
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0xdc 0x55 0x55 0x00
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0xe0 0x55 0x55 0x00
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0xe4 0x03 0x03 0x00
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0x78 0x0b 0x0b 0x00
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0x84 0x16 0x16 0x00
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0x90 0x28 0x28 0x00
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0x108 0x80 0x80 0x00
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0x10c 0x00 0x00 0x00
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0x184 0x0a 0x0a 0x00
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0x4c 0x15 0x15 0x00
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0x50 0x34 0x34 0x00
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0x54 0x00 0x00 0x00
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0xc8 0x00 0x00 0x00
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0x18c 0x00 0x00 0x00
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0xcc 0x00 0x00 0x00
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0x128 0x00 0x00 0x00
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0x0c 0x0a 0x0a 0x00
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0x10 0x01 0x01 0x00
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0x1c 0x31 0x31 0x00
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0x20 0x01 0x01 0x00
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0x14 0x00 0x00 0x00
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0x18 0x00 0x00 0x00
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0x24 0xde 0xde 0x00
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0x28 0x07 0x07 0x00
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0x48 0x0f 0x0f 0x00
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0x70 0x0f 0x0f 0x00
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0x100 0x80 0x80 0x00
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0x440 0x0b 0x0b 0x00
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0x4d8 0x02 0x02 0x00
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0x4dc 0x6c 0x6c 0x00
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0x4e0 0xbb 0xbb 0x00
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0x508 0x77 0x77 0x00
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0x50c 0x80 0x80 0x00
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0x514 0x03 0x03 0x00
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0x51c 0x16 0x16 0x00
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0x448 0x75 0x75 0x00
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0x454 0x00 0x00 0x00
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0x40c 0x0a 0x0a 0x00
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0x41c 0x06 0x06 0x00
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0x510 0x00 0x00 0x00
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0x268 0x45 0x45 0x00
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0x2ac 0x12 0x12 0x00
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0x294 0x06 0x06 0x00
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0x254 0x00 0x00 0x00
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0x8c8 0x83 0x83 0x00
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0x8c4 0x02 0x02 0x00
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0x8cc 0x09 0x09 0x00
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0x8d0 0xa2 0xa2 0x00
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0x8d4 0x85 0x85 0x00
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0x880 0xd1 0xd1 0x00
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0x884 0x1f 0x1f 0x00
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0x888 0x47 0x47 0x00
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0x80c 0x9f 0x9f 0x00
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0x824 0x17 0x17 0x00
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0x828 0x0f 0x0f 0x00
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0x8b8 0x75 0x75 0x00
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0x8bc 0x13 0x13 0x00
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0x8b0 0x86 0x86 0x00
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0x8a0 0x04 0x04 0x00
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0x88c 0x44 0x44 0x00
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0x870 0xe7 0xe7 0x00
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0x874 0x03 0x03 0x00
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0x878 0x40 0x40 0x00
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0x87c 0x00 0x00 0x00
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0x9d8 0x88 0x88 0x00
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0xffffffff 0xffffffff 0x00 0x00>;
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qcom,qmp-phy-reg-offset = <0x988 0x98c 0x990 0x994
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0x974 0x8d8 0x8dc 0x804 0x800
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0x808>;
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vdd-supply = <&pmdcalifornium_l4>;
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vdda18-supply = <&pmdcalifornium_l5>;
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qcom,vdd-voltage-level = <0 928000 928000>;
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qcom,vbus-valid-override;
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clocks = <&clock_gcc clk_gcc_usb3_aux_clk>,
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<&clock_gcc clk_gcc_usb3_pipe_clk>,
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<&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,
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<&clock_gcc clk_gcc_usb3_phy_reset>,
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<&clock_gcc clk_gcc_usb3phy_phy_reset>,
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<&clock_gcc clk_ln_bb_clk>,
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<&clock_gcc clk_gcc_usb_ss_ref_clk>;
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clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk",
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"phy_reset", "phy_phy_reset",
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"ref_clk_src", "ref_clk";
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};
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dbm_1p5: dbm@0x8af8000 {
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compatible = "qcom,usb-dbm-1p5";
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reg = <0x08af8000 0x300>;
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qcom,reset-ep-after-lpm-resume;
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};
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};
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