/*
 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&soc {
	usb3: ssusb@8a00000 {
		compatible = "qcom,dwc-usb3-msm";
		reg = <0x08a00000 0xf8c00>,
			<0x0007e000 0x400>;
		reg-names = "core_base", "ahb2phy_base";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		interrupt-parent = <&usb3>;
		interrupts = <0 1 2 3>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0x0 0xffffffff>;
		interrupt-map = <0x0 0 &intc 0 202 0
				 0x0 1 &intc 0 203 0
				 0x0 2 &intc 0 180 0
				 0x0 3 &spmi_bus 0x0 0x0 0xc4 0x0>;
		interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq",
				"pmic_id_irq";
		USB3_GDSC-supply = <&gdsc_usb30>;
		vdda33-supply = <&pmdcalifornium_l10>;
		vdda18-supply = <&pmdcalifornium_l5>;
		qcom,usb-dbm = <&dbm_1p5>;

		qcom,msm-bus,name = "usb3";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
					<61 512 0 0>, <61 676 0 0>,
					<61 512 0 960000>, <61 676 0 2400>;
		qcom,lpm-to-suspend-delay-ms = <2000>;

		clocks = <&clock_gcc clk_gcc_usb30_master_clk>,
			 <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>,
			 <&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
			 <&clock_gcc clk_gcc_usb30_sleep_clk>,
			 <&clock_gcc clk_cxo_dwc3_clk>,
			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>;

		clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk",
				"xo", "cfg_ahb_clk";

		dwc3@8a00000 {
			compatible = "snps,dwc3";
			reg = <0x08a00000 0xcd00>;
			interrupt-parent = <&intc>;
			interrupts = <0 131 0>;
			usb-phy = <&qusb_phy>, <&ssphy>;
			tx-fifo-resize;
			snps,nominal-elastic-buffer;
			snps,is-utmi-l1-suspend;
			snps,hird-threshold = /bits/ 8 <0x0>;
			snps,bus-suspend-enable;
			snps,usb3-u1u2-disable;
			snps,num-gsi-evt-buffs = <0x3>;
		};

		qcom,usbbam@0x8B04000 {
			compatible = "qcom,usb-bam-msm";
			reg = <0x8b04000 0x1b000>;
			interrupt-parent = <&intc>;
			interrupts = <0 132 0>;

			qcom,bam-type = <0>;
			qcom,usb-bam-fifo-baseaddr = <0x08604000>;
			qcom,usb-bam-num-pipes = <1>;
			qcom,ignore-core-reset-ack;
			qcom,disable-clk-gating;
			qcom,usb-bam-override-threshold = <0x4001>;
			qcom,usb-bam-max-mbps-highspeed = <400>;
			qcom,usb-bam-max-mbps-superspeed = <3600>;
			qcom,reset-bam-on-connect;

			qcom,pipe0 {
				label = "ssusb-qdss-in-0";
				qcom,usb-bam-mem-type = <2>;
				qcom,dir = <1>;
				qcom,pipe-num = <0>;
				qcom,peer-bam = <0>;
				qcom,peer-bam-physical-address = <0x00884000>;
				qcom,src-bam-pipe-index = <0>;
				qcom,dst-bam-pipe-index = <2>;
				qcom,data-fifo-offset = <0x0>;
				qcom,data-fifo-size = <0xc00>;
				qcom,descriptor-fifo-offset = <0xc00>;
				qcom,descriptor-fifo-size = <0x400>;
			};
		};
	};

	android_usb@86000c8 {
		compatible = "qcom,android-usb";
		reg = <0x086000c8 0xc8>;
		qcom,pm-qos-latency = <101 2001 30001>;
		qcom,supported-func = "ffs","audio","diag","serial",
			"mass_storage","rndis_gsi","ecm_gsi","rmnet_gsi",
			"mbim_gsi","dpl_gsi","gps","qdss";
	};

	qusb_phy: qusb@79000 {
		compatible = "qcom,qusb2phy";
		reg = <0x00079000 0x180>,
		      <0x08af8800 0x400>,
		      <0x01841030 0x4>,
		      <0x01956044 0x4>;
		reg-names = "qusb_phy_base",
			    "qscratch_base",
			    "ref_clk_addr",
			    "tcsr_phy_clk_scheme_sel";
		vdd-supply = <&pmdcalifornium_l4>;
		vdda18-supply = <&pmdcalifornium_l5>;
		vdda33-supply = <&pmdcalifornium_l10>;
		qcom,vdd-voltage-level = <0 928000 928000>;
		qcom,qusb-phy-init-seq = <0xf8 0x80
					0xb3 0x84
					0x83 0x88
					0xc0 0x8c
					0x30 0x08
					0x79 0x0c
					0x21 0x10
					0x14 0x9c
					0x9f 0x1c
					0x00 0x18>;
		phy_type = "utmi";

		clocks = <&clock_gcc clk_ln_bb_clk>,
			 <&clock_gcc clk_gcc_qusb_ref_clk>,
			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,
			 <&clock_gcc clk_gcc_qusb2a_phy_reset>;

		clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk",
			"phy_reset";
	};

	ssphy: ssphy@78000 {
		compatible = "qcom,usb-ssphy-qmp";
		reg = <0x00078000 0x45c>,
		      <0x01947244 0x4>,
		      <0x01956044 0x4>;
		reg-names = "qmp_phy_base",
			    "vls_clamp_reg",
			    "tcsr_phy_clk_scheme_sel";
		qcom,qmp-phy-init-seq = <0xac 0x14 0x1a 0x00
					0x34 0x08 0x08 0x00
					0x174 0x30 0x30 0x00
					0x3c 0x06 0x06 0x00
					0xb4 0x00 0x00 0x00
					0xb8 0x08 0x08 0x00
					0x194 0x06 0x06 0x3e8
					0x19c 0x01 0x01 0x00
					0x178 0x00 0x00 0x00
					0xd0 0x82 0x82 0x00
					0xdc 0x55 0x55 0x00
					0xe0 0x55 0x55 0x00
					0xe4 0x03 0x03 0x00
					0x78 0x0b 0x0b 0x00
					0x84 0x16 0x16 0x00
					0x90 0x28 0x28 0x00
					0x108 0x80 0x80 0x00
					0x10c 0x00 0x00 0x00
					0x184 0x0a 0x0a 0x00
					0x4c 0x15 0x15 0x00
					0x50 0x34 0x34 0x00
					0x54 0x00 0x00 0x00
					0xc8 0x00 0x00 0x00
					0x18c 0x00 0x00 0x00
					0xcc 0x00 0x00 0x00
					0x128 0x00 0x00 0x00
					0x0c 0x0a 0x0a 0x00
					0x10 0x01 0x01 0x00
					0x1c 0x31 0x31 0x00
					0x20 0x01 0x01 0x00
					0x14 0x00 0x00 0x00
					0x18 0x00 0x00 0x00
					0x24 0xde 0xde 0x00
					0x28 0x07 0x07 0x00
					0x48 0x0f 0x0f 0x00
					0x70 0x0f 0x0f 0x00
					0x100 0x80 0x80 0x00
					0x440 0x0b 0x0b 0x00
					0x4d8 0x02 0x02 0x00
					0x4dc 0x6c 0x6c 0x00
					0x4e0 0xbb 0xbb 0x00
					0x508 0x77 0x77 0x00
					0x50c 0x80 0x80 0x00
					0x514 0x03 0x03 0x00
					0x51c 0x16 0x16 0x00
					0x448 0x75 0x75 0x00
					0x454 0x00 0x00 0x00
					0x40c 0x0a 0x0a 0x00
					0x41c 0x06 0x06 0x00
					0x510 0x00 0x00 0x00
					0x268 0x45 0x45 0x00
					0x2ac 0x12 0x12 0x00
					0x294 0x06 0x06 0x00
					0x254 0x00 0x00 0x00
					0x8c8 0x83 0x83 0x00
					0x8c4 0x02 0x02 0x00
					0x8cc 0x09 0x09 0x00
					0x8d0 0xa2 0xa2 0x00
					0x8d4 0x85 0x85 0x00
					0x880 0xd1 0xd1 0x00
					0x884 0x1f 0x1f 0x00
					0x888 0x47 0x47 0x00
					0x80c 0x9f 0x9f 0x00
					0x824 0x17 0x17 0x00
					0x828 0x0f 0x0f 0x00
					0x8b8 0x75 0x75 0x00
					0x8bc 0x13 0x13 0x00
					0x8b0 0x86 0x86 0x00
					0x8a0 0x04 0x04 0x00
					0x88c 0x44 0x44 0x00
					0x870 0xe7 0xe7 0x00
					0x874 0x03 0x03 0x00
					0x878 0x40 0x40 0x00
					0x87c 0x00 0x00 0x00
					0x9d8 0x88 0x88 0x00
					0xffffffff 0xffffffff 0x00 0x00>;
		qcom,qmp-phy-reg-offset = <0x988 0x98c 0x990 0x994
					0x974 0x8d8 0x8dc 0x804 0x800
					0x808>;
		vdd-supply = <&pmdcalifornium_l4>;
		vdda18-supply = <&pmdcalifornium_l5>;
		qcom,vdd-voltage-level = <0 928000 928000>;
		qcom,vbus-valid-override;

		clocks = <&clock_gcc clk_gcc_usb3_aux_clk>,
			 <&clock_gcc clk_gcc_usb3_pipe_clk>,
			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,
			 <&clock_gcc clk_gcc_usb3_phy_reset>,
			 <&clock_gcc clk_gcc_usb3phy_phy_reset>,
			 <&clock_gcc clk_ln_bb_clk>,
			 <&clock_gcc clk_gcc_usb_ss_ref_clk>;

		clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk",
			      "phy_reset", "phy_phy_reset",
			      "ref_clk_src", "ref_clk";
	};

	dbm_1p5: dbm@0x8af8000 {
		compatible = "qcom,usb-dbm-1p5";
		reg = <0x08af8000 0x300>;
		qcom,reset-ep-after-lpm-resume;
	};
};