fix connection to Audiojacks, change Resistor footprints
This commit is contained in:
parent
530a22807b
commit
14ee684aa5
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@ -1,10 +1,10 @@
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"#","Reference","Qty","Value","Footprint","DNP"
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"1","BT1","1","9V Battery","",""
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"2","C1, C2, C3, C4, C5, C6","6","2.2 µF","Capacitor_THT:CP_Radial_D4.0mm_P2.00mm",""
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"3","J1","1","OPAmp","Package_DIP:DIP-8_W7.62mm_Socket",""
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"4","J2","1","AudioJack2_Ground_Switch","Connector_Audio:Jack_3.5mm_CUI_SJ1-3525N_Horizontal",""
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"5","L1, L2","2","L","Inductor_THT:L_Axial_L7.0mm_D3.3mm_P5.08mm_Vertical_Fastron_MICC",""
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"6","R1, R2","2","1 kOhm","Resistor_THT:R_Box_L8.4mm_W2.5mm_P5.08mm",""
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"7","R3","1","390kOhm","Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical",""
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"8","R4","1","390 kOhm","Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical",""
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"9","R5, R6","2","100kOhm","Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical",""
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#,Reference,Qty,Value,Footprint,DNP
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1,BT1,1,9V Battery,,
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2,"C1, C2, C3, C4, C5, C6",6,2.2 µF,Capacitor_THT:CP_Radial_D4.0mm_P2.00mm,
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3,J1,1,OPAmp,Package_DIP:DIP-8_W7.62mm_Socket,
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4,J2,1,AudioJackx,Connector_Audio:Jack_3.5mm_CUI_SJ1-3525N_Horizontal,
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5,"L1, L2",2,L,Inductor_THT:L_Axial_L7.0mm_D3.3mm_P5.08mm_Vertical_Fastron_MICC,
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6,"R1, R2",2,1 kOhm,Resistor_THT:R_Box_L8.4mm_W2.5mm_P5.08mm,
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7,R3,1,390 kOhm,Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical,
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8,R4,1,390 kOhm,Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical,
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9,"R5, R6",2,100 kOhm,Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical,
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File diff suppressed because it is too large
Load Diff
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@ -19,7 +19,7 @@
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"footprints": true,
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"graphics": true,
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"keepouts": true,
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"lockedItems": false,
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"lockedItems": true,
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"otherItems": true,
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"pads": true,
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"text": true,
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@ -66,7 +66,7 @@
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39,
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40
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],
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"visible_layers": "0001020_80000000",
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"visible_layers": "0001020_80000001",
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"zone_display_mode": 0
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},
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"meta": {
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@ -111,21 +111,21 @@
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},
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"rules": {
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"max_error": 0.005,
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"min_clearance": 0.049999999999999996,
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"min_connection": 0.09999999999999999,
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"min_copper_edge_clearance": 0.19999999999999998,
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"min_clearance": 0.15,
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"min_connection": 0.19999999999999998,
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"min_copper_edge_clearance": 0.3,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_hole_to_hole": 0.3,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_resolved_spokes": 2,
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"min_silk_clearance": 0.0,
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_text_thickness": 0.15,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.15,
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"min_via_annular_width": 0.15,
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"min_via_diameter": 0.5,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.19999999999999998,
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"min_via_diameter": 0.7,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"solder_mask_to_copper_clearance": 0.0,
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@ -173,12 +173,28 @@
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],
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"track_widths": [
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0.0,
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0.254,
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0.3,
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0.4,
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0.508,
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1.0
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],
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"via_dimensions": [
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{
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"diameter": 0.0,
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"drill": 0.0
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},
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{
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"diameter": 0.7,
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"drill": 0.3
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},
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{
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"diameter": 0.8,
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"drill": 0.4
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},
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{
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"diameter": 1.0,
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"drill": 0.6
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}
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],
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"zones_allow_external_fillets": false
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@ -413,7 +429,7 @@
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"classes": [
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{
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"bus_width": 12,
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"clearance": 0.1,
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"clearance": 0.254,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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@ -423,24 +439,7 @@
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"name": "Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 1.0,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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},
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "default old",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.1,
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"track_width": 0.3,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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@ -451,12 +450,7 @@
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},
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": [
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{
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"netclass": "default old",
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"pattern": "/Virtual_Ground"
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}
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]
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"netclass_patterns": []
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},
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"pcbnew": {
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"last_paths": {
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@ -746,36 +746,33 @@
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Loading…
Reference in New Issue