352 lines
12 KiB
C
352 lines
12 KiB
C
/*
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* Copyright (C) 2005 Mike Lee(eemike@gmail.com)
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*
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* This udc driver is now under testing and code is based on pxa2xx_udc.h
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* Please use it with your own risk!
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __LINUX_USB_GADGET_IMX_H
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#define __LINUX_USB_GADGET_IMX_H
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#include <linux/types.h>
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/* Helper macros */
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#define EP_NO(ep) ((ep->bEndpointAddress) & ~USB_DIR_IN) /* IN:1, OUT:0 */
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#define EP_DIR(ep) ((ep->bEndpointAddress) & USB_DIR_IN ? 1 : 0)
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#define IMX_USB_NB_EP 6
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/* Driver structures */
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struct imx_request {
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struct usb_request req;
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struct list_head queue;
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unsigned int in_use;
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};
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enum ep0_state {
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EP0_IDLE,
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EP0_IN_DATA_PHASE,
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EP0_OUT_DATA_PHASE,
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EP0_CONFIG,
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EP0_STALL,
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};
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struct imx_ep_struct {
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struct usb_ep ep;
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struct imx_udc_struct *imx_usb;
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struct list_head queue;
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unsigned char stopped;
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unsigned char fifosize;
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unsigned char bEndpointAddress;
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unsigned char bmAttributes;
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};
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struct imx_udc_struct {
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struct usb_gadget gadget;
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struct usb_gadget_driver *driver;
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struct device *dev;
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struct imx_ep_struct imx_ep[IMX_USB_NB_EP];
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struct clk *clk;
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struct timer_list timer;
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enum ep0_state ep0state;
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struct resource *res;
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void __iomem *base;
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unsigned char set_config;
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int cfg,
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intf,
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alt,
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usbd_int[7];
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};
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/* USB registers */
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#define USB_FRAME (0x00) /* USB frame */
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#define USB_SPEC (0x04) /* USB Spec */
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#define USB_STAT (0x08) /* USB Status */
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#define USB_CTRL (0x0C) /* USB Control */
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#define USB_DADR (0x10) /* USB Desc RAM addr */
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#define USB_DDAT (0x14) /* USB Desc RAM/EP buffer data */
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#define USB_INTR (0x18) /* USB interrupt */
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#define USB_MASK (0x1C) /* USB Mask */
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#define USB_ENAB (0x24) /* USB Enable */
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#define USB_EP_STAT(x) (0x30 + (x*0x30)) /* USB status/control */
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#define USB_EP_INTR(x) (0x34 + (x*0x30)) /* USB interrupt */
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#define USB_EP_MASK(x) (0x38 + (x*0x30)) /* USB mask */
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#define USB_EP_FDAT(x) (0x3C + (x*0x30)) /* USB FIFO data */
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#define USB_EP_FDAT0(x) (0x3C + (x*0x30)) /* USB FIFO data */
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#define USB_EP_FDAT1(x) (0x3D + (x*0x30)) /* USB FIFO data */
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#define USB_EP_FDAT2(x) (0x3E + (x*0x30)) /* USB FIFO data */
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#define USB_EP_FDAT3(x) (0x3F + (x*0x30)) /* USB FIFO data */
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#define USB_EP_FSTAT(x) (0x40 + (x*0x30)) /* USB FIFO status */
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#define USB_EP_FCTRL(x) (0x44 + (x*0x30)) /* USB FIFO control */
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#define USB_EP_LRFP(x) (0x48 + (x*0x30)) /* USB last rd f. pointer */
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#define USB_EP_LWFP(x) (0x4C + (x*0x30)) /* USB last wr f. pointer */
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#define USB_EP_FALRM(x) (0x50 + (x*0x30)) /* USB FIFO alarm */
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#define USB_EP_FRDP(x) (0x54 + (x*0x30)) /* USB FIFO read pointer */
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#define USB_EP_FWRP(x) (0x58 + (x*0x30)) /* USB FIFO write pointer */
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/* USB Control Register Bit Fields.*/
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#define CTRL_CMDOVER (1<<6) /* UDC status */
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#define CTRL_CMDERROR (1<<5) /* UDC status */
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#define CTRL_FE_ENA (1<<3) /* Enable Font End logic */
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#define CTRL_UDC_RST (1<<2) /* UDC reset */
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#define CTRL_AFE_ENA (1<<1) /* Analog Font end enable */
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#define CTRL_RESUME (1<<0) /* UDC resume */
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/* USB Status Register Bit Fields.*/
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#define STAT_RST (1<<8)
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#define STAT_SUSP (1<<7)
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#define STAT_CFG (3<<5)
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#define STAT_INTF (3<<3)
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#define STAT_ALTSET (7<<0)
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/* USB Interrupt Status/Mask Registers Bit fields */
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#define INTR_WAKEUP (1<<31) /* Wake up Interrupt */
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#define INTR_MSOF (1<<7) /* Missed Start of Frame */
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#define INTR_SOF (1<<6) /* Start of Frame */
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#define INTR_RESET_STOP (1<<5) /* Reset Signaling stop */
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#define INTR_RESET_START (1<<4) /* Reset Signaling start */
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#define INTR_RESUME (1<<3) /* Suspend to resume */
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#define INTR_SUSPEND (1<<2) /* Active to suspend */
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#define INTR_FRAME_MATCH (1<<1) /* Frame matched */
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#define INTR_CFG_CHG (1<<0) /* Configuration change occurred */
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/* USB Enable Register Bit Fields.*/
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#define ENAB_RST (1<<31) /* Reset USB modules */
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#define ENAB_ENAB (1<<30) /* Enable USB modules*/
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#define ENAB_SUSPEND (1<<29) /* Suspend USB modules */
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#define ENAB_ENDIAN (1<<28) /* Endian of USB modules */
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#define ENAB_PWRMD (1<<0) /* Power mode of USB modules */
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/* USB Descriptor Ram Address Register bit fields */
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#define DADR_CFG (1<<31) /* Configuration */
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#define DADR_BSY (1<<30) /* Busy status */
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#define DADR_DADR (0x1FF) /* Descriptor Ram Address */
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/* USB Descriptor RAM/Endpoint Buffer Data Register bit fields */
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#define DDAT_DDAT (0xFF) /* Descriptor Endpoint Buffer */
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/* USB Endpoint Status Register bit fields */
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#define EPSTAT_BCOUNT (0x7F<<16) /* Endpoint FIFO byte count */
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#define EPSTAT_SIP (1<<8) /* Endpoint setup in progress */
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#define EPSTAT_DIR (1<<7) /* Endpoint transfer direction */
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#define EPSTAT_MAX (3<<5) /* Endpoint Max packet size */
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#define EPSTAT_TYP (3<<3) /* Endpoint type */
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#define EPSTAT_ZLPS (1<<2) /* Send zero length packet */
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#define EPSTAT_FLUSH (1<<1) /* Endpoint FIFO Flush */
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#define EPSTAT_STALL (1<<0) /* Force stall */
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/* USB Endpoint FIFO Status Register bit fields */
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#define FSTAT_FRAME_STAT (0xF<<24) /* Frame status bit [0-3] */
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#define FSTAT_ERR (1<<22) /* FIFO error */
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#define FSTAT_UF (1<<21) /* FIFO underflow */
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#define FSTAT_OF (1<<20) /* FIFO overflow */
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#define FSTAT_FR (1<<19) /* FIFO frame ready */
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#define FSTAT_FULL (1<<18) /* FIFO full */
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#define FSTAT_ALRM (1<<17) /* FIFO alarm */
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#define FSTAT_EMPTY (1<<16) /* FIFO empty */
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/* USB Endpoint FIFO Control Register bit fields */
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#define FCTRL_WFR (1<<29) /* Write frame end */
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/* USB Endpoint Interrupt Status Regsiter bit fields */
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#define EPINTR_FIFO_FULL (1<<8) /* fifo full */
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#define EPINTR_FIFO_EMPTY (1<<7) /* fifo empty */
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#define EPINTR_FIFO_ERROR (1<<6) /* fifo error */
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#define EPINTR_FIFO_HIGH (1<<5) /* fifo high */
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#define EPINTR_FIFO_LOW (1<<4) /* fifo low */
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#define EPINTR_MDEVREQ (1<<3) /* multi Device request */
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#define EPINTR_EOT (1<<2) /* fifo end of transfer */
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#define EPINTR_DEVREQ (1<<1) /* Device request */
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#define EPINTR_EOF (1<<0) /* fifo end of frame */
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/* Debug macros */
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#ifdef DEBUG
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/* #define DEBUG_REQ */
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/* #define DEBUG_TRX */
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/* #define DEBUG_INIT */
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/* #define DEBUG_EP0 */
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/* #define DEBUG_EPX */
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/* #define DEBUG_IRQ */
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/* #define DEBUG_EPIRQ */
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/* #define DEBUG_DUMP */
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/* #define DEBUG_ERR */
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#ifdef DEBUG_REQ
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#define D_REQ(dev, args...) dev_dbg(dev, ## args)
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#else
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#define D_REQ(dev, args...) do {} while (0)
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#endif /* DEBUG_REQ */
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#ifdef DEBUG_TRX
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#define D_TRX(dev, args...) dev_dbg(dev, ## args)
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#else
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#define D_TRX(dev, args...) do {} while (0)
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#endif /* DEBUG_TRX */
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#ifdef DEBUG_INIT
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#define D_INI(dev, args...) dev_dbg(dev, ## args)
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#else
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#define D_INI(dev, args...) do {} while (0)
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#endif /* DEBUG_INIT */
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#ifdef DEBUG_EP0
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static const char *state_name[] = {
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"EP0_IDLE",
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"EP0_IN_DATA_PHASE",
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"EP0_OUT_DATA_PHASE",
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"EP0_CONFIG",
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"EP0_STALL"
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};
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#define D_EP0(dev, args...) dev_dbg(dev, ## args)
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#else
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#define D_EP0(dev, args...) do {} while (0)
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#endif /* DEBUG_EP0 */
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#ifdef DEBUG_EPX
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#define D_EPX(dev, args...) dev_dbg(dev, ## args)
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#else
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#define D_EPX(dev, args...) do {} while (0)
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#endif /* DEBUG_EP0 */
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#ifdef DEBUG_IRQ
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static void dump_intr(const char *label, int irqreg, struct device *dev)
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{
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dev_dbg(dev, "<%s> USB_INTR=[%s%s%s%s%s%s%s%s%s]\n", label,
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(irqreg & INTR_WAKEUP) ? " wake" : "",
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(irqreg & INTR_MSOF) ? " msof" : "",
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(irqreg & INTR_SOF) ? " sof" : "",
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(irqreg & INTR_RESUME) ? " resume" : "",
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(irqreg & INTR_SUSPEND) ? " suspend" : "",
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(irqreg & INTR_RESET_STOP) ? " noreset" : "",
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(irqreg & INTR_RESET_START) ? " reset" : "",
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(irqreg & INTR_FRAME_MATCH) ? " fmatch" : "",
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(irqreg & INTR_CFG_CHG) ? " config" : "");
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}
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#else
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#define dump_intr(x, y, z) do {} while (0)
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#endif /* DEBUG_IRQ */
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#ifdef DEBUG_EPIRQ
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static void dump_ep_intr(const char *label, int nr, int irqreg,
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struct device *dev)
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{
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dev_dbg(dev, "<%s> EP%d_INTR=[%s%s%s%s%s%s%s%s%s]\n", label, nr,
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(irqreg & EPINTR_FIFO_FULL) ? " full" : "",
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(irqreg & EPINTR_FIFO_EMPTY) ? " fempty" : "",
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(irqreg & EPINTR_FIFO_ERROR) ? " ferr" : "",
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(irqreg & EPINTR_FIFO_HIGH) ? " fhigh" : "",
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(irqreg & EPINTR_FIFO_LOW) ? " flow" : "",
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(irqreg & EPINTR_MDEVREQ) ? " mreq" : "",
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(irqreg & EPINTR_EOF) ? " eof" : "",
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(irqreg & EPINTR_DEVREQ) ? " devreq" : "",
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(irqreg & EPINTR_EOT) ? " eot" : "");
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}
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#else
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#define dump_ep_intr(x, y, z, i) do {} while (0)
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#endif /* DEBUG_IRQ */
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#ifdef DEBUG_DUMP
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static void dump_usb_stat(const char *label,
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struct imx_udc_struct *imx_usb)
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{
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int temp = __raw_readl(imx_usb->base + USB_STAT);
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dev_dbg(imx_usb->dev,
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"<%s> USB_STAT=[%s%s CFG=%d, INTF=%d, ALTR=%d]\n", label,
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(temp & STAT_RST) ? " reset" : "",
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(temp & STAT_SUSP) ? " suspend" : "",
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(temp & STAT_CFG) >> 5,
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(temp & STAT_INTF) >> 3,
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(temp & STAT_ALTSET));
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}
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static void dump_ep_stat(const char *label,
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struct imx_ep_struct *imx_ep)
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{
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int temp = __raw_readl(imx_ep->imx_usb->base
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+ USB_EP_INTR(EP_NO(imx_ep)));
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dev_dbg(imx_ep->imx_usb->dev,
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"<%s> EP%d_INTR=[%s%s%s%s%s%s%s%s%s]\n",
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label, EP_NO(imx_ep),
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(temp & EPINTR_FIFO_FULL) ? " full" : "",
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(temp & EPINTR_FIFO_EMPTY) ? " fempty" : "",
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(temp & EPINTR_FIFO_ERROR) ? " ferr" : "",
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(temp & EPINTR_FIFO_HIGH) ? " fhigh" : "",
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(temp & EPINTR_FIFO_LOW) ? " flow" : "",
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(temp & EPINTR_MDEVREQ) ? " mreq" : "",
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(temp & EPINTR_EOF) ? " eof" : "",
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(temp & EPINTR_DEVREQ) ? " devreq" : "",
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(temp & EPINTR_EOT) ? " eot" : "");
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temp = __raw_readl(imx_ep->imx_usb->base
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+ USB_EP_STAT(EP_NO(imx_ep)));
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dev_dbg(imx_ep->imx_usb->dev,
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"<%s> EP%d_STAT=[%s%s bcount=%d]\n",
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label, EP_NO(imx_ep),
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(temp & EPSTAT_SIP) ? " sip" : "",
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(temp & EPSTAT_STALL) ? " stall" : "",
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(temp & EPSTAT_BCOUNT) >> 16);
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temp = __raw_readl(imx_ep->imx_usb->base
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+ USB_EP_FSTAT(EP_NO(imx_ep)));
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dev_dbg(imx_ep->imx_usb->dev,
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"<%s> EP%d_FSTAT=[%s%s%s%s%s%s%s]\n",
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label, EP_NO(imx_ep),
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(temp & FSTAT_ERR) ? " ferr" : "",
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(temp & FSTAT_UF) ? " funder" : "",
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(temp & FSTAT_OF) ? " fover" : "",
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(temp & FSTAT_FR) ? " fready" : "",
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(temp & FSTAT_FULL) ? " ffull" : "",
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(temp & FSTAT_ALRM) ? " falarm" : "",
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(temp & FSTAT_EMPTY) ? " fempty" : "");
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}
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static void dump_req(const char *label, struct imx_ep_struct *imx_ep,
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struct usb_request *req)
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{
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int i;
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if (!req || !req->buf) {
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dev_dbg(imx_ep->imx_usb->dev,
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"<%s> req or req buf is free\n", label);
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return;
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}
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if ((!EP_NO(imx_ep) && imx_ep->imx_usb->ep0state
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== EP0_IN_DATA_PHASE)
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|| (EP_NO(imx_ep) && EP_DIR(imx_ep))) {
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dev_dbg(imx_ep->imx_usb->dev,
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"<%s> request dump <", label);
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for (i = 0; i < req->length; i++)
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printk("%02x-", *((u8 *)req->buf + i));
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printk(">\n");
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}
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}
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#else
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#define dump_ep_stat(x, y) do {} while (0)
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#define dump_usb_stat(x, y) do {} while (0)
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#define dump_req(x, y, z) do {} while (0)
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#endif /* DEBUG_DUMP */
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#ifdef DEBUG_ERR
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#define D_ERR(dev, args...) dev_dbg(dev, ## args)
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#else
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#define D_ERR(dev, args...) do {} while (0)
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#endif
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#else
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#define D_REQ(dev, args...) do {} while (0)
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#define D_TRX(dev, args...) do {} while (0)
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#define D_INI(dev, args...) do {} while (0)
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#define D_EP0(dev, args...) do {} while (0)
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#define D_EPX(dev, args...) do {} while (0)
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#define dump_ep_intr(x, y, z, i) do {} while (0)
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#define dump_intr(x, y, z) do {} while (0)
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#define dump_ep_stat(x, y) do {} while (0)
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#define dump_usb_stat(x, y) do {} while (0)
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#define dump_req(x, y, z) do {} while (0)
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#define D_ERR(dev, args...) do {} while (0)
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#endif /* DEBUG */
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#endif /* __LINUX_USB_GADGET_IMX_H */
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