439 lines
12 KiB
C
439 lines
12 KiB
C
/*******************************************************************************
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Intel 82599 Virtual Function driver
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Copyright(c) 1999 - 2012 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include "vf.h"
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#include "ixgbevf.h"
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/**
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* ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx
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* @hw: pointer to hardware structure
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*
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* Starts the hardware by filling the bus info structure and media type, clears
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* all on chip counters, initializes receive address registers, multicast
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* table, VLAN filter table, calls routine to set up link and flow control
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* settings, and leaves transmit and receive units disabled and uninitialized
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**/
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static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
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{
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/* Clear adapter stopped flag */
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hw->adapter_stopped = false;
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return 0;
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}
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/**
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* ixgbevf_init_hw_vf - virtual function hardware initialization
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* @hw: pointer to hardware structure
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*
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* Initialize the hardware by resetting the hardware and then starting
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* the hardware
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**/
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static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
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{
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s32 status = hw->mac.ops.start_hw(hw);
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hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
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return status;
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}
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/**
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* ixgbevf_reset_hw_vf - Performs hardware reset
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* @hw: pointer to hardware structure
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*
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* Resets the hardware by reseting the transmit and receive units, masks and
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* clears all interrupts.
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**/
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static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 timeout = IXGBE_VF_INIT_TIMEOUT;
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s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
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u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
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u8 *addr = (u8 *)(&msgbuf[1]);
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/* Call adapter stop to disable tx/rx and clear interrupts */
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hw->mac.ops.stop_adapter(hw);
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IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
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IXGBE_WRITE_FLUSH(hw);
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/* we cannot reset while the RSTI / RSTD bits are asserted */
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while (!mbx->ops.check_for_rst(hw) && timeout) {
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timeout--;
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udelay(5);
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}
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if (!timeout)
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return IXGBE_ERR_RESET_FAILED;
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/* mailbox timeout can now become active */
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mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
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msgbuf[0] = IXGBE_VF_RESET;
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mbx->ops.write_posted(hw, msgbuf, 1);
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msleep(10);
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/* set our "perm_addr" based on info provided by PF */
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/* also set up the mc_filter_type which is piggy backed
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* on the mac address in word 3 */
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ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
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if (ret_val)
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return ret_val;
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if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
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return IXGBE_ERR_INVALID_MAC_ADDR;
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memcpy(hw->mac.perm_addr, addr, ETH_ALEN);
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hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
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return 0;
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}
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/**
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* ixgbevf_stop_hw_vf - Generic stop Tx/Rx units
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* @hw: pointer to hardware structure
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*
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* Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
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* disables transmit and receive units. The adapter_stopped flag is used by
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* the shared code and drivers to determine if the adapter is in a stopped
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* state and should not touch the hardware.
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**/
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static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
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{
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u32 number_of_queues;
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u32 reg_val;
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u16 i;
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/*
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* Set the adapter_stopped flag so other driver functions stop touching
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* the hardware
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*/
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hw->adapter_stopped = true;
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/* Disable the receive unit by stopped each queue */
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number_of_queues = hw->mac.max_rx_queues;
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for (i = 0; i < number_of_queues; i++) {
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reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
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if (reg_val & IXGBE_RXDCTL_ENABLE) {
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reg_val &= ~IXGBE_RXDCTL_ENABLE;
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IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
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}
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}
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IXGBE_WRITE_FLUSH(hw);
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/* Clear interrupt mask to stop from interrupts being generated */
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IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
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/* Clear any pending interrupts */
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IXGBE_READ_REG(hw, IXGBE_VTEICR);
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/* Disable the transmit unit. Each queue must be disabled. */
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number_of_queues = hw->mac.max_tx_queues;
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for (i = 0; i < number_of_queues; i++) {
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reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
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if (reg_val & IXGBE_TXDCTL_ENABLE) {
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reg_val &= ~IXGBE_TXDCTL_ENABLE;
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IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
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}
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}
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return 0;
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}
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/**
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* ixgbevf_mta_vector - Determines bit-vector in multicast table to set
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* @hw: pointer to hardware structure
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* @mc_addr: the multicast address
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*
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* Extracts the 12 bits, from a multicast address, to determine which
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* bit-vector to set in the multicast table. The hardware uses 12 bits, from
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* incoming rx multicast addresses, to determine the bit-vector to check in
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* the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
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* by the MO field of the MCSTCTRL. The MO field is set during initialization
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* to mc_filter_type.
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**/
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static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
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{
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u32 vector = 0;
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switch (hw->mac.mc_filter_type) {
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case 0: /* use bits [47:36] of the address */
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vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
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break;
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case 1: /* use bits [46:35] of the address */
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vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
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break;
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case 2: /* use bits [45:34] of the address */
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vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
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break;
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case 3: /* use bits [43:32] of the address */
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vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
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break;
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default: /* Invalid mc_filter_type */
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break;
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}
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/* vector can only be 12-bits or boundary will be exceeded */
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vector &= 0xFFF;
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return vector;
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}
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/**
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* ixgbevf_get_mac_addr_vf - Read device MAC address
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* @hw: pointer to the HW structure
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* @mac_addr: pointer to storage for retrieved MAC address
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**/
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static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
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{
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memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
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return 0;
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}
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static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 msgbuf[3];
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u8 *msg_addr = (u8 *)(&msgbuf[1]);
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s32 ret_val;
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memset(msgbuf, 0, sizeof(msgbuf));
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/*
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* If index is one then this is the start of a new list and needs
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* indication to the PF so it can do it's own list management.
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* If it is zero then that tells the PF to just clear all of
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* this VF's macvlans and there is no new list.
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*/
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msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
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msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
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if (addr)
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memcpy(msg_addr, addr, 6);
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ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
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if (!ret_val)
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ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
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msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
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if (!ret_val)
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if (msgbuf[0] ==
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(IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
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ret_val = -ENOMEM;
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return ret_val;
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}
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/**
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* ixgbevf_set_rar_vf - set device MAC address
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* @hw: pointer to hardware structure
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* @index: Receive address register to write
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* @addr: Address to put into receive address register
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* @vmdq: Unused in this implementation
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**/
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static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
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u32 vmdq)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 msgbuf[3];
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u8 *msg_addr = (u8 *)(&msgbuf[1]);
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s32 ret_val;
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memset(msgbuf, 0, sizeof(msgbuf));
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msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
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memcpy(msg_addr, addr, 6);
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ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
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if (!ret_val)
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ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
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msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
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/* if nacked the address was rejected, use "perm_addr" */
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if (!ret_val &&
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(msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
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ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
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return ret_val;
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}
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static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
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u32 *msg, u16 size)
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{
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struct ixgbe_mbx_info *mbx = &hw->mbx;
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u32 retmsg[IXGBE_VFMAILBOX_SIZE];
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s32 retval = mbx->ops.write_posted(hw, msg, size);
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if (!retval)
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mbx->ops.read_posted(hw, retmsg, size);
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}
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/**
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* ixgbevf_update_mc_addr_list_vf - Update Multicast addresses
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* @hw: pointer to the HW structure
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* @netdev: pointer to net device structure
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*
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* Updates the Multicast Table Array.
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**/
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static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
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struct net_device *netdev)
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{
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struct netdev_hw_addr *ha;
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u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
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u16 *vector_list = (u16 *)&msgbuf[1];
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u32 cnt, i;
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/* Each entry in the list uses 1 16 bit word. We have 30
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* 16 bit words available in our HW msg buffer (minus 1 for the
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* msg type). That's 30 hash values if we pack 'em right. If
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* there are more than 30 MC addresses to add then punt the
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* extras for now and then add code to handle more than 30 later.
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* It would be unusual for a server to request that many multi-cast
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* addresses except for in large enterprise network environments.
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*/
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cnt = netdev_mc_count(netdev);
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if (cnt > 30)
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cnt = 30;
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msgbuf[0] = IXGBE_VF_SET_MULTICAST;
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msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
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i = 0;
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netdev_for_each_mc_addr(ha, netdev) {
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if (i == cnt)
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break;
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vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
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}
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ixgbevf_write_msg_read_ack(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
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return 0;
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}
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/**
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* ixgbevf_set_vfta_vf - Set/Unset vlan filter table address
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* @hw: pointer to the HW structure
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* @vlan: 12 bit VLAN ID
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* @vind: unused by VF drivers
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* @vlan_on: if true then set bit, else clear bit
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**/
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static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
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bool vlan_on)
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{
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u32 msgbuf[2];
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msgbuf[0] = IXGBE_VF_SET_VLAN;
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msgbuf[1] = vlan;
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/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
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msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
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ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
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return 0;
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}
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/**
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* ixgbevf_setup_mac_link_vf - Setup MAC link settings
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* @hw: pointer to hardware structure
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* @speed: Unused in this implementation
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* @autoneg: Unused in this implementation
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* @autoneg_wait_to_complete: Unused in this implementation
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*
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* Do nothing and return success. VF drivers are not allowed to change
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* global settings. Maintained for driver compatibility.
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**/
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static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
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ixgbe_link_speed speed, bool autoneg,
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bool autoneg_wait_to_complete)
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{
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return 0;
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}
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/**
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* ixgbevf_check_mac_link_vf - Get link/speed status
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @link_up: true is link is up, false otherwise
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* @autoneg_wait_to_complete: true when waiting for completion is needed
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*
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* Reads the links register to determine if link is up and the current speed
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**/
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static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *link_up,
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bool autoneg_wait_to_complete)
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{
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u32 links_reg;
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if (!(hw->mbx.ops.check_for_rst(hw))) {
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*link_up = false;
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*speed = 0;
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return -1;
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}
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links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
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if (links_reg & IXGBE_LINKS_UP)
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*link_up = true;
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else
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*link_up = false;
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if ((links_reg & IXGBE_LINKS_SPEED_82599) ==
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IXGBE_LINKS_SPEED_10G_82599)
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*speed = IXGBE_LINK_SPEED_10GB_FULL;
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else
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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return 0;
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}
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static const struct ixgbe_mac_operations ixgbevf_mac_ops = {
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.init_hw = ixgbevf_init_hw_vf,
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.reset_hw = ixgbevf_reset_hw_vf,
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.start_hw = ixgbevf_start_hw_vf,
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.get_mac_addr = ixgbevf_get_mac_addr_vf,
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.stop_adapter = ixgbevf_stop_hw_vf,
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.setup_link = ixgbevf_setup_mac_link_vf,
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.check_link = ixgbevf_check_mac_link_vf,
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.set_rar = ixgbevf_set_rar_vf,
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.update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
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.set_uc_addr = ixgbevf_set_uc_addr_vf,
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.set_vfta = ixgbevf_set_vfta_vf,
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};
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const struct ixgbevf_info ixgbevf_82599_vf_info = {
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.mac = ixgbe_mac_82599_vf,
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.mac_ops = &ixgbevf_mac_ops,
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};
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const struct ixgbevf_info ixgbevf_X540_vf_info = {
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.mac = ixgbe_mac_X540_vf,
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.mac_ops = &ixgbevf_mac_ops,
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};
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