692 lines
15 KiB
C
692 lines
15 KiB
C
/*
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* Device access for Dialog DA9052 PMICs.
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*
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* Copyright(c) 2011 Dialog Semiconductor Ltd.
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*
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* Author: David Dajun Chen <dchen@diasemi.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/mfd/da9052/da9052.h>
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#include <linux/mfd/da9052/pdata.h>
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#include <linux/mfd/da9052/reg.h>
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#define DA9052_NUM_IRQ_REGS 4
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#define DA9052_IRQ_MASK_POS_1 0x01
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#define DA9052_IRQ_MASK_POS_2 0x02
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#define DA9052_IRQ_MASK_POS_3 0x04
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#define DA9052_IRQ_MASK_POS_4 0x08
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#define DA9052_IRQ_MASK_POS_5 0x10
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#define DA9052_IRQ_MASK_POS_6 0x20
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#define DA9052_IRQ_MASK_POS_7 0x40
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#define DA9052_IRQ_MASK_POS_8 0x80
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static bool da9052_reg_readable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case DA9052_PAGE0_CON_REG:
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case DA9052_STATUS_A_REG:
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case DA9052_STATUS_B_REG:
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case DA9052_STATUS_C_REG:
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case DA9052_STATUS_D_REG:
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case DA9052_EVENT_A_REG:
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case DA9052_EVENT_B_REG:
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case DA9052_EVENT_C_REG:
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case DA9052_EVENT_D_REG:
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case DA9052_FAULTLOG_REG:
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case DA9052_IRQ_MASK_A_REG:
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case DA9052_IRQ_MASK_B_REG:
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case DA9052_IRQ_MASK_C_REG:
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case DA9052_IRQ_MASK_D_REG:
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case DA9052_CONTROL_A_REG:
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case DA9052_CONTROL_B_REG:
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case DA9052_CONTROL_C_REG:
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case DA9052_CONTROL_D_REG:
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case DA9052_PDDIS_REG:
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case DA9052_INTERFACE_REG:
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case DA9052_RESET_REG:
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case DA9052_GPIO_0_1_REG:
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case DA9052_GPIO_2_3_REG:
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case DA9052_GPIO_4_5_REG:
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case DA9052_GPIO_6_7_REG:
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case DA9052_GPIO_14_15_REG:
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case DA9052_ID_0_1_REG:
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case DA9052_ID_2_3_REG:
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case DA9052_ID_4_5_REG:
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case DA9052_ID_6_7_REG:
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case DA9052_ID_8_9_REG:
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case DA9052_ID_10_11_REG:
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case DA9052_ID_12_13_REG:
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case DA9052_ID_14_15_REG:
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case DA9052_ID_16_17_REG:
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case DA9052_ID_18_19_REG:
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case DA9052_ID_20_21_REG:
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case DA9052_SEQ_STATUS_REG:
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case DA9052_SEQ_A_REG:
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case DA9052_SEQ_B_REG:
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case DA9052_SEQ_TIMER_REG:
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case DA9052_BUCKA_REG:
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case DA9052_BUCKB_REG:
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case DA9052_BUCKCORE_REG:
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case DA9052_BUCKPRO_REG:
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case DA9052_BUCKMEM_REG:
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case DA9052_BUCKPERI_REG:
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case DA9052_LDO1_REG:
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case DA9052_LDO2_REG:
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case DA9052_LDO3_REG:
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case DA9052_LDO4_REG:
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case DA9052_LDO5_REG:
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case DA9052_LDO6_REG:
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case DA9052_LDO7_REG:
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case DA9052_LDO8_REG:
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case DA9052_LDO9_REG:
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case DA9052_LDO10_REG:
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case DA9052_SUPPLY_REG:
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case DA9052_PULLDOWN_REG:
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case DA9052_CHGBUCK_REG:
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case DA9052_WAITCONT_REG:
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case DA9052_ISET_REG:
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case DA9052_BATCHG_REG:
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case DA9052_CHG_CONT_REG:
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case DA9052_INPUT_CONT_REG:
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case DA9052_CHG_TIME_REG:
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case DA9052_BBAT_CONT_REG:
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case DA9052_BOOST_REG:
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case DA9052_LED_CONT_REG:
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case DA9052_LEDMIN123_REG:
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case DA9052_LED1_CONF_REG:
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case DA9052_LED2_CONF_REG:
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case DA9052_LED3_CONF_REG:
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case DA9052_LED1CONT_REG:
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case DA9052_LED2CONT_REG:
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case DA9052_LED3CONT_REG:
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case DA9052_LED_CONT_4_REG:
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case DA9052_LED_CONT_5_REG:
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case DA9052_ADC_MAN_REG:
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case DA9052_ADC_CONT_REG:
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case DA9052_ADC_RES_L_REG:
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case DA9052_ADC_RES_H_REG:
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case DA9052_VDD_RES_REG:
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case DA9052_VDD_MON_REG:
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case DA9052_ICHG_AV_REG:
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case DA9052_ICHG_THD_REG:
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case DA9052_ICHG_END_REG:
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case DA9052_TBAT_RES_REG:
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case DA9052_TBAT_HIGHP_REG:
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case DA9052_TBAT_HIGHN_REG:
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case DA9052_TBAT_LOW_REG:
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case DA9052_T_OFFSET_REG:
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case DA9052_ADCIN4_RES_REG:
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case DA9052_AUTO4_HIGH_REG:
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case DA9052_AUTO4_LOW_REG:
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case DA9052_ADCIN5_RES_REG:
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case DA9052_AUTO5_HIGH_REG:
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case DA9052_AUTO5_LOW_REG:
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case DA9052_ADCIN6_RES_REG:
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case DA9052_AUTO6_HIGH_REG:
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case DA9052_AUTO6_LOW_REG:
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case DA9052_TJUNC_RES_REG:
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case DA9052_TSI_CONT_A_REG:
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case DA9052_TSI_CONT_B_REG:
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case DA9052_TSI_X_MSB_REG:
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case DA9052_TSI_Y_MSB_REG:
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case DA9052_TSI_LSB_REG:
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case DA9052_TSI_Z_MSB_REG:
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case DA9052_COUNT_S_REG:
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case DA9052_COUNT_MI_REG:
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case DA9052_COUNT_H_REG:
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case DA9052_COUNT_D_REG:
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case DA9052_COUNT_MO_REG:
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case DA9052_COUNT_Y_REG:
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case DA9052_ALARM_MI_REG:
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case DA9052_ALARM_H_REG:
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case DA9052_ALARM_D_REG:
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case DA9052_ALARM_MO_REG:
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case DA9052_ALARM_Y_REG:
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case DA9052_SECOND_A_REG:
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case DA9052_SECOND_B_REG:
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case DA9052_SECOND_C_REG:
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case DA9052_SECOND_D_REG:
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case DA9052_PAGE1_CON_REG:
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return true;
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default:
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return false;
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}
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}
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static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case DA9052_PAGE0_CON_REG:
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case DA9052_EVENT_A_REG:
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case DA9052_EVENT_B_REG:
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case DA9052_EVENT_C_REG:
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case DA9052_EVENT_D_REG:
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case DA9052_IRQ_MASK_A_REG:
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case DA9052_IRQ_MASK_B_REG:
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case DA9052_IRQ_MASK_C_REG:
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case DA9052_IRQ_MASK_D_REG:
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case DA9052_CONTROL_A_REG:
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case DA9052_CONTROL_B_REG:
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case DA9052_CONTROL_C_REG:
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case DA9052_CONTROL_D_REG:
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case DA9052_PDDIS_REG:
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case DA9052_RESET_REG:
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case DA9052_GPIO_0_1_REG:
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case DA9052_GPIO_2_3_REG:
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case DA9052_GPIO_4_5_REG:
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case DA9052_GPIO_6_7_REG:
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case DA9052_GPIO_14_15_REG:
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case DA9052_ID_0_1_REG:
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case DA9052_ID_2_3_REG:
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case DA9052_ID_4_5_REG:
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case DA9052_ID_6_7_REG:
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case DA9052_ID_8_9_REG:
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case DA9052_ID_10_11_REG:
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case DA9052_ID_12_13_REG:
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case DA9052_ID_14_15_REG:
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case DA9052_ID_16_17_REG:
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case DA9052_ID_18_19_REG:
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case DA9052_ID_20_21_REG:
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case DA9052_SEQ_STATUS_REG:
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case DA9052_SEQ_A_REG:
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case DA9052_SEQ_B_REG:
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case DA9052_SEQ_TIMER_REG:
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case DA9052_BUCKA_REG:
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case DA9052_BUCKB_REG:
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case DA9052_BUCKCORE_REG:
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case DA9052_BUCKPRO_REG:
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case DA9052_BUCKMEM_REG:
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case DA9052_BUCKPERI_REG:
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case DA9052_LDO1_REG:
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case DA9052_LDO2_REG:
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case DA9052_LDO3_REG:
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case DA9052_LDO4_REG:
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case DA9052_LDO5_REG:
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case DA9052_LDO6_REG:
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case DA9052_LDO7_REG:
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case DA9052_LDO8_REG:
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case DA9052_LDO9_REG:
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case DA9052_LDO10_REG:
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case DA9052_SUPPLY_REG:
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case DA9052_PULLDOWN_REG:
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case DA9052_CHGBUCK_REG:
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case DA9052_WAITCONT_REG:
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case DA9052_ISET_REG:
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case DA9052_BATCHG_REG:
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case DA9052_CHG_CONT_REG:
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case DA9052_INPUT_CONT_REG:
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case DA9052_BBAT_CONT_REG:
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case DA9052_BOOST_REG:
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case DA9052_LED_CONT_REG:
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case DA9052_LEDMIN123_REG:
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case DA9052_LED1_CONF_REG:
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case DA9052_LED2_CONF_REG:
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case DA9052_LED3_CONF_REG:
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case DA9052_LED1CONT_REG:
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case DA9052_LED2CONT_REG:
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case DA9052_LED3CONT_REG:
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case DA9052_LED_CONT_4_REG:
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case DA9052_LED_CONT_5_REG:
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case DA9052_ADC_MAN_REG:
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case DA9052_ADC_CONT_REG:
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case DA9052_ADC_RES_L_REG:
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case DA9052_ADC_RES_H_REG:
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case DA9052_VDD_RES_REG:
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case DA9052_VDD_MON_REG:
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case DA9052_ICHG_THD_REG:
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case DA9052_ICHG_END_REG:
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case DA9052_TBAT_HIGHP_REG:
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case DA9052_TBAT_HIGHN_REG:
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case DA9052_TBAT_LOW_REG:
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case DA9052_T_OFFSET_REG:
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case DA9052_AUTO4_HIGH_REG:
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case DA9052_AUTO4_LOW_REG:
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case DA9052_AUTO5_HIGH_REG:
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case DA9052_AUTO5_LOW_REG:
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case DA9052_AUTO6_HIGH_REG:
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case DA9052_AUTO6_LOW_REG:
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case DA9052_TSI_CONT_A_REG:
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case DA9052_TSI_CONT_B_REG:
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case DA9052_COUNT_S_REG:
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case DA9052_COUNT_MI_REG:
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case DA9052_COUNT_H_REG:
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case DA9052_COUNT_D_REG:
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case DA9052_COUNT_MO_REG:
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case DA9052_COUNT_Y_REG:
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case DA9052_ALARM_MI_REG:
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case DA9052_ALARM_H_REG:
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case DA9052_ALARM_D_REG:
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case DA9052_ALARM_MO_REG:
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case DA9052_ALARM_Y_REG:
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case DA9052_PAGE1_CON_REG:
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return true;
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default:
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return false;
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}
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}
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static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case DA9052_STATUS_A_REG:
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case DA9052_STATUS_B_REG:
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case DA9052_STATUS_C_REG:
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case DA9052_STATUS_D_REG:
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case DA9052_EVENT_A_REG:
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case DA9052_EVENT_B_REG:
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case DA9052_EVENT_C_REG:
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case DA9052_EVENT_D_REG:
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case DA9052_FAULTLOG_REG:
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case DA9052_CHG_TIME_REG:
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case DA9052_ADC_RES_L_REG:
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case DA9052_ADC_RES_H_REG:
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case DA9052_VDD_RES_REG:
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case DA9052_ICHG_AV_REG:
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case DA9052_TBAT_RES_REG:
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case DA9052_ADCIN4_RES_REG:
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case DA9052_ADCIN5_RES_REG:
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case DA9052_ADCIN6_RES_REG:
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case DA9052_TJUNC_RES_REG:
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case DA9052_TSI_X_MSB_REG:
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case DA9052_TSI_Y_MSB_REG:
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case DA9052_TSI_LSB_REG:
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case DA9052_TSI_Z_MSB_REG:
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case DA9052_COUNT_S_REG:
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case DA9052_COUNT_MI_REG:
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case DA9052_COUNT_H_REG:
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case DA9052_COUNT_D_REG:
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case DA9052_COUNT_MO_REG:
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case DA9052_COUNT_Y_REG:
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case DA9052_ALARM_MI_REG:
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return true;
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default:
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return false;
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}
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}
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static struct resource da9052_rtc_resource = {
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.name = "ALM",
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.start = DA9052_IRQ_ALARM,
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.end = DA9052_IRQ_ALARM,
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.flags = IORESOURCE_IRQ,
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};
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static struct resource da9052_onkey_resource = {
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.name = "ONKEY",
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.start = DA9052_IRQ_NONKEY,
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.end = DA9052_IRQ_NONKEY,
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.flags = IORESOURCE_IRQ,
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};
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static struct resource da9052_bat_resources[] = {
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{
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.name = "BATT TEMP",
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.start = DA9052_IRQ_TBAT,
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.end = DA9052_IRQ_TBAT,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "DCIN DET",
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.start = DA9052_IRQ_DCIN,
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.end = DA9052_IRQ_DCIN,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "DCIN REM",
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.start = DA9052_IRQ_DCINREM,
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.end = DA9052_IRQ_DCINREM,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "VBUS DET",
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.start = DA9052_IRQ_VBUS,
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.end = DA9052_IRQ_VBUS,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "VBUS REM",
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.start = DA9052_IRQ_VBUSREM,
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.end = DA9052_IRQ_VBUSREM,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "CHG END",
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.start = DA9052_IRQ_CHGEND,
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.end = DA9052_IRQ_CHGEND,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource da9052_tsi_resources[] = {
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{
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.name = "PENDWN",
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.start = DA9052_IRQ_PENDOWN,
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.end = DA9052_IRQ_PENDOWN,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "TSIRDY",
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.start = DA9052_IRQ_TSIREADY,
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.end = DA9052_IRQ_TSIREADY,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mfd_cell __devinitdata da9052_subdev_info[] = {
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{
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.name = "da9052-regulator",
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.id = 1,
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},
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{
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.name = "da9052-regulator",
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.id = 2,
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},
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{
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.name = "da9052-regulator",
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.id = 3,
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},
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{
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.name = "da9052-regulator",
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.id = 4,
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},
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{
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.name = "da9052-regulator",
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.id = 5,
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},
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{
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.name = "da9052-regulator",
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.id = 6,
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},
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{
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.name = "da9052-regulator",
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.id = 7,
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},
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{
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.name = "da9052-regulator",
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.id = 8,
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},
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{
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.name = "da9052-regulator",
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.id = 9,
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},
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{
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.name = "da9052-regulator",
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.id = 10,
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},
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{
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.name = "da9052-regulator",
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.id = 11,
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},
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{
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.name = "da9052-regulator",
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.id = 12,
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},
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{
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.name = "da9052-regulator",
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.id = 13,
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},
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{
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.name = "da9052-regulator",
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.id = 14,
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},
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{
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.name = "da9052-onkey",
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.resources = &da9052_onkey_resource,
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.num_resources = 1,
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},
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{
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.name = "da9052-rtc",
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.resources = &da9052_rtc_resource,
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.num_resources = 1,
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},
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{
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.name = "da9052-gpio",
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},
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{
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.name = "da9052-hwmon",
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},
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{
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.name = "da9052-leds",
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},
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{
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.name = "da9052-wled1",
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},
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{
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.name = "da9052-wled2",
|
|
},
|
|
{
|
|
.name = "da9052-wled3",
|
|
},
|
|
{
|
|
.name = "da9052-tsi",
|
|
.resources = da9052_tsi_resources,
|
|
.num_resources = ARRAY_SIZE(da9052_tsi_resources),
|
|
},
|
|
{
|
|
.name = "da9052-bat",
|
|
.resources = da9052_bat_resources,
|
|
.num_resources = ARRAY_SIZE(da9052_bat_resources),
|
|
},
|
|
{
|
|
.name = "da9052-watchdog",
|
|
},
|
|
};
|
|
|
|
static struct regmap_irq da9052_irqs[] = {
|
|
[DA9052_IRQ_DCIN] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_1,
|
|
},
|
|
[DA9052_IRQ_VBUS] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_2,
|
|
},
|
|
[DA9052_IRQ_DCINREM] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_3,
|
|
},
|
|
[DA9052_IRQ_VBUSREM] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_4,
|
|
},
|
|
[DA9052_IRQ_VDDLOW] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_5,
|
|
},
|
|
[DA9052_IRQ_ALARM] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_6,
|
|
},
|
|
[DA9052_IRQ_SEQRDY] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_7,
|
|
},
|
|
[DA9052_IRQ_COMP1V2] = {
|
|
.reg_offset = 0,
|
|
.mask = DA9052_IRQ_MASK_POS_8,
|
|
},
|
|
[DA9052_IRQ_NONKEY] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_1,
|
|
},
|
|
[DA9052_IRQ_IDFLOAT] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_2,
|
|
},
|
|
[DA9052_IRQ_IDGND] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_3,
|
|
},
|
|
[DA9052_IRQ_CHGEND] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_4,
|
|
},
|
|
[DA9052_IRQ_TBAT] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_5,
|
|
},
|
|
[DA9052_IRQ_ADC_EOM] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_6,
|
|
},
|
|
[DA9052_IRQ_PENDOWN] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_7,
|
|
},
|
|
[DA9052_IRQ_TSIREADY] = {
|
|
.reg_offset = 1,
|
|
.mask = DA9052_IRQ_MASK_POS_8,
|
|
},
|
|
[DA9052_IRQ_GPI0] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_1,
|
|
},
|
|
[DA9052_IRQ_GPI1] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_2,
|
|
},
|
|
[DA9052_IRQ_GPI2] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_3,
|
|
},
|
|
[DA9052_IRQ_GPI3] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_4,
|
|
},
|
|
[DA9052_IRQ_GPI4] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_5,
|
|
},
|
|
[DA9052_IRQ_GPI5] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_6,
|
|
},
|
|
[DA9052_IRQ_GPI6] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_7,
|
|
},
|
|
[DA9052_IRQ_GPI7] = {
|
|
.reg_offset = 2,
|
|
.mask = DA9052_IRQ_MASK_POS_8,
|
|
},
|
|
[DA9052_IRQ_GPI8] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_1,
|
|
},
|
|
[DA9052_IRQ_GPI9] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_2,
|
|
},
|
|
[DA9052_IRQ_GPI10] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_3,
|
|
},
|
|
[DA9052_IRQ_GPI11] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_4,
|
|
},
|
|
[DA9052_IRQ_GPI12] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_5,
|
|
},
|
|
[DA9052_IRQ_GPI13] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_6,
|
|
},
|
|
[DA9052_IRQ_GPI14] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_7,
|
|
},
|
|
[DA9052_IRQ_GPI15] = {
|
|
.reg_offset = 3,
|
|
.mask = DA9052_IRQ_MASK_POS_8,
|
|
},
|
|
};
|
|
|
|
static struct regmap_irq_chip da9052_regmap_irq_chip = {
|
|
.name = "da9052_irq",
|
|
.status_base = DA9052_EVENT_A_REG,
|
|
.mask_base = DA9052_IRQ_MASK_A_REG,
|
|
.ack_base = DA9052_EVENT_A_REG,
|
|
.num_regs = DA9052_NUM_IRQ_REGS,
|
|
.irqs = da9052_irqs,
|
|
.num_irqs = ARRAY_SIZE(da9052_irqs),
|
|
};
|
|
|
|
struct regmap_config da9052_regmap_config = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
.max_register = DA9052_PAGE1_CON_REG,
|
|
.readable_reg = da9052_reg_readable,
|
|
.writeable_reg = da9052_reg_writeable,
|
|
.volatile_reg = da9052_reg_volatile,
|
|
};
|
|
EXPORT_SYMBOL_GPL(da9052_regmap_config);
|
|
|
|
int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id)
|
|
{
|
|
struct da9052_pdata *pdata = da9052->dev->platform_data;
|
|
struct irq_desc *desc;
|
|
int ret;
|
|
|
|
if (pdata && pdata->init != NULL)
|
|
pdata->init(da9052);
|
|
|
|
da9052->chip_id = chip_id;
|
|
|
|
if (!pdata || !pdata->irq_base)
|
|
da9052->irq_base = -1;
|
|
else
|
|
da9052->irq_base = pdata->irq_base;
|
|
|
|
ret = regmap_add_irq_chip(da9052->regmap, da9052->chip_irq,
|
|
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
|
|
da9052->irq_base, &da9052_regmap_irq_chip,
|
|
NULL);
|
|
if (ret < 0)
|
|
goto regmap_err;
|
|
|
|
desc = irq_to_desc(da9052->chip_irq);
|
|
da9052->irq_base = regmap_irq_chip_get_base(desc->action->dev_id);
|
|
|
|
ret = mfd_add_devices(da9052->dev, -1, da9052_subdev_info,
|
|
ARRAY_SIZE(da9052_subdev_info), NULL, 0);
|
|
if (ret)
|
|
goto err;
|
|
|
|
return 0;
|
|
|
|
err:
|
|
mfd_remove_devices(da9052->dev);
|
|
regmap_err:
|
|
return ret;
|
|
}
|
|
|
|
void da9052_device_exit(struct da9052 *da9052)
|
|
{
|
|
regmap_del_irq_chip(da9052->chip_irq,
|
|
irq_get_irq_data(da9052->irq_base)->chip_data);
|
|
mfd_remove_devices(da9052->dev);
|
|
}
|
|
|
|
MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
|
|
MODULE_DESCRIPTION("DA9052 MFD Core");
|
|
MODULE_LICENSE("GPL");
|