208 lines
6.4 KiB
C
208 lines
6.4 KiB
C
/*
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* Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
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* Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
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* Copyright (c) 2002, 2003 Tuukka Toivonen
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* Copyright (c) 2008 Erik Andrén
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* Copyright (c) 2008 Chia-I Wu
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* P/N 861037: Sensor HDCS1000 ASIC STV0600
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* P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
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* P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
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* P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
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* P/N 861075-0040: Sensor HDCS1000 ASIC
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* P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
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* P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
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*/
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#ifndef STV06XX_HDCS_H_
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#define STV06XX_HDCS_H_
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#include "stv06xx_sensor.h"
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#define HDCS_REG_CONFIG(sd) (IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)
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#define HDCS_REG_CONTROL(sd) (IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)
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#define HDCS_1X00_DEF_WIDTH 360
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#define HDCS_1X00_DEF_HEIGHT 296
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#define HDCS_1020_DEF_WIDTH 352
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#define HDCS_1020_DEF_HEIGHT 292
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#define HDCS_1020_BOTTOM_Y_SKIP 4
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#define HDCS_CLK_FREQ_MHZ 25
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#define HDCS_ADC_START_SIG_DUR 3
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/* LSB bit of I2C or register address signifies write (0) or read (1) */
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/* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */
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/* Identifications Register */
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#define HDCS_IDENT (0x00 << 1)
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/* Status Register */
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#define HDCS_STATUS (0x01 << 1)
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/* Interrupt Mask Register */
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#define HDCS_IMASK (0x02 << 1)
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/* Pad Control Register */
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#define HDCS_PCTRL (0x03 << 1)
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/* Pad Drive Control Register */
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#define HDCS_PDRV (0x04 << 1)
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/* Interface Control Register */
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#define HDCS_ICTRL (0x05 << 1)
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/* Interface Timing Register */
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#define HDCS_ITMG (0x06 << 1)
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/* Baud Fraction Register */
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#define HDCS_BFRAC (0x07 << 1)
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/* Baud Rate Register */
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#define HDCS_BRATE (0x08 << 1)
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/* ADC Control Register */
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#define HDCS_ADCCTRL (0x09 << 1)
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/* First Window Row Register */
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#define HDCS_FWROW (0x0a << 1)
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/* First Window Column Register */
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#define HDCS_FWCOL (0x0b << 1)
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/* Last Window Row Register */
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#define HDCS_LWROW (0x0c << 1)
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/* Last Window Column Register */
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#define HDCS_LWCOL (0x0d << 1)
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/* Timing Control Register */
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#define HDCS_TCTRL (0x0e << 1)
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/* PGA Gain Register: Even Row, Even Column */
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#define HDCS_ERECPGA (0x0f << 1)
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/* PGA Gain Register: Even Row, Odd Column */
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#define HDCS_EROCPGA (0x10 << 1)
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/* PGA Gain Register: Odd Row, Even Column */
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#define HDCS_ORECPGA (0x11 << 1)
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/* PGA Gain Register: Odd Row, Odd Column */
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#define HDCS_OROCPGA (0x12 << 1)
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/* Row Exposure Low Register */
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#define HDCS_ROWEXPL (0x13 << 1)
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/* Row Exposure High Register */
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#define HDCS_ROWEXPH (0x14 << 1)
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/* I2C Registers only for HDCS-1000/1100 */
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/* Sub-Row Exposure Low Register */
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#define HDCS00_SROWEXPL (0x15 << 1)
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/* Sub-Row Exposure High Register */
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#define HDCS00_SROWEXPH (0x16 << 1)
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/* Configuration Register */
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#define HDCS00_CONFIG (0x17 << 1)
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/* Control Register */
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#define HDCS00_CONTROL (0x18 << 1)
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/* I2C Registers only for HDCS-1020 */
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/* Sub-Row Exposure Register */
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#define HDCS20_SROWEXP (0x15 << 1)
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/* Error Control Register */
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#define HDCS20_ERROR (0x16 << 1)
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/* Interface Timing 2 Register */
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#define HDCS20_ITMG2 (0x17 << 1)
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/* Interface Control 2 Register */
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#define HDCS20_ICTRL2 (0x18 << 1)
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/* Horizontal Blank Register */
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#define HDCS20_HBLANK (0x19 << 1)
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/* Vertical Blank Register */
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#define HDCS20_VBLANK (0x1a << 1)
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/* Configuration Register */
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#define HDCS20_CONFIG (0x1b << 1)
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/* Control Register */
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#define HDCS20_CONTROL (0x1c << 1)
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#define HDCS_RUN_ENABLE (1 << 2)
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#define HDCS_SLEEP_MODE (1 << 1)
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#define HDCS_DEFAULT_EXPOSURE 48
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#define HDCS_DEFAULT_GAIN 50
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static int hdcs_probe_1x00(struct sd *sd);
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static int hdcs_probe_1020(struct sd *sd);
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static int hdcs_start(struct sd *sd);
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static int hdcs_init(struct sd *sd);
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static int hdcs_stop(struct sd *sd);
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static int hdcs_dump(struct sd *sd);
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static void hdcs_disconnect(struct sd *sd);
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static int hdcs_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);
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static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);
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static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);
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static int hdcs_get_gain(struct gspca_dev *gspca_dev, __s32 *val);
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const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {
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.name = "HP HDCS-1000/1100",
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.i2c_flush = 0,
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.i2c_addr = (0x55 << 1),
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.i2c_len = 1,
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/* FIXME (see if we can lower min_packet_size, needs testing, and also
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adjusting framerate when the bandwidth gets lower) */
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.min_packet_size = { 847 },
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.max_packet_size = { 847 },
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.init = hdcs_init,
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.probe = hdcs_probe_1x00,
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.start = hdcs_start,
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.stop = hdcs_stop,
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.disconnect = hdcs_disconnect,
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.dump = hdcs_dump,
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};
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const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {
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.name = "HDCS-1020",
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.i2c_flush = 0,
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.i2c_addr = (0x55 << 1),
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.i2c_len = 1,
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/* FIXME (see if we can lower min_packet_size, needs testing, and also
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adjusting framerate when the bandwidthm gets lower) */
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.min_packet_size = { 847 },
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.max_packet_size = { 847 },
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.init = hdcs_init,
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.probe = hdcs_probe_1020,
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.start = hdcs_start,
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.stop = hdcs_stop,
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.dump = hdcs_dump,
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};
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static const u16 stv_bridge_init[][2] = {
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{STV_ISO_ENABLE, 0},
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{STV_REG23, 0},
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{STV_REG00, 0x1d},
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{STV_REG01, 0xb5},
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{STV_REG02, 0xa8},
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{STV_REG03, 0x95},
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{STV_REG04, 0x07},
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{STV_SCAN_RATE, 0x20},
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{STV_Y_CTRL, 0x01},
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{STV_X_CTRL, 0x0a}
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};
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static const u8 stv_sensor_init[][2] = {
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/* Clear status (writing 1 will clear the corresponding status bit) */
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{HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},
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/* Disable all interrupts */
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{HDCS_IMASK, 0x00},
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{HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},
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{HDCS_PDRV, 0x00},
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{HDCS_ICTRL, BIT(5)},
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{HDCS_ITMG, BIT(4) | BIT(1)},
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/* ADC output resolution to 10 bits */
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{HDCS_ADCCTRL, 10}
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};
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#endif
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