336 lines
8.8 KiB
C
336 lines
8.8 KiB
C
/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <mach/gpiomux.h>
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#include <mach/msm_iomap.h>
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/* see 80-VA736-2 Rev C pp 695-751
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**
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** These are actually the *shadow* gpio registers, since the
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** real ones (which allow full access) are only available to the
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** ARM9 side of the world.
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**
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** Since the _BASE need to be page-aligned when we're mapping them
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** to virtual addresses, adjust for the additional offset in these
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** macros.
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*/
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#if defined(CONFIG_ARCH_FSM9XXX)
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#define MSM_GPIO1_REG(off) (MSM_TLMM_BASE + (off))
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#endif
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#if defined(CONFIG_ARCH_FSM9XXX)
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/* output value */
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#define MSM_GPIO_OUT_G(group) MSM_GPIO1_REG(0x00 + (group) * 4)
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#define MSM_GPIO_OUT_N(gpio) MSM_GPIO_OUT_G((gpio) / 32)
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#define MSM_GPIO_OUT_0 MSM_GPIO_OUT_G(0) /* gpio 31-0 */
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#define MSM_GPIO_OUT_1 MSM_GPIO_OUT_G(1) /* gpio 63-32 */
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#define MSM_GPIO_OUT_2 MSM_GPIO_OUT_G(2) /* gpio 95-64 */
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#define MSM_GPIO_OUT_3 MSM_GPIO_OUT_G(3) /* gpio 127-96 */
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#define MSM_GPIO_OUT_4 MSM_GPIO_OUT_G(4) /* gpio 159-128 */
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#define MSM_GPIO_OUT_5 MSM_GPIO_OUT_G(5) /* gpio 167-160 */
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/* same pin map as above, output enable */
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#define MSM_GPIO_OE_G(group) MSM_GPIO1_REG(0x20 + (group) * 4)
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#define MSM_GPIO_OE_N(gpio) MSM_GPIO_OE_G((gpio) / 32)
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#define MSM_GPIO_OE_0 MSM_GPIO_OE_G(0)
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#define MSM_GPIO_OE_1 MSM_GPIO_OE_G(1)
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#define MSM_GPIO_OE_2 MSM_GPIO_OE_G(2)
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#define MSM_GPIO_OE_3 MSM_GPIO_OE_G(3)
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#define MSM_GPIO_OE_4 MSM_GPIO_OE_G(4)
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#define MSM_GPIO_OE_5 MSM_GPIO_OE_G(5)
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/* same pin map as above, input read */
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#define MSM_GPIO_IN_G(group) MSM_GPIO1_REG(0x48 + (group) * 4)
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#define MSM_GPIO_IN_N(gpio) MSM_GPIO_IN_G((gpio) / 32)
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#define MSM_GPIO_IN_0 MSM_GPIO_IN_G(0)
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#define MSM_GPIO_IN_1 MSM_GPIO_IN_G(1)
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#define MSM_GPIO_IN_2 MSM_GPIO_IN_G(2)
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#define MSM_GPIO_IN_3 MSM_GPIO_IN_G(3)
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#define MSM_GPIO_IN_4 MSM_GPIO_IN_G(4)
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#define MSM_GPIO_IN_5 MSM_GPIO_IN_G(5)
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/* configuration */
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#define MSM_GPIO_PAGE MSM_GPIO1_REG(0x40)
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#define MSM_GPIO_CONFIG MSM_GPIO1_REG(0x44)
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#endif /* CONFIG_ARCH_FSM9XXX */
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#define MSM_GPIO_BANK(bank, first, last) \
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{ \
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.regs = { \
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.out = MSM_GPIO_OUT_##bank, \
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.in = MSM_GPIO_IN_##bank, \
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.oe = MSM_GPIO_OE_##bank, \
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}, \
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.chip = { \
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.base = (first), \
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.ngpio = (last) - (first) + 1, \
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.get = msm_gpio_get, \
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.set = msm_gpio_set, \
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.direction_input = msm_gpio_direction_input, \
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.direction_output = msm_gpio_direction_output, \
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.request = msm_gpio_request, \
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.free = msm_gpio_free, \
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} \
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}
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struct msm_gpio_regs {
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void __iomem *out;
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void __iomem *in;
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void __iomem *oe;
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};
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struct msm_gpio_chip {
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spinlock_t lock;
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struct gpio_chip chip;
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struct msm_gpio_regs regs;
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};
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static int msm_gpio_write(struct msm_gpio_chip *msm_chip,
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unsigned offset, unsigned on)
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{
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unsigned mask = BIT(offset);
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unsigned val;
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val = __raw_readl(msm_chip->regs.out);
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if (on)
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__raw_writel(val | mask, msm_chip->regs.out);
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else
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__raw_writel(val & ~mask, msm_chip->regs.out);
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return 0;
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}
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static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct msm_gpio_chip *msm_chip;
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unsigned long irq_flags;
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msm_chip = container_of(chip, struct msm_gpio_chip, chip);
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spin_lock_irqsave(&msm_chip->lock, irq_flags);
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__raw_writel(__raw_readl(msm_chip->regs.oe) & ~BIT(offset),
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msm_chip->regs.oe);
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spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
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return 0;
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}
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static int
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msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct msm_gpio_chip *msm_chip;
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unsigned long irq_flags;
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msm_chip = container_of(chip, struct msm_gpio_chip, chip);
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spin_lock_irqsave(&msm_chip->lock, irq_flags);
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msm_gpio_write(msm_chip, offset, value);
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__raw_writel(__raw_readl(msm_chip->regs.oe) | BIT(offset),
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msm_chip->regs.oe);
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spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
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return 0;
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}
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static int msm_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct msm_gpio_chip *msm_chip;
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msm_chip = container_of(chip, struct msm_gpio_chip, chip);
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return (__raw_readl(msm_chip->regs.in) & (1U << offset)) ? 1 : 0;
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}
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static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct msm_gpio_chip *msm_chip;
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unsigned long irq_flags;
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msm_chip = container_of(chip, struct msm_gpio_chip, chip);
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spin_lock_irqsave(&msm_chip->lock, irq_flags);
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msm_gpio_write(msm_chip, offset, value);
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spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
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}
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#ifdef CONFIG_MSM_GPIOMUX
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static int msm_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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return msm_gpiomux_get(chip->base + offset);
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}
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static void msm_gpio_free(struct gpio_chip *chip, unsigned offset)
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{
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msm_gpiomux_put(chip->base + offset);
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}
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#else
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#define msm_gpio_request NULL
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#define msm_gpio_free NULL
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#endif
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struct msm_gpio_chip msm_gpio_chips[] = {
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MSM_GPIO_BANK(0, 0, 31),
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MSM_GPIO_BANK(1, 32, 63),
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MSM_GPIO_BANK(2, 64, 95),
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MSM_GPIO_BANK(3, 96, 127),
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MSM_GPIO_BANK(4, 128, 159),
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MSM_GPIO_BANK(5, 160, 167),
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};
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void msm_gpio_enter_sleep(int from_idle)
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{
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return;
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}
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void msm_gpio_exit_sleep(void)
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{
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return;
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}
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static int __init msm_init_gpio(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) {
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spin_lock_init(&msm_gpio_chips[i].lock);
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gpiochip_add(&msm_gpio_chips[i].chip);
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}
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return 0;
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}
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postcore_initcall(msm_init_gpio);
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int gpio_tlmm_config(unsigned config, unsigned disable)
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{
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uint32_t flags;
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unsigned gpio = GPIO_PIN(config);
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if (gpio > NR_MSM_GPIOS)
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return -EINVAL;
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flags = ((GPIO_DRVSTR(config) << 6) & (0x7 << 6)) |
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((GPIO_FUNC(config) << 2) & (0xf << 2)) |
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((GPIO_PULL(config) & 0x3));
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dsb();
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__raw_writel(gpio, MSM_GPIO_PAGE);
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dsb();
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__raw_writel(flags, MSM_GPIO_CONFIG);
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return 0;
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}
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EXPORT_SYMBOL(gpio_tlmm_config);
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int msm_gpios_request_enable(const struct msm_gpio *table, int size)
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{
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int rc = msm_gpios_request(table, size);
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if (rc)
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return rc;
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rc = msm_gpios_enable(table, size);
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if (rc)
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msm_gpios_free(table, size);
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return rc;
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}
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EXPORT_SYMBOL(msm_gpios_request_enable);
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void msm_gpios_disable_free(const struct msm_gpio *table, int size)
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{
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msm_gpios_disable(table, size);
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msm_gpios_free(table, size);
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}
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EXPORT_SYMBOL(msm_gpios_disable_free);
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int msm_gpios_request(const struct msm_gpio *table, int size)
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{
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int rc;
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int i;
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const struct msm_gpio *g;
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for (i = 0; i < size; i++) {
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g = table + i;
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rc = gpio_request(GPIO_PIN(g->gpio_cfg), g->label);
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if (rc) {
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pr_err("gpio_request(%d) <%s> failed: %d\n",
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GPIO_PIN(g->gpio_cfg), g->label ?: "?", rc);
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goto err;
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}
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}
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return 0;
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err:
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msm_gpios_free(table, i);
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return rc;
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}
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EXPORT_SYMBOL(msm_gpios_request);
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void msm_gpios_free(const struct msm_gpio *table, int size)
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{
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int i;
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const struct msm_gpio *g;
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for (i = size-1; i >= 0; i--) {
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g = table + i;
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gpio_free(GPIO_PIN(g->gpio_cfg));
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}
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}
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EXPORT_SYMBOL(msm_gpios_free);
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int msm_gpios_enable(const struct msm_gpio *table, int size)
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{
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int rc;
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int i;
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const struct msm_gpio *g;
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for (i = 0; i < size; i++) {
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g = table + i;
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rc = gpio_tlmm_config(g->gpio_cfg, GPIO_CFG_ENABLE);
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if (rc) {
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pr_err("gpio_tlmm_config(0x%08x, GPIO_CFG_ENABLE)"
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" <%s> failed: %d\n",
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g->gpio_cfg, g->label ?: "?", rc);
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pr_err("pin %d func %d dir %d pull %d drvstr %d\n",
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GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
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GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
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GPIO_DRVSTR(g->gpio_cfg));
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goto err;
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}
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}
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return 0;
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err:
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msm_gpios_disable(table, i);
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return rc;
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}
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EXPORT_SYMBOL(msm_gpios_enable);
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int msm_gpios_disable(const struct msm_gpio *table, int size)
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{
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int rc = 0;
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int i;
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const struct msm_gpio *g;
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for (i = size-1; i >= 0; i--) {
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int tmp;
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g = table + i;
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tmp = gpio_tlmm_config(g->gpio_cfg, GPIO_CFG_DISABLE);
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if (tmp) {
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pr_err("gpio_tlmm_config(0x%08x, GPIO_CFG_DISABLE)"
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" <%s> failed: %d\n",
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g->gpio_cfg, g->label ?: "?", rc);
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pr_err("pin %d func %d dir %d pull %d drvstr %d\n",
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GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
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GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
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GPIO_DRVSTR(g->gpio_cfg));
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if (!rc)
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rc = tmp;
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}
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}
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return rc;
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}
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EXPORT_SYMBOL(msm_gpios_disable);
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