220 lines
5.7 KiB
Plaintext
220 lines
5.7 KiB
Plaintext
/*
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* P1023 RDS Device Tree Source
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*
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* Copyright 2010-2011 Freescale Semiconductor Inc.
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*
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* Author: Roy Zang <tie-fei.zang@freescale.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/include/ "fsl/p1023si-pre.dtsi"
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/ {
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model = "fsl,P1023";
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compatible = "fsl,P1023RDS";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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memory {
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device_type = "memory";
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};
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soc: soc@ff600000 {
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ranges = <0x0 0x0 0xff600000 0x200000>;
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i2c@3000 {
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rtc@68 {
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compatible = "dallas,ds1374";
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reg = <0x68>;
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};
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};
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spi@7000 {
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fsl_dataflash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at45db081d";
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reg = <0>;
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spi-max-frequency = <40000000>; /* input clock */
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partition@u-boot {
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/* 512KB for u-boot Bootloader Image */
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label = "u-boot-spi";
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reg = <0x00000000 0x00080000>;
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read-only;
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};
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partition@dtb {
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/* 512KB for DTB Image */
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label = "dtb-spi";
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reg = <0x00080000 0x00080000>;
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read-only;
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};
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};
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};
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usb@22000 {
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dr_mode = "host";
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phy_type = "ulpi";
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};
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};
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lbc: localbus@ff605000 {
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reg = <0 0xff605000 0 0x1000>;
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/* NOR Flash, BCSR */
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ranges = <0x0 0x0 0x0 0xee000000 0x02000000
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0x1 0x0 0x0 0xe0000000 0x00008000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x02000000>;
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bank-width = <2>;
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device-width = <1>;
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partition@0 {
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label = "ramdisk";
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reg = <0x00000000 0x01c00000>;
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};
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partition@1c00000 {
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label = "kernel";
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reg = <0x01c00000 0x002e0000>;
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};
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partiton@1ee0000 {
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label = "dtb";
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reg = <0x01ee0000 0x00020000>;
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};
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partition@1f00000 {
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label = "firmware";
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reg = <0x01f00000 0x00080000>;
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read-only;
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};
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partition@1f80000 {
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label = "u-boot";
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reg = <0x01f80000 0x00080000>;
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read-only;
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};
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};
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fpga@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,p1023rds-fpga";
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reg = <1 0 0x8000>;
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ranges = <0 1 0 0x8000>;
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bcsr@20 {
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compatible = "fsl,p1023rds-bcsr";
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reg = <0x20 0x20>;
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};
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};
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};
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pci0: pcie@ff60a000 {
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reg = <0 0xff60a000 0 0x1000>;
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ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
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pcie@0 {
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/* IRQ[0:3] are pulled up on board, set to active-low */
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 0 1 0 0
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0000 0 0 2 &mpic 1 1 0 0
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0000 0 0 3 &mpic 2 1 0 0
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0000 0 0 4 &mpic 3 1 0 0
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>;
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ranges = <0x2000000 0x0 0xc0000000
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0x2000000 0x0 0xc0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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board_pci1: pci1: pcie@ff609000 {
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reg = <0 0xff609000 0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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pcie@0 {
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/*
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* IRQ[4:6] only for PCIe, set to active-high,
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* IRQ[7] is pulled up on board, set to active-low
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*/
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 4 2 0 0
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0000 0 0 2 &mpic 5 2 0 0
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0000 0 0 3 &mpic 6 2 0 0
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0000 0 0 4 &mpic 7 1 0 0
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>;
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci2: pcie@ff60b000 {
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reg = <0 0xff60b000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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pcie@0 {
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/*
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* IRQ[8:10] are pulled up on board, set to active-low
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* IRQ[11] only for PCIe, set to active-high,
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*/
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 8 1 0 0
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0000 0 0 2 &mpic 9 1 0 0
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0000 0 0 3 &mpic 10 1 0 0
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0000 0 0 4 &mpic 11 2 0 0
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>;
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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};
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/include/ "fsl/p1023si-post.dtsi"
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