154 lines
2.9 KiB
C
154 lines
2.9 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
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* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/io.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/list.h>
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#include <asm/time.h>
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#include <asm/irq.h>
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#include <asm/div64.h>
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#include <lantiq_soc.h>
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#include "clk.h"
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struct clk {
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const char *name;
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unsigned long rate;
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unsigned long (*get_rate) (void);
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};
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static struct clk *cpu_clk;
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static int cpu_clk_cnt;
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/* lantiq socs have 3 static clocks */
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static struct clk cpu_clk_generic[] = {
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{
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.name = "cpu",
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.get_rate = ltq_get_cpu_hz,
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}, {
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.name = "fpi",
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.get_rate = ltq_get_fpi_hz,
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}, {
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.name = "io",
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.get_rate = ltq_get_io_region_clock,
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},
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};
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static struct resource ltq_cgu_resource = {
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.name = "cgu",
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.start = LTQ_CGU_BASE_ADDR,
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.end = LTQ_CGU_BASE_ADDR + LTQ_CGU_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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/* remapped clock register range */
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void __iomem *ltq_cgu_membase;
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void clk_init(void)
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{
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cpu_clk = cpu_clk_generic;
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cpu_clk_cnt = ARRAY_SIZE(cpu_clk_generic);
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}
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static inline int clk_good(struct clk *clk)
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{
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return clk && !IS_ERR(clk);
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}
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unsigned long clk_get_rate(struct clk *clk)
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{
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if (unlikely(!clk_good(clk)))
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return 0;
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if (clk->rate != 0)
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return clk->rate;
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if (clk->get_rate != NULL)
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return clk->get_rate();
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return 0;
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}
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EXPORT_SYMBOL(clk_get_rate);
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struct clk *clk_get(struct device *dev, const char *id)
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{
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int i;
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for (i = 0; i < cpu_clk_cnt; i++)
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if (!strcmp(id, cpu_clk[i].name))
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return &cpu_clk[i];
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BUG();
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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/* not used */
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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/* not used */
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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/* not used */
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}
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EXPORT_SYMBOL(clk_disable);
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static inline u32 ltq_get_counter_resolution(void)
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{
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u32 res;
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__asm__ __volatile__(
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".set push\n"
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".set mips32r2\n"
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"rdhwr %0, $3\n"
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".set pop\n"
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: "=&r" (res)
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: /* no input */
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: "memory");
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return res;
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}
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void __init plat_time_init(void)
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{
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struct clk *clk;
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if (insert_resource(&iomem_resource, <q_cgu_resource) < 0)
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panic("Failed to insert cgu memory");
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if (request_mem_region(ltq_cgu_resource.start,
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resource_size(<q_cgu_resource), "cgu") < 0)
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panic("Failed to request cgu memory");
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ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start,
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resource_size(<q_cgu_resource));
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if (!ltq_cgu_membase) {
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pr_err("Failed to remap cgu memory\n");
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unreachable();
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}
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clk = clk_get(0, "cpu");
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mips_hpt_frequency = clk_get_rate(clk) / ltq_get_counter_resolution();
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write_c0_compare(read_c0_count());
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clk_put(clk);
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}
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