282 lines
6.0 KiB
C
282 lines
6.0 KiB
C
/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) "scm-pas: " fmt
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <mach/scm.h>
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#include <mach/socinfo.h>
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#include <mach/msm_bus.h>
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#include <mach/msm_bus_board.h>
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#include "scm-pas.h"
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#define PAS_INIT_IMAGE_CMD 1
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#define PAS_MEM_SETUP_CMD 2
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#define PAS_AUTH_AND_RESET_CMD 5
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#define PAS_SHUTDOWN_CMD 6
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#define PAS_IS_SUPPORTED_CMD 7
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enum scm_clock_ids {
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BUS_CLK = 0,
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CORE_CLK,
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IFACE_CLK,
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CORE_CLK_SRC,
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NUM_CLKS
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};
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static const char * const scm_clock_names[NUM_CLKS] = {
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[BUS_CLK] = "bus_clk",
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[CORE_CLK] = "core_clk",
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[IFACE_CLK] = "iface_clk",
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[CORE_CLK_SRC] = "core_clk_src",
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};
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static struct clk *scm_clocks[NUM_CLKS];
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static struct msm_bus_paths scm_pas_bw_tbl[] = {
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{
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.vectors = (struct msm_bus_vectors[]){
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{
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.src = MSM_BUS_MASTER_SPS,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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},
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},
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.num_paths = 1,
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},
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{
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.vectors = (struct msm_bus_vectors[]){
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{
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.src = MSM_BUS_MASTER_SPS,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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.ib = 492 * 8 * 1000000UL,
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.ab = 492 * 8 * 100000UL,
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},
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},
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.num_paths = 1,
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},
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};
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static struct msm_bus_scale_pdata scm_pas_bus_pdata = {
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.usecase = scm_pas_bw_tbl,
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.num_usecases = ARRAY_SIZE(scm_pas_bw_tbl),
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.name = "scm_pas",
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};
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static uint32_t scm_perf_client;
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static DEFINE_MUTEX(scm_pas_bw_mutex);
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static int scm_pas_bw_count;
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static int scm_pas_enable_bw(void)
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{
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int ret = 0, i;
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if (!scm_perf_client)
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return -EINVAL;
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mutex_lock(&scm_pas_bw_mutex);
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if (!scm_pas_bw_count) {
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ret = msm_bus_scale_client_update_request(scm_perf_client, 1);
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if (ret)
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goto err_bus;
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scm_pas_bw_count++;
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}
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for (i = 0; i < NUM_CLKS; i++)
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if (clk_prepare_enable(scm_clocks[i]))
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goto err_clk;
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mutex_unlock(&scm_pas_bw_mutex);
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return ret;
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err_clk:
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pr_err("clk prepare_enable failed (%s)\n", scm_clock_names[i]);
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for (i--; i >= 0; i--)
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clk_disable_unprepare(scm_clocks[i]);
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err_bus:
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pr_err("bandwidth request failed (%d)\n", ret);
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msm_bus_scale_client_update_request(scm_perf_client, 0);
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mutex_unlock(&scm_pas_bw_mutex);
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return ret;
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}
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static void scm_pas_disable_bw(void)
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{
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int i;
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mutex_lock(&scm_pas_bw_mutex);
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if (scm_pas_bw_count-- == 1) {
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msm_bus_scale_client_update_request(scm_perf_client, 0);
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}
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for (i = NUM_CLKS - 1; i >= 0; i--)
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clk_disable_unprepare(scm_clocks[i]);
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mutex_unlock(&scm_pas_bw_mutex);
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}
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int pas_init_image(enum pas_id id, const u8 *metadata, size_t size)
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{
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int ret;
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struct pas_init_image_req {
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u32 proc;
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u32 image_addr;
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} request;
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u32 scm_ret = 0;
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void *mdata_buf;
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ret = scm_pas_enable_bw();
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if (ret)
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return ret;
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/* Make memory physically contiguous */
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mdata_buf = kmemdup(metadata, size, GFP_KERNEL);
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if (!mdata_buf)
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return -ENOMEM;
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request.proc = id;
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request.image_addr = virt_to_phys(mdata_buf);
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ret = scm_call(SCM_SVC_PIL, PAS_INIT_IMAGE_CMD, &request,
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sizeof(request), &scm_ret, sizeof(scm_ret));
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kfree(mdata_buf);
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scm_pas_disable_bw();
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if (ret)
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return ret;
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return scm_ret;
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}
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EXPORT_SYMBOL(pas_init_image);
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int pas_mem_setup(enum pas_id id, u32 start_addr, u32 len)
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{
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int ret;
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struct pas_init_image_req {
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u32 proc;
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u32 start_addr;
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u32 len;
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} request;
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u32 scm_ret = 0;
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request.proc = id;
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request.start_addr = start_addr;
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request.len = len;
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ret = scm_call(SCM_SVC_PIL, PAS_MEM_SETUP_CMD, &request,
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sizeof(request), &scm_ret, sizeof(scm_ret));
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if (ret)
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return ret;
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return scm_ret;
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}
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EXPORT_SYMBOL(pas_mem_setup);
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int pas_auth_and_reset(enum pas_id id)
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{
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int ret;
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u32 proc = id, scm_ret = 0;
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ret = scm_pas_enable_bw();
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if (ret)
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return ret;
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ret = scm_call(SCM_SVC_PIL, PAS_AUTH_AND_RESET_CMD, &proc,
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sizeof(proc), &scm_ret, sizeof(scm_ret));
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if (ret)
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scm_ret = ret;
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scm_pas_disable_bw();
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return scm_ret;
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}
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EXPORT_SYMBOL(pas_auth_and_reset);
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int pas_shutdown(enum pas_id id)
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{
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int ret;
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u32 proc = id, scm_ret = 0;
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ret = scm_call(SCM_SVC_PIL, PAS_SHUTDOWN_CMD, &proc, sizeof(proc),
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&scm_ret, sizeof(scm_ret));
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if (ret)
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return ret;
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return scm_ret;
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}
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EXPORT_SYMBOL(pas_shutdown);
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static bool secure_pil = true;
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module_param(secure_pil, bool, S_IRUGO);
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MODULE_PARM_DESC(secure_pil, "Use secure PIL");
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int pas_supported(enum pas_id id)
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{
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int ret;
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u32 periph = id, ret_val = 0;
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if (!secure_pil)
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return 0;
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/*
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* 8660 SCM doesn't support querying secure PIL support so just return
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* true if not overridden on the command line.
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*/
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if (cpu_is_msm8x60())
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return 1;
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if (scm_is_call_available(SCM_SVC_PIL, PAS_IS_SUPPORTED_CMD) <= 0)
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return 0;
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ret = scm_call(SCM_SVC_PIL, PAS_IS_SUPPORTED_CMD, &periph,
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sizeof(periph), &ret_val, sizeof(ret_val));
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if (ret)
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return ret;
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return ret_val;
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}
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EXPORT_SYMBOL(pas_supported);
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static int __init scm_pas_init(void)
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{
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int i, rate;
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for (i = 0; i < NUM_CLKS; i++) {
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scm_clocks[i] = clk_get_sys("scm", scm_clock_names[i]);
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if (IS_ERR(scm_clocks[i]))
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scm_clocks[i] = NULL;
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}
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/* Fail silently if this clock is not supported */
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rate = clk_round_rate(scm_clocks[CORE_CLK_SRC], 1);
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clk_set_rate(scm_clocks[CORE_CLK_SRC], rate);
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if (cpu_is_msm8974() || cpu_is_msm8226() || cpu_is_msm8610()) {
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scm_pas_bw_tbl[0].vectors[0].src = MSM_BUS_MASTER_CRYPTO_CORE0;
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scm_pas_bw_tbl[1].vectors[0].src = MSM_BUS_MASTER_CRYPTO_CORE0;
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} else {
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if (!IS_ERR(scm_clocks[BUS_CLK]))
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clk_set_rate(scm_clocks[BUS_CLK], 64000000);
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else
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pr_warn("unable to get bus clock\n");
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}
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scm_perf_client = msm_bus_scale_register_client(&scm_pas_bus_pdata);
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if (!scm_perf_client)
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pr_warn("unable to register bus client\n");
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return 0;
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}
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module_init(scm_pas_init);
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