1111 lines
26 KiB
C
1111 lines
26 KiB
C
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/bootmem.h>
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#include <linux/msm_ion.h>
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#include <asm/mach-types.h>
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#include <mach/msm_memtypes.h>
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#include <mach/board.h>
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#include <mach/gpiomux.h>
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#include <mach/ion.h>
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#include <mach/msm_bus_board.h>
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#include <mach/socinfo.h>
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#include "devices.h"
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#include "board-8064.h"
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#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
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/* prim = 1366 x 768 x 3(bpp) x 3(pages) */
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#define MSM_FB_PRIM_BUF_SIZE roundup(1920 * 1088 * 4 * 3, 0x10000)
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#else
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/* prim = 1366 x 768 x 3(bpp) x 2(pages) */
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#define MSM_FB_PRIM_BUF_SIZE roundup(1920 * 1088 * 4 * 2, 0x10000)
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#endif
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#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE, 4096)
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#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
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#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
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#else
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#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
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#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
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#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
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#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
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#else
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#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
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#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
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#define AVTIMER_PHYSICAL_ADDRESS 0x28009008
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static struct resource msm_fb_resources[] = {
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{
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.flags = IORESOURCE_DMA,
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}
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};
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#define LVDS_CHIMEI_PANEL_NAME "lvds_chimei_wxga"
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#define LVDS_FRC_PANEL_NAME "lvds_frc_fhd"
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#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
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#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
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#define HDMI_PANEL_NAME "hdmi_msm"
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#define MHL_PANEL_NAME "hdmi_msm,mhl_8334"
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#define TVOUT_PANEL_NAME "tvout_msm"
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#define LVDS_PIXEL_MAP_PATTERN_1 1
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#define LVDS_PIXEL_MAP_PATTERN_2 2
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#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
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static unsigned char hdmi_is_primary = 1;
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#else
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static unsigned char hdmi_is_primary;
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#endif
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static unsigned char mhl_display_enabled;
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unsigned char apq8064_hdmi_as_primary_selected(void)
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{
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return hdmi_is_primary;
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}
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unsigned char apq8064_mhl_display_enabled(void)
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{
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return mhl_display_enabled;
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}
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static void set_mdp_clocks_for_wuxga(void);
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static int msm_fb_detect_panel(const char *name)
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{
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u32 version;
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if (machine_is_apq8064_liquid()) {
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version = socinfo_get_platform_version();
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if ((SOCINFO_VERSION_MAJOR(version) == 1) &&
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(SOCINFO_VERSION_MINOR(version) == 1)) {
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if (!strncmp(name, MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
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strnlen(MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
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PANEL_NAME_MAX_LEN)))
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return 0;
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} else {
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if (!strncmp(name, LVDS_CHIMEI_PANEL_NAME,
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strnlen(LVDS_CHIMEI_PANEL_NAME,
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PANEL_NAME_MAX_LEN)))
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return 0;
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}
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} else if (machine_is_apq8064_mtp()) {
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if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
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strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
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PANEL_NAME_MAX_LEN)))
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return 0;
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} else if (machine_is_apq8064_cdp()) {
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if (!strncmp(name, LVDS_CHIMEI_PANEL_NAME,
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strnlen(LVDS_CHIMEI_PANEL_NAME,
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PANEL_NAME_MAX_LEN)))
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return 0;
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} else if (machine_is_mpq8064_dtv()) {
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if (!strncmp(name, LVDS_FRC_PANEL_NAME,
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strnlen(LVDS_FRC_PANEL_NAME,
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PANEL_NAME_MAX_LEN))) {
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set_mdp_clocks_for_wuxga();
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return 0;
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}
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}
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if (!strncmp(name, HDMI_PANEL_NAME,
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strnlen(HDMI_PANEL_NAME,
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PANEL_NAME_MAX_LEN))) {
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if (apq8064_hdmi_as_primary_selected())
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set_mdp_clocks_for_wuxga();
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return 0;
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}
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return -ENODEV;
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}
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static struct msm_fb_platform_data msm_fb_pdata = {
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.detect_client = msm_fb_detect_panel,
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};
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static struct platform_device msm_fb_device = {
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.name = "msm_fb",
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.id = 0,
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.num_resources = ARRAY_SIZE(msm_fb_resources),
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.resource = msm_fb_resources,
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.dev.platform_data = &msm_fb_pdata,
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};
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void __init apq8064_allocate_fb_region(void)
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{
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void *addr;
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unsigned long size;
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size = MSM_FB_SIZE;
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addr = alloc_bootmem_align(size, 0x1000);
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msm_fb_resources[0].start = __pa(addr);
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msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
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pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
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size, addr, __pa(addr));
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}
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#define MDP_VSYNC_GPIO 0
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static struct msm_bus_vectors mdp_init_vectors[] = {
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{
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.src = MSM_BUS_MASTER_MDP_PORT0,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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.ab = 0,
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.ib = 0,
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},
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};
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static struct msm_bus_vectors mdp_ui_vectors[] = {
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{
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.src = MSM_BUS_MASTER_MDP_PORT0,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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.ab = 216000000 * 2,
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.ib = 270000000 * 2,
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},
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};
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static struct msm_bus_vectors mdp_vga_vectors[] = {
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/* VGA and less video */
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{
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.src = MSM_BUS_MASTER_MDP_PORT0,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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.ab = 216000000 * 2,
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.ib = 270000000 * 2,
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},
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};
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static struct msm_bus_vectors mdp_720p_vectors[] = {
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/* 720p and less video */
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{
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.src = MSM_BUS_MASTER_MDP_PORT0,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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.ab = 230400000 * 2,
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.ib = 288000000 * 2,
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},
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};
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static struct msm_bus_vectors mdp_1080p_vectors[] = {
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/* 1080p and less video */
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{
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.src = MSM_BUS_MASTER_MDP_PORT0,
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.dst = MSM_BUS_SLAVE_EBI_CH0,
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.ab = 334080000 * 2,
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.ib = 417600000 * 2,
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},
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};
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static struct msm_bus_paths mdp_bus_scale_usecases[] = {
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{
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ARRAY_SIZE(mdp_init_vectors),
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mdp_init_vectors,
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},
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{
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ARRAY_SIZE(mdp_ui_vectors),
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mdp_ui_vectors,
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},
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{
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ARRAY_SIZE(mdp_ui_vectors),
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mdp_ui_vectors,
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},
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{
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ARRAY_SIZE(mdp_vga_vectors),
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mdp_vga_vectors,
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},
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{
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ARRAY_SIZE(mdp_720p_vectors),
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mdp_720p_vectors,
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},
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{
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ARRAY_SIZE(mdp_1080p_vectors),
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mdp_1080p_vectors,
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},
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};
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static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
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mdp_bus_scale_usecases,
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ARRAY_SIZE(mdp_bus_scale_usecases),
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.name = "mdp",
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};
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static struct msm_panel_common_pdata mdp_pdata = {
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.gpio = MDP_VSYNC_GPIO,
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.mdp_max_clk = 266667000,
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.mdp_bus_scale_table = &mdp_bus_scale_pdata,
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.mdp_rev = MDP_REV_44,
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#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
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.mem_hid = BIT(ION_CP_MM_HEAP_ID),
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#else
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.mem_hid = MEMTYPE_EBI1,
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#endif
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.mdp_iommu_split_domain = 1,
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.avtimer_phy = AVTIMER_PHYSICAL_ADDRESS,
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};
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void __init apq8064_mdp_writeback(struct memtype_reserve* reserve_table)
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{
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mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
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mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
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#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
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reserve_table[mdp_pdata.mem_hid].size +=
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mdp_pdata.ov0_wb_size;
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reserve_table[mdp_pdata.mem_hid].size +=
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mdp_pdata.ov1_wb_size;
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#endif
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}
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static struct resource hdmi_msm_resources[] = {
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{
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.name = "hdmi_msm_qfprom_addr",
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.start = 0x00700000,
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.end = 0x007060FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "hdmi_msm_hdmi_addr",
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.start = 0x04A00000,
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.end = 0x04A00FFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "hdmi_msm_irq",
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.start = HDMI_IRQ,
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.end = HDMI_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static int hdmi_enable_5v(int on);
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static int hdmi_core_power(int on, int show);
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static int hdmi_cec_power(int on);
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static int hdmi_gpio_config(int on);
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static int hdmi_panel_power(int on);
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static struct msm_hdmi_platform_data hdmi_msm_data = {
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.irq = HDMI_IRQ,
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.enable_5v = hdmi_enable_5v,
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.core_power = hdmi_core_power,
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.cec_power = hdmi_cec_power,
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.panel_power = hdmi_panel_power,
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.gpio_config = hdmi_gpio_config,
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};
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static struct platform_device hdmi_msm_device = {
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.name = "hdmi_msm",
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.id = 0,
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.num_resources = ARRAY_SIZE(hdmi_msm_resources),
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.resource = hdmi_msm_resources,
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.dev.platform_data = &hdmi_msm_data,
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};
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static char wfd_check_mdp_iommu_split_domain(void)
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{
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return mdp_pdata.mdp_iommu_split_domain;
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}
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#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
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static struct msm_wfd_platform_data wfd_pdata = {
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.wfd_check_mdp_iommu_split = wfd_check_mdp_iommu_split_domain,
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};
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static struct platform_device wfd_panel_device = {
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.name = "wfd_panel",
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.id = 0,
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.dev.platform_data = NULL,
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};
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static struct platform_device wfd_device = {
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.name = "msm_wfd",
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.id = -1,
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.dev.platform_data = &wfd_pdata,
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};
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#endif
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/* HDMI related GPIOs */
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#define HDMI_CEC_VAR_GPIO 69
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#define HDMI_DDC_CLK_GPIO 70
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#define HDMI_DDC_DATA_GPIO 71
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#define HDMI_HPD_GPIO 72
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static bool dsi_power_on;
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static int mipi_dsi_panel_power(int on)
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{
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static struct regulator *reg_lvs7, *reg_l2, *reg_l11, *reg_ext_3p3v;
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static int gpio36, gpio25, gpio26, mpp3;
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int rc;
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pr_debug("%s: on=%d\n", __func__, on);
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if (!dsi_power_on) {
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reg_lvs7 = regulator_get(&msm_mipi_dsi1_device.dev,
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"dsi1_vddio");
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if (IS_ERR_OR_NULL(reg_lvs7)) {
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pr_err("could not get 8921_lvs7, rc = %ld\n",
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PTR_ERR(reg_lvs7));
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return -ENODEV;
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}
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reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
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"dsi1_pll_vdda");
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if (IS_ERR_OR_NULL(reg_l2)) {
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pr_err("could not get 8921_l2, rc = %ld\n",
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PTR_ERR(reg_l2));
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return -ENODEV;
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}
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rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
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if (rc) {
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pr_err("set_voltage l2 failed, rc=%d\n", rc);
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return -EINVAL;
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}
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reg_l11 = regulator_get(&msm_mipi_dsi1_device.dev,
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"dsi1_avdd");
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if (IS_ERR(reg_l11)) {
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pr_err("could not get 8921_l11, rc = %ld\n",
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PTR_ERR(reg_l11));
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return -ENODEV;
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}
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rc = regulator_set_voltage(reg_l11, 3000000, 3000000);
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if (rc) {
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pr_err("set_voltage l11 failed, rc=%d\n", rc);
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return -EINVAL;
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}
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if (machine_is_apq8064_liquid()) {
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reg_ext_3p3v = regulator_get(&msm_mipi_dsi1_device.dev,
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"dsi1_vccs_3p3v");
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if (IS_ERR_OR_NULL(reg_ext_3p3v)) {
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pr_err("could not get reg_ext_3p3v, rc = %ld\n",
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PTR_ERR(reg_ext_3p3v));
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reg_ext_3p3v = NULL;
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return -ENODEV;
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}
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mpp3 = PM8921_MPP_PM_TO_SYS(3);
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rc = gpio_request(mpp3, "backlight_en");
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if (rc) {
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pr_err("request mpp3 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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}
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gpio25 = PM8921_GPIO_PM_TO_SYS(25);
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rc = gpio_request(gpio25, "disp_rst_n");
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if (rc) {
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pr_err("request gpio 25 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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gpio26 = PM8921_GPIO_PM_TO_SYS(26);
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rc = gpio_request(gpio26, "pwm_backlight_ctrl");
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if (rc) {
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pr_err("request gpio 26 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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gpio36 = PM8921_GPIO_PM_TO_SYS(36); /* lcd1_pwr_en_n */
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rc = gpio_request(gpio36, "lcd1_pwr_en_n");
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if (rc) {
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pr_err("request gpio 36 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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dsi_power_on = true;
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}
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if (on) {
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rc = regulator_enable(reg_lvs7);
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if (rc) {
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pr_err("enable lvs7 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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rc = regulator_set_optimum_mode(reg_l11, 110000);
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if (rc < 0) {
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pr_err("set_optimum_mode l11 failed, rc=%d\n", rc);
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return -EINVAL;
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}
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rc = regulator_enable(reg_l11);
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if (rc) {
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pr_err("enable l11 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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rc = regulator_set_optimum_mode(reg_l2, 100000);
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if (rc < 0) {
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pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
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return -EINVAL;
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}
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rc = regulator_enable(reg_l2);
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if (rc) {
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pr_err("enable l2 failed, rc=%d\n", rc);
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return -ENODEV;
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}
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if (machine_is_apq8064_liquid()) {
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rc = regulator_enable(reg_ext_3p3v);
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if (rc) {
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pr_err("enable reg_ext_3p3v failed, rc=%d\n",
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rc);
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return -ENODEV;
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}
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gpio_set_value_cansleep(mpp3, 1);
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}
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gpio_set_value_cansleep(gpio36, 0);
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gpio_set_value_cansleep(gpio25, 1);
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if (socinfo_get_pmic_model() == PMIC_MODEL_PM8917)
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gpio_set_value_cansleep(gpio26, 1);
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} else {
|
|
if (socinfo_get_pmic_model() == PMIC_MODEL_PM8917)
|
|
gpio_set_value_cansleep(gpio26, 0);
|
|
gpio_set_value_cansleep(gpio25, 0);
|
|
gpio_set_value_cansleep(gpio36, 1);
|
|
|
|
if (machine_is_apq8064_liquid()) {
|
|
gpio_set_value_cansleep(mpp3, 0);
|
|
|
|
rc = regulator_disable(reg_ext_3p3v);
|
|
if (rc) {
|
|
pr_err("disable reg_ext_3p3v failed, rc=%d\n",
|
|
rc);
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
rc = regulator_disable(reg_l11);
|
|
if (rc) {
|
|
pr_err("disable reg_l1 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
rc = regulator_disable(reg_lvs7);
|
|
if (rc) {
|
|
pr_err("disable reg_lvs7 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
rc = regulator_disable(reg_l2);
|
|
if (rc) {
|
|
pr_err("disable reg_l2 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct mipi_dsi_platform_data mipi_dsi_pdata = {
|
|
.dsi_power_save = mipi_dsi_panel_power,
|
|
};
|
|
|
|
static bool lvds_power_on;
|
|
static int lvds_panel_power(int on)
|
|
{
|
|
static struct regulator *reg_lvs7, *reg_l2, *reg_ext_3p3v;
|
|
static int gpio36, gpio26, mpp3;
|
|
int rc;
|
|
|
|
pr_debug("%s: on=%d\n", __func__, on);
|
|
|
|
if (!lvds_power_on) {
|
|
reg_lvs7 = regulator_get(&msm_lvds_device.dev,
|
|
"lvds_vdda");
|
|
if (IS_ERR_OR_NULL(reg_lvs7)) {
|
|
pr_err("could not get 8921_lvs7, rc = %ld\n",
|
|
PTR_ERR(reg_lvs7));
|
|
return -ENODEV;
|
|
}
|
|
|
|
reg_l2 = regulator_get(&msm_lvds_device.dev,
|
|
"lvds_pll_vdda");
|
|
if (IS_ERR_OR_NULL(reg_l2)) {
|
|
pr_err("could not get 8921_l2, rc = %ld\n",
|
|
PTR_ERR(reg_l2));
|
|
return -ENODEV;
|
|
}
|
|
|
|
rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
|
|
if (rc) {
|
|
pr_err("set_voltage l2 failed, rc=%d\n", rc);
|
|
return -EINVAL;
|
|
}
|
|
|
|
reg_ext_3p3v = regulator_get(&msm_lvds_device.dev,
|
|
"lvds_vccs_3p3v");
|
|
if (IS_ERR_OR_NULL(reg_ext_3p3v)) {
|
|
pr_err("could not get reg_ext_3p3v, rc = %ld\n",
|
|
PTR_ERR(reg_ext_3p3v));
|
|
return -ENODEV;
|
|
}
|
|
|
|
gpio26 = PM8921_GPIO_PM_TO_SYS(26);
|
|
rc = gpio_request(gpio26, "pwm_backlight_ctrl");
|
|
if (rc) {
|
|
pr_err("request gpio 26 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
gpio36 = PM8921_GPIO_PM_TO_SYS(36); /* lcd1_pwr_en_n */
|
|
rc = gpio_request(gpio36, "lcd1_pwr_en_n");
|
|
if (rc) {
|
|
pr_err("request gpio 36 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
mpp3 = PM8921_MPP_PM_TO_SYS(3);
|
|
rc = gpio_request(mpp3, "backlight_en");
|
|
if (rc) {
|
|
pr_err("request mpp3 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
lvds_power_on = true;
|
|
}
|
|
|
|
if (on) {
|
|
rc = regulator_enable(reg_lvs7);
|
|
if (rc) {
|
|
pr_err("enable lvs7 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
rc = regulator_set_optimum_mode(reg_l2, 100000);
|
|
if (rc < 0) {
|
|
pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
|
|
return -EINVAL;
|
|
}
|
|
rc = regulator_enable(reg_l2);
|
|
if (rc) {
|
|
pr_err("enable l2 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
rc = regulator_enable(reg_ext_3p3v);
|
|
if (rc) {
|
|
pr_err("enable reg_ext_3p3v failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
gpio_set_value_cansleep(gpio36, 0);
|
|
gpio_set_value_cansleep(mpp3, 1);
|
|
if (socinfo_get_pmic_model() == PMIC_MODEL_PM8917)
|
|
gpio_set_value_cansleep(gpio26, 1);
|
|
} else {
|
|
if (socinfo_get_pmic_model() == PMIC_MODEL_PM8917)
|
|
gpio_set_value_cansleep(gpio26, 0);
|
|
gpio_set_value_cansleep(mpp3, 0);
|
|
gpio_set_value_cansleep(gpio36, 1);
|
|
|
|
rc = regulator_disable(reg_lvs7);
|
|
if (rc) {
|
|
pr_err("disable reg_lvs7 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
rc = regulator_disable(reg_l2);
|
|
if (rc) {
|
|
pr_err("disable reg_l2 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
rc = regulator_disable(reg_ext_3p3v);
|
|
if (rc) {
|
|
pr_err("disable reg_ext_3p3v failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lvds_pixel_remap(void)
|
|
{
|
|
u32 ver = socinfo_get_version();
|
|
|
|
if (machine_is_apq8064_cdp() ||
|
|
machine_is_apq8064_liquid()) {
|
|
if ((SOCINFO_VERSION_MAJOR(ver) == 1) &&
|
|
(SOCINFO_VERSION_MINOR(ver) == 0))
|
|
return LVDS_PIXEL_MAP_PATTERN_1;
|
|
} else if (machine_is_mpq8064_dtv()) {
|
|
if ((SOCINFO_VERSION_MAJOR(ver) == 1) &&
|
|
(SOCINFO_VERSION_MINOR(ver) == 0))
|
|
return LVDS_PIXEL_MAP_PATTERN_2;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct lcdc_platform_data lvds_pdata = {
|
|
.lcdc_power_save = lvds_panel_power,
|
|
.lvds_pixel_remap = lvds_pixel_remap
|
|
};
|
|
|
|
#define LPM_CHANNEL 2
|
|
static int lvds_chimei_gpio[] = {LPM_CHANNEL};
|
|
|
|
static struct lvds_panel_platform_data lvds_chimei_pdata = {
|
|
.gpio = lvds_chimei_gpio,
|
|
};
|
|
|
|
static struct platform_device lvds_chimei_panel_device = {
|
|
.name = "lvds_chimei_wxga",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = &lvds_chimei_pdata,
|
|
}
|
|
};
|
|
|
|
#define FRC_GPIO_UPDATE (SX150X_EXP4_GPIO_BASE + 8)
|
|
#define FRC_GPIO_RESET (SX150X_EXP4_GPIO_BASE + 9)
|
|
#define FRC_GPIO_PWR (SX150X_EXP4_GPIO_BASE + 10)
|
|
|
|
static int lvds_frc_gpio[] = {FRC_GPIO_UPDATE, FRC_GPIO_RESET, FRC_GPIO_PWR};
|
|
static struct lvds_panel_platform_data lvds_frc_pdata = {
|
|
.gpio = lvds_frc_gpio,
|
|
};
|
|
|
|
static struct platform_device lvds_frc_panel_device = {
|
|
.name = "lvds_frc_fhd",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = &lvds_frc_pdata,
|
|
}
|
|
};
|
|
|
|
static int dsi2lvds_gpio[2] = {
|
|
LPM_CHANNEL,/* Backlight PWM-ID=0 for PMIC-GPIO#24 */
|
|
0x1F08 /* DSI2LVDS Bridge GPIO Output, mask=0x1f, out=0x08 */
|
|
};
|
|
static struct msm_panel_common_pdata mipi_dsi2lvds_pdata = {
|
|
.gpio_num = dsi2lvds_gpio,
|
|
};
|
|
|
|
static struct platform_device mipi_dsi2lvds_bridge_device = {
|
|
.name = "mipi_tc358764",
|
|
.id = 0,
|
|
.dev.platform_data = &mipi_dsi2lvds_pdata,
|
|
};
|
|
|
|
static int toshiba_gpio[] = {LPM_CHANNEL};
|
|
static struct mipi_dsi_panel_platform_data toshiba_pdata = {
|
|
.gpio = toshiba_gpio,
|
|
};
|
|
|
|
static struct platform_device mipi_dsi_toshiba_panel_device = {
|
|
.name = "mipi_toshiba",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = &toshiba_pdata,
|
|
}
|
|
};
|
|
|
|
static struct msm_bus_vectors dtv_bus_init_vectors[] = {
|
|
{
|
|
.src = MSM_BUS_MASTER_MDP_PORT0,
|
|
.dst = MSM_BUS_SLAVE_EBI_CH0,
|
|
.ab = 0,
|
|
.ib = 0,
|
|
},
|
|
};
|
|
|
|
static struct msm_bus_vectors dtv_bus_def_vectors[] = {
|
|
{
|
|
.src = MSM_BUS_MASTER_MDP_PORT0,
|
|
.dst = MSM_BUS_SLAVE_EBI_CH0,
|
|
.ab = 566092800 * 2,
|
|
.ib = 707616000 * 2,
|
|
},
|
|
};
|
|
|
|
static struct msm_bus_paths dtv_bus_scale_usecases[] = {
|
|
{
|
|
ARRAY_SIZE(dtv_bus_init_vectors),
|
|
dtv_bus_init_vectors,
|
|
},
|
|
{
|
|
ARRAY_SIZE(dtv_bus_def_vectors),
|
|
dtv_bus_def_vectors,
|
|
},
|
|
};
|
|
static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
|
|
dtv_bus_scale_usecases,
|
|
ARRAY_SIZE(dtv_bus_scale_usecases),
|
|
.name = "dtv",
|
|
};
|
|
|
|
static struct lcdc_platform_data dtv_pdata = {
|
|
.bus_scale_table = &dtv_bus_scale_pdata,
|
|
.lcdc_power_save = hdmi_panel_power,
|
|
};
|
|
|
|
static int hdmi_panel_power(int on)
|
|
{
|
|
int rc;
|
|
|
|
pr_debug("%s: HDMI Core: %s\n", __func__, (on ? "ON" : "OFF"));
|
|
rc = hdmi_core_power(on, 1);
|
|
if (rc)
|
|
rc = hdmi_cec_power(on);
|
|
|
|
pr_debug("%s: HDMI Core: %s Success\n", __func__, (on ? "ON" : "OFF"));
|
|
return rc;
|
|
}
|
|
|
|
static int hdmi_enable_5v(int on)
|
|
{
|
|
/* TBD: PM8921 regulator instead of 8901 */
|
|
static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
|
|
static int prev_on;
|
|
int rc;
|
|
|
|
if (on == prev_on)
|
|
return 0;
|
|
|
|
if (!reg_8921_hdmi_mvs) {
|
|
reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
|
|
"hdmi_mvs");
|
|
if (IS_ERR(reg_8921_hdmi_mvs)) {
|
|
pr_err("could not get reg_8921_hdmi_mvs, rc = %ld\n",
|
|
PTR_ERR(reg_8921_hdmi_mvs));
|
|
reg_8921_hdmi_mvs = NULL;
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
if (on) {
|
|
rc = regulator_enable(reg_8921_hdmi_mvs);
|
|
if (rc) {
|
|
pr_err("'%s' regulator enable failed, rc=%d\n",
|
|
"8921_hdmi_mvs", rc);
|
|
return rc;
|
|
}
|
|
pr_debug("%s(on): success\n", __func__);
|
|
} else {
|
|
rc = regulator_disable(reg_8921_hdmi_mvs);
|
|
if (rc)
|
|
pr_warning("'%s' regulator disable failed, rc=%d\n",
|
|
"8921_hdmi_mvs", rc);
|
|
pr_debug("%s(off): success\n", __func__);
|
|
}
|
|
|
|
prev_on = on;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hdmi_core_power(int on, int show)
|
|
{
|
|
static struct regulator *reg_8921_lvs7, *reg_8921_s4, *reg_ext_3p3v;
|
|
static int prev_on;
|
|
int rc;
|
|
|
|
if (on == prev_on)
|
|
return 0;
|
|
|
|
/* TBD: PM8921 regulator instead of 8901 */
|
|
if (!reg_ext_3p3v &&
|
|
(!(machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv()))) {
|
|
reg_ext_3p3v = regulator_get(&hdmi_msm_device.dev,
|
|
"hdmi_mux_vdd");
|
|
if (IS_ERR_OR_NULL(reg_ext_3p3v)) {
|
|
pr_err("could not get reg_ext_3p3v, rc = %ld\n",
|
|
PTR_ERR(reg_ext_3p3v));
|
|
reg_ext_3p3v = NULL;
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
if (!reg_8921_lvs7) {
|
|
reg_8921_lvs7 = regulator_get(&hdmi_msm_device.dev,
|
|
"hdmi_vdda");
|
|
if (IS_ERR(reg_8921_lvs7)) {
|
|
pr_err("could not get reg_8921_lvs7, rc = %ld\n",
|
|
PTR_ERR(reg_8921_lvs7));
|
|
reg_8921_lvs7 = NULL;
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
if (!reg_8921_s4) {
|
|
reg_8921_s4 = regulator_get(&hdmi_msm_device.dev,
|
|
"hdmi_lvl_tsl");
|
|
if (IS_ERR(reg_8921_s4)) {
|
|
pr_err("could not get reg_8921_s4, rc = %ld\n",
|
|
PTR_ERR(reg_8921_s4));
|
|
reg_8921_s4 = NULL;
|
|
return -ENODEV;
|
|
}
|
|
rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
|
|
if (rc) {
|
|
pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
if (on) {
|
|
/*
|
|
* Configure 3P3V_BOOST_EN as GPIO, 8mA drive strength,
|
|
* pull none, out-high
|
|
*/
|
|
if (!(machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv())) {
|
|
rc = regulator_set_optimum_mode(reg_ext_3p3v, 290000);
|
|
if (rc < 0) {
|
|
pr_err("set_optimum_mode ext_3p3v failed," \
|
|
"rc=%d\n", rc);
|
|
return -EINVAL;
|
|
}
|
|
|
|
rc = regulator_enable(reg_ext_3p3v);
|
|
if (rc) {
|
|
pr_err("enable reg_ext_3p3v failed, rc=%d\n",
|
|
rc);
|
|
return rc;
|
|
}
|
|
}
|
|
|
|
rc = regulator_enable(reg_8921_lvs7);
|
|
if (rc) {
|
|
pr_err("'%s' regulator enable failed, rc=%d\n",
|
|
"hdmi_vdda", rc);
|
|
goto error1;
|
|
}
|
|
rc = regulator_enable(reg_8921_s4);
|
|
if (rc) {
|
|
pr_err("'%s' regulator enable failed, rc=%d\n",
|
|
"hdmi_lvl_tsl", rc);
|
|
goto error2;
|
|
}
|
|
pr_debug("%s(on): success\n", __func__);
|
|
} else {
|
|
if (!(machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv())) {
|
|
rc = regulator_disable(reg_ext_3p3v);
|
|
if (rc) {
|
|
pr_err("disable reg_ext_3p3v failed, rc=%d\n",
|
|
rc);
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
rc = regulator_disable(reg_8921_lvs7);
|
|
if (rc) {
|
|
pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
rc = regulator_disable(reg_8921_s4);
|
|
if (rc) {
|
|
pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
|
|
return -ENODEV;
|
|
}
|
|
pr_debug("%s(off): success\n", __func__);
|
|
}
|
|
|
|
prev_on = on;
|
|
|
|
return 0;
|
|
|
|
error2:
|
|
regulator_disable(reg_8921_lvs7);
|
|
error1:
|
|
if (!(machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv()))
|
|
regulator_disable(reg_ext_3p3v);
|
|
return rc;
|
|
}
|
|
|
|
static int hdmi_gpio_config(int on)
|
|
{
|
|
int rc = 0;
|
|
static int prev_on;
|
|
int pmic_gpio14 = PM8921_GPIO_PM_TO_SYS(14);
|
|
|
|
if (on == prev_on)
|
|
return 0;
|
|
|
|
if (on) {
|
|
rc = gpio_request(HDMI_DDC_CLK_GPIO, "HDMI_DDC_CLK");
|
|
if (rc) {
|
|
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
|
|
"HDMI_DDC_CLK", HDMI_DDC_CLK_GPIO, rc);
|
|
goto error1;
|
|
}
|
|
rc = gpio_request(HDMI_DDC_DATA_GPIO, "HDMI_DDC_DATA");
|
|
if (rc) {
|
|
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
|
|
"HDMI_DDC_DATA", HDMI_DDC_DATA_GPIO, rc);
|
|
goto error2;
|
|
}
|
|
rc = gpio_request(HDMI_HPD_GPIO, "HDMI_HPD");
|
|
if (rc) {
|
|
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
|
|
"HDMI_HPD", HDMI_HPD_GPIO, rc);
|
|
goto error3;
|
|
}
|
|
if (machine_is_apq8064_liquid()) {
|
|
rc = gpio_request(pmic_gpio14, "PMIC_HDMI_MUX_SEL");
|
|
if (rc) {
|
|
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
|
|
"PMIC_HDMI_MUX_SEL", 14, rc);
|
|
goto error4;
|
|
}
|
|
gpio_set_value_cansleep(pmic_gpio14, 0);
|
|
}
|
|
pr_debug("%s(on): success\n", __func__);
|
|
} else {
|
|
gpio_free(HDMI_DDC_CLK_GPIO);
|
|
gpio_free(HDMI_DDC_DATA_GPIO);
|
|
gpio_free(HDMI_HPD_GPIO);
|
|
|
|
if (machine_is_apq8064_liquid()) {
|
|
gpio_set_value_cansleep(pmic_gpio14, 1);
|
|
gpio_free(pmic_gpio14);
|
|
}
|
|
pr_debug("%s(off): success\n", __func__);
|
|
}
|
|
|
|
prev_on = on;
|
|
return 0;
|
|
|
|
error4:
|
|
gpio_free(HDMI_HPD_GPIO);
|
|
error3:
|
|
gpio_free(HDMI_DDC_DATA_GPIO);
|
|
error2:
|
|
gpio_free(HDMI_DDC_CLK_GPIO);
|
|
error1:
|
|
return rc;
|
|
}
|
|
|
|
static int hdmi_cec_power(int on)
|
|
{
|
|
static int prev_on;
|
|
int rc;
|
|
|
|
if (on == prev_on)
|
|
return 0;
|
|
|
|
if (on) {
|
|
rc = gpio_request(HDMI_CEC_VAR_GPIO, "HDMI_CEC_VAR");
|
|
if (rc) {
|
|
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
|
|
"HDMI_CEC_VAR", HDMI_CEC_VAR_GPIO, rc);
|
|
goto error;
|
|
}
|
|
pr_debug("%s(on): success\n", __func__);
|
|
} else {
|
|
gpio_free(HDMI_CEC_VAR_GPIO);
|
|
pr_debug("%s(off): success\n", __func__);
|
|
}
|
|
|
|
prev_on = on;
|
|
|
|
return 0;
|
|
error:
|
|
return rc;
|
|
}
|
|
|
|
void __init apq8064_init_fb(void)
|
|
{
|
|
platform_device_register(&msm_fb_device);
|
|
platform_device_register(&lvds_chimei_panel_device);
|
|
|
|
#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
|
|
platform_device_register(&wfd_panel_device);
|
|
platform_device_register(&wfd_device);
|
|
#endif
|
|
|
|
if (machine_is_apq8064_liquid())
|
|
platform_device_register(&mipi_dsi2lvds_bridge_device);
|
|
if (machine_is_apq8064_mtp())
|
|
platform_device_register(&mipi_dsi_toshiba_panel_device);
|
|
if (machine_is_mpq8064_dtv())
|
|
platform_device_register(&lvds_frc_panel_device);
|
|
|
|
msm_fb_register_device("mdp", &mdp_pdata);
|
|
msm_fb_register_device("lvds", &lvds_pdata);
|
|
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
|
|
platform_device_register(&hdmi_msm_device);
|
|
msm_fb_register_device("dtv", &dtv_pdata);
|
|
}
|
|
|
|
/**
|
|
* Set MDP clocks to high frequency to avoid DSI underflow
|
|
* when using high resolution 1200x1920 WUXGA panels
|
|
*/
|
|
static void set_mdp_clocks_for_wuxga(void)
|
|
{
|
|
mdp_ui_vectors[0].ab = 2000000000;
|
|
mdp_ui_vectors[0].ib = 2000000000;
|
|
mdp_vga_vectors[0].ab = 2000000000;
|
|
mdp_vga_vectors[0].ib = 2000000000;
|
|
mdp_720p_vectors[0].ab = 2000000000;
|
|
mdp_720p_vectors[0].ib = 2000000000;
|
|
mdp_1080p_vectors[0].ab = 2000000000;
|
|
mdp_1080p_vectors[0].ib = 2000000000;
|
|
|
|
if (apq8064_hdmi_as_primary_selected()) {
|
|
dtv_bus_def_vectors[0].ab = 2000000000;
|
|
dtv_bus_def_vectors[0].ib = 2000000000;
|
|
}
|
|
}
|
|
|
|
void __init apq8064_set_display_params(char *prim_panel, char *ext_panel,
|
|
unsigned char resolution)
|
|
{
|
|
/*
|
|
* For certain MPQ boards, HDMI should be set as primary display
|
|
* by default, with the flexibility to specify any other panel
|
|
* as a primary panel through boot parameters.
|
|
*/
|
|
if (machine_is_mpq8064_hrd() || machine_is_mpq8064_cdp()) {
|
|
pr_debug("HDMI is the primary display by default for MPQ\n");
|
|
if (!strnlen(prim_panel, PANEL_NAME_MAX_LEN))
|
|
strlcpy(msm_fb_pdata.prim_panel_name, HDMI_PANEL_NAME,
|
|
PANEL_NAME_MAX_LEN);
|
|
}
|
|
|
|
if (strnlen(prim_panel, PANEL_NAME_MAX_LEN)) {
|
|
strlcpy(msm_fb_pdata.prim_panel_name, prim_panel,
|
|
PANEL_NAME_MAX_LEN);
|
|
pr_debug("msm_fb_pdata.prim_panel_name %s\n",
|
|
msm_fb_pdata.prim_panel_name);
|
|
|
|
if (!strncmp((char *)msm_fb_pdata.prim_panel_name,
|
|
HDMI_PANEL_NAME, strnlen(HDMI_PANEL_NAME,
|
|
PANEL_NAME_MAX_LEN))) {
|
|
pr_debug("HDMI is the primary display by"
|
|
" boot parameter\n");
|
|
hdmi_is_primary = 1;
|
|
set_mdp_clocks_for_wuxga();
|
|
}
|
|
}
|
|
if (strnlen(ext_panel, PANEL_NAME_MAX_LEN)) {
|
|
strlcpy(msm_fb_pdata.ext_panel_name, ext_panel,
|
|
PANEL_NAME_MAX_LEN);
|
|
pr_debug("msm_fb_pdata.ext_panel_name %s\n",
|
|
msm_fb_pdata.ext_panel_name);
|
|
|
|
if (!strncmp((char *)msm_fb_pdata.ext_panel_name,
|
|
MHL_PANEL_NAME, strnlen(MHL_PANEL_NAME,
|
|
PANEL_NAME_MAX_LEN))) {
|
|
pr_debug("MHL is external display by boot parameter\n");
|
|
mhl_display_enabled = 1;
|
|
}
|
|
}
|
|
|
|
msm_fb_pdata.ext_resolution = resolution;
|
|
hdmi_msm_data.is_mhl_enabled = mhl_display_enabled;
|
|
}
|