423 lines
10 KiB
C
423 lines
10 KiB
C
/*
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* mach-imx27_visstrim_m10.c
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*
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* Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
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*
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* Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/i2c.h>
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#include <linux/i2c/pca953x.h>
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#include <linux/input.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/leds.h>
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#include <linux/memblock.h>
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#include <media/soc_camera.h>
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#include <sound/tlv320aic32x4.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <mach/common.h>
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#include <mach/iomux-mx27.h>
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#include "devices-imx27.h"
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#define TVP5150_RSTN (GPIO_PORTC + 18)
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#define TVP5150_PWDN (GPIO_PORTC + 19)
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#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
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#define SDHC1_IRQ IRQ_GPIOB(25)
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static const int visstrim_m10_pins[] __initconst = {
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/* UART1 (console) */
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS,
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/* FEC */
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PD0_AIN_FEC_TXD0,
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PD1_AIN_FEC_TXD1,
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PD2_AIN_FEC_TXD2,
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PD3_AIN_FEC_TXD3,
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PD4_AOUT_FEC_RX_ER,
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PD5_AOUT_FEC_RXD1,
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PD6_AOUT_FEC_RXD2,
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PD7_AOUT_FEC_RXD3,
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PD8_AF_FEC_MDIO,
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PD9_AIN_FEC_MDC,
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PD10_AOUT_FEC_CRS,
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PD11_AOUT_FEC_TX_CLK,
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PD12_AOUT_FEC_RXD0,
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PD13_AOUT_FEC_RX_DV,
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PD14_AOUT_FEC_RX_CLK,
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PD15_AOUT_FEC_COL,
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PD16_AIN_FEC_TX_ER,
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PF23_AIN_FEC_TX_EN,
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/* SSI1 */
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PC20_PF_SSI1_FS,
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PC21_PF_SSI1_RXD,
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PC22_PF_SSI1_TXD,
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PC23_PF_SSI1_CLK,
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/* SDHC1 */
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PE18_PF_SD1_D0,
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PE19_PF_SD1_D1,
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PE20_PF_SD1_D2,
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PE21_PF_SD1_D3,
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PE22_PF_SD1_CMD,
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PE23_PF_SD1_CLK,
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/* Both I2Cs */
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PD17_PF_I2C_DATA,
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PD18_PF_I2C_CLK,
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PC5_PF_I2C2_SDA,
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PC6_PF_I2C2_SCL,
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/* USB OTG */
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OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
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PC9_PF_USBOTG_DATA0,
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PC11_PF_USBOTG_DATA1,
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PC10_PF_USBOTG_DATA2,
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PC13_PF_USBOTG_DATA3,
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PC12_PF_USBOTG_DATA4,
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PC7_PF_USBOTG_DATA5,
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PC8_PF_USBOTG_DATA6,
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PE25_PF_USBOTG_DATA7,
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PE24_PF_USBOTG_CLK,
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PE2_PF_USBOTG_DIR,
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PE0_PF_USBOTG_NXT,
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PE1_PF_USBOTG_STP,
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PB23_PF_USB_PWR,
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PB24_PF_USB_OC,
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/* CSI */
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PB10_PF_CSI_D0,
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PB11_PF_CSI_D1,
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PB12_PF_CSI_D2,
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PB13_PF_CSI_D3,
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PB14_PF_CSI_D4,
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PB15_PF_CSI_MCLK,
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PB16_PF_CSI_PIXCLK,
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PB17_PF_CSI_D5,
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PB18_PF_CSI_D6,
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PB19_PF_CSI_D7,
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PB20_PF_CSI_VSYNC,
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PB21_PF_CSI_HSYNC,
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};
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/* Camera */
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static int visstrim_camera_power(struct device *dev, int on)
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{
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gpio_set_value(TVP5150_PWDN, on);
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return 0;
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};
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static int visstrim_camera_reset(struct device *dev)
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{
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gpio_set_value(TVP5150_RSTN, 0);
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ndelay(500);
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gpio_set_value(TVP5150_RSTN, 1);
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return 0;
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};
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static struct i2c_board_info visstrim_i2c_camera = {
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I2C_BOARD_INFO("tvp5150", 0x5d),
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};
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static struct soc_camera_link iclink_tvp5150 = {
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.bus_id = 0,
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.board_info = &visstrim_i2c_camera,
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.i2c_adapter_id = 0,
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.power = visstrim_camera_power,
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.reset = visstrim_camera_reset,
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};
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static struct mx2_camera_platform_data visstrim_camera = {
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.flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
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MX2_CAMERA_SWAP16 | MX2_CAMERA_PCLK_SAMPLE_RISING,
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.clk = 100000,
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};
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static phys_addr_t mx2_camera_base __initdata;
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#define MX2_CAMERA_BUF_SIZE SZ_8M
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static void __init visstrim_camera_init(void)
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{
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struct platform_device *pdev;
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int dma;
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/* Initialize tvp5150 gpios */
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mxc_gpio_mode(TVP5150_RSTN | GPIO_GPIO | GPIO_OUT);
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mxc_gpio_mode(TVP5150_PWDN | GPIO_GPIO | GPIO_OUT);
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gpio_set_value(TVP5150_RSTN, 1);
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gpio_set_value(TVP5150_PWDN, 0);
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ndelay(1);
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gpio_set_value(TVP5150_PWDN, 1);
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ndelay(1);
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gpio_set_value(TVP5150_RSTN, 0);
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ndelay(500);
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gpio_set_value(TVP5150_RSTN, 1);
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ndelay(200000);
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pdev = imx27_add_mx2_camera(&visstrim_camera);
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if (IS_ERR(pdev))
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return;
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dma = dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base, mx2_camera_base,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
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if (!(dma & DMA_MEMORY_MAP))
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return;
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}
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static void __init visstrim_reserve(void)
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{
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/* reserve 4 MiB for mx2-camera */
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mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE);
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memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
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memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
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}
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/* GPIOs used as events for applications */
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static struct gpio_keys_button visstrim_gpio_keys[] = {
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{
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.type = EV_KEY,
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.code = KEY_RESTART,
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.gpio = (GPIO_PORTC + 15),
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.desc = "Default config",
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.active_low = 0,
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.wakeup = 1,
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},
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{
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.type = EV_KEY,
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.code = KEY_RECORD,
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.gpio = (GPIO_PORTF + 14),
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.desc = "Record",
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.active_low = 0,
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.wakeup = 1,
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},
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{
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.type = EV_KEY,
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.code = KEY_STOP,
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.gpio = (GPIO_PORTF + 13),
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.desc = "Stop",
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.active_low = 0,
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.wakeup = 1,
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}
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};
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static const struct gpio_keys_platform_data
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visstrim_gpio_keys_platform_data __initconst = {
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.buttons = visstrim_gpio_keys,
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.nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
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};
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/* led */
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static const struct gpio_led visstrim_m10_leds[] __initconst = {
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{
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.name = "visstrim:ld0",
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.default_trigger = "nand-disk",
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.gpio = (GPIO_PORTC + 29),
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},
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{
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.name = "visstrim:ld1",
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.default_trigger = "nand-disk",
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.gpio = (GPIO_PORTC + 24),
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},
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{
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.name = "visstrim:ld2",
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.default_trigger = "nand-disk",
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.gpio = (GPIO_PORTC + 28),
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},
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{
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.name = "visstrim:ld3",
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.default_trigger = "nand-disk",
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.gpio = (GPIO_PORTC + 25),
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},
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};
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static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
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.leds = visstrim_m10_leds,
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.num_leds = ARRAY_SIZE(visstrim_m10_leds),
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};
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/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
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static int visstrim_m10_sdhc1_init(struct device *dev,
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irq_handler_t detect_irq, void *data)
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{
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int ret;
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ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
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"mmc-detect", data);
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return ret;
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}
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static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(SDHC1_IRQ, data);
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}
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static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
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.init = visstrim_m10_sdhc1_init,
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.exit = visstrim_m10_sdhc1_exit,
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};
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/* Visstrim_SM10 NOR flash */
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static struct physmap_flash_data visstrim_m10_flash_data = {
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.width = 2,
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};
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static struct resource visstrim_m10_flash_resource = {
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.start = 0xc0000000,
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.end = 0xc0000000 + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device visstrim_m10_nor_mtd_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &visstrim_m10_flash_data,
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},
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.num_resources = 1,
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.resource = &visstrim_m10_flash_resource,
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};
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static struct platform_device *platform_devices[] __initdata = {
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&visstrim_m10_nor_mtd_device,
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};
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/* Visstrim_M10 uses UART0 as console */
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static const struct imxuart_platform_data uart_pdata __initconst = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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/* I2C */
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static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
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.bitrate = 100000,
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};
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static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
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.gpio_base = 240, /* After MX27 internal GPIOs */
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.invert = 0,
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};
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static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
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.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
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AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
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AIC32X4_PWR_AIC32X4_LDO_ENABLE |
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AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
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AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
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.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
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AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
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.swapdacs = false,
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};
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static struct i2c_board_info visstrim_m10_i2c_devices[] = {
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{
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I2C_BOARD_INFO("pca9555", 0x20),
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.platform_data = &visstrim_m10_pca9555_pdata,
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},
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{
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I2C_BOARD_INFO("tlv320aic32x4", 0x18),
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.platform_data = &visstrim_m10_aic32x4_pdata,
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},
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{
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I2C_BOARD_INFO("m41t00", 0x68),
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}
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};
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/* USB OTG */
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static int otg_phy_init(struct platform_device *pdev)
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{
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gpio_set_value(OTG_PHY_CS_GPIO, 0);
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mdelay(10);
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return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
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}
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static const struct mxc_usbh_platform_data
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visstrim_m10_usbotg_pdata __initconst = {
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.init = otg_phy_init,
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.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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};
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/* SSI */
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static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
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.flags = IMX_SSI_DMA | IMX_SSI_SYN,
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};
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static void __init visstrim_m10_board_init(void)
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{
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int ret;
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imx27_soc_init();
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ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
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ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
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if (ret)
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pr_err("Failed to setup pins (%d)\n", ret);
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imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
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imx27_add_imx_uart0(&uart_pdata);
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imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
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imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
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i2c_register_board_info(0, visstrim_m10_i2c_devices,
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ARRAY_SIZE(visstrim_m10_i2c_devices));
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imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
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imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
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imx27_add_fec(NULL);
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imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
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platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
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&iclink_tvp5150, sizeof(iclink_tvp5150));
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gpio_led_register_device(0, &visstrim_m10_led_data);
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visstrim_camera_init();
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}
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static void __init visstrim_m10_timer_init(void)
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{
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mx27_clocks_init((unsigned long)25000000);
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}
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static struct sys_timer visstrim_m10_timer = {
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.init = visstrim_m10_timer_init,
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};
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MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
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.atag_offset = 0x100,
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.reserve = visstrim_reserve,
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.map_io = mx27_map_io,
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.init_early = imx27_init_early,
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.init_irq = mx27_init_irq,
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.handle_irq = imx27_handle_irq,
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.timer = &visstrim_m10_timer,
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.init_machine = visstrim_m10_board_init,
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.restart = mxc_restart,
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MACHINE_END
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