34 lines
1.5 KiB
C
34 lines
1.5 KiB
C
/*****************************************************************************
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* Copyright 2001 - 2009 Broadcom Corporation. All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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#include <mach/csp/chipcHw_def.h>
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#define CLK_TYPE_PRIMARY 1 /* primary clock must NOT have a parent */
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#define CLK_TYPE_PLL1 2 /* PPL1 */
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#define CLK_TYPE_PLL2 4 /* PPL2 */
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#define CLK_TYPE_PROGRAMMABLE 8 /* programmable clock rate */
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#define CLK_TYPE_BYPASSABLE 16 /* parent can be changed */
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#define CLK_MODE_XTAL 1 /* clock source is from crystal */
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struct clk {
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const char *name; /* clock name */
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unsigned int type; /* clock type */
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unsigned int mode; /* current mode */
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volatile int use_bypass; /* indicate if it's in bypass mode */
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chipcHw_CLOCK_e csp_id; /* clock ID for CSP CHIPC */
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unsigned long rate_hz; /* clock rate in Hz */
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unsigned int use_cnt; /* usage count */
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struct clk *parent; /* parent clock */
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};
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