797 lines
15 KiB
C
797 lines
15 KiB
C
/*
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* HDMI interface DSS driver for TI's OMAP4 family of SoCs.
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
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* Authors: Yong Zhi
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* Mythri pk <mythripk@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define DSS_SUBSYS_NAME "HDMI"
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/delay.h>
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#include <linux/string.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/regulator/consumer.h>
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#include <video/omapdss.h>
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#include "hdmi4_core.h"
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#include "dss.h"
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#include "dss_features.h"
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static struct {
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struct mutex lock;
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struct platform_device *pdev;
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struct hdmi_wp_data wp;
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struct hdmi_pll_data pll;
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struct hdmi_phy_data phy;
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struct hdmi_core_data core;
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struct hdmi_config cfg;
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struct clk *sys_clk;
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struct regulator *vdda_hdmi_dac_reg;
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bool core_enabled;
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struct omap_dss_device output;
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} hdmi;
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static int hdmi_runtime_get(void)
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{
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int r;
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DSSDBG("hdmi_runtime_get\n");
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r = pm_runtime_get_sync(&hdmi.pdev->dev);
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WARN_ON(r < 0);
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if (r < 0)
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return r;
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return 0;
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}
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static void hdmi_runtime_put(void)
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{
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int r;
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DSSDBG("hdmi_runtime_put\n");
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r = pm_runtime_put_sync(&hdmi.pdev->dev);
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WARN_ON(r < 0 && r != -ENOSYS);
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}
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static irqreturn_t hdmi_irq_handler(int irq, void *data)
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{
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struct hdmi_wp_data *wp = data;
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u32 irqstatus;
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irqstatus = hdmi_wp_get_irqstatus(wp);
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hdmi_wp_set_irqstatus(wp, irqstatus);
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if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
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irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
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/*
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* If we get both connect and disconnect interrupts at the same
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* time, turn off the PHY, clear interrupts, and restart, which
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* raises connect interrupt if a cable is connected, or nothing
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* if cable is not connected.
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*/
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hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
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hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
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HDMI_IRQ_LINK_DISCONNECT);
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hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
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} else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
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hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
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} else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
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hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
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}
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return IRQ_HANDLED;
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}
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static int hdmi_init_regulator(void)
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{
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int r;
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struct regulator *reg;
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if (hdmi.vdda_hdmi_dac_reg != NULL)
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return 0;
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reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
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if (IS_ERR(reg)) {
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if (PTR_ERR(reg) != -EPROBE_DEFER)
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DSSERR("can't get VDDA regulator\n");
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return PTR_ERR(reg);
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}
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if (regulator_can_change_voltage(reg)) {
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r = regulator_set_voltage(reg, 1800000, 1800000);
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if (r) {
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devm_regulator_put(reg);
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DSSWARN("can't set the regulator voltage\n");
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return r;
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}
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}
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hdmi.vdda_hdmi_dac_reg = reg;
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return 0;
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}
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static int hdmi_power_on_core(struct omap_dss_device *dssdev)
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{
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int r;
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r = regulator_enable(hdmi.vdda_hdmi_dac_reg);
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if (r)
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return r;
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r = hdmi_runtime_get();
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if (r)
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goto err_runtime_get;
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/* Make selection of HDMI in DSS */
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dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
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hdmi.core_enabled = true;
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return 0;
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err_runtime_get:
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regulator_disable(hdmi.vdda_hdmi_dac_reg);
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return r;
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}
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static void hdmi_power_off_core(struct omap_dss_device *dssdev)
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{
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hdmi.core_enabled = false;
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hdmi_runtime_put();
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regulator_disable(hdmi.vdda_hdmi_dac_reg);
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}
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static int hdmi_power_on_full(struct omap_dss_device *dssdev)
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{
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int r;
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struct omap_video_timings *p;
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struct omap_overlay_manager *mgr = hdmi.output.manager;
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unsigned long phy;
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struct hdmi_wp_data *wp = &hdmi.wp;
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r = hdmi_power_on_core(dssdev);
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if (r)
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return r;
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/* disable and clear irqs */
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hdmi_wp_clear_irqenable(wp, 0xffffffff);
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hdmi_wp_set_irqstatus(wp, 0xffffffff);
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p = &hdmi.cfg.timings;
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DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
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/* the functions below use kHz pixel clock. TODO: change to Hz */
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phy = p->pixelclock / 1000;
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hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy);
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/* config the PLL and PHY hdmi_set_pll_pwrfirst */
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r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
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if (r) {
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DSSDBG("Failed to lock PLL\n");
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goto err_pll_enable;
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}
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r = hdmi_phy_configure(&hdmi.phy, &hdmi.cfg);
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if (r) {
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DSSDBG("Failed to configure PHY\n");
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goto err_phy_cfg;
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}
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r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
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if (r)
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goto err_phy_pwr;
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hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
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/* bypass TV gamma table */
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dispc_enable_gamma_table(0);
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/* tv size */
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dss_mgr_set_timings(mgr, p);
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r = hdmi_wp_video_start(&hdmi.wp);
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if (r)
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goto err_vid_enable;
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r = dss_mgr_enable(mgr);
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if (r)
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goto err_mgr_enable;
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hdmi_wp_set_irqenable(wp,
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HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
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return 0;
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err_mgr_enable:
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hdmi_wp_video_stop(&hdmi.wp);
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err_vid_enable:
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err_phy_cfg:
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hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
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err_phy_pwr:
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hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
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err_pll_enable:
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hdmi_power_off_core(dssdev);
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return -EIO;
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}
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static void hdmi_power_off_full(struct omap_dss_device *dssdev)
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{
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struct omap_overlay_manager *mgr = hdmi.output.manager;
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hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
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dss_mgr_disable(mgr);
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hdmi_wp_video_stop(&hdmi.wp);
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hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
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hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
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hdmi_power_off_core(dssdev);
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}
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static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct omap_dss_device *out = &hdmi.output;
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if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
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return -EINVAL;
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return 0;
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}
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static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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mutex_lock(&hdmi.lock);
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hdmi.cfg.timings = *timings;
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dispc_set_tv_pclk(timings->pixelclock);
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mutex_unlock(&hdmi.lock);
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}
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static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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*timings = hdmi.cfg.timings;
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}
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static void hdmi_dump_regs(struct seq_file *s)
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{
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mutex_lock(&hdmi.lock);
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if (hdmi_runtime_get()) {
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mutex_unlock(&hdmi.lock);
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return;
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}
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hdmi_wp_dump(&hdmi.wp, s);
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hdmi_pll_dump(&hdmi.pll, s);
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hdmi_phy_dump(&hdmi.phy, s);
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hdmi4_core_dump(&hdmi.core, s);
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hdmi_runtime_put();
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mutex_unlock(&hdmi.lock);
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}
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static int read_edid(u8 *buf, int len)
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{
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int r;
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mutex_lock(&hdmi.lock);
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r = hdmi_runtime_get();
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BUG_ON(r);
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r = hdmi4_read_edid(&hdmi.core, buf, len);
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hdmi_runtime_put();
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mutex_unlock(&hdmi.lock);
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return r;
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}
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static int hdmi_display_enable(struct omap_dss_device *dssdev)
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{
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struct omap_dss_device *out = &hdmi.output;
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int r = 0;
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DSSDBG("ENTER hdmi_display_enable\n");
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mutex_lock(&hdmi.lock);
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if (out == NULL || out->manager == NULL) {
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DSSERR("failed to enable display: no output/manager\n");
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r = -ENODEV;
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goto err0;
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}
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r = hdmi_power_on_full(dssdev);
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if (r) {
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DSSERR("failed to power on device\n");
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goto err0;
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}
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mutex_unlock(&hdmi.lock);
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return 0;
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err0:
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mutex_unlock(&hdmi.lock);
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return r;
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}
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static void hdmi_display_disable(struct omap_dss_device *dssdev)
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{
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DSSDBG("Enter hdmi_display_disable\n");
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mutex_lock(&hdmi.lock);
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hdmi_power_off_full(dssdev);
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mutex_unlock(&hdmi.lock);
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}
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static int hdmi_core_enable(struct omap_dss_device *dssdev)
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{
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int r = 0;
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DSSDBG("ENTER omapdss_hdmi_core_enable\n");
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mutex_lock(&hdmi.lock);
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r = hdmi_power_on_core(dssdev);
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if (r) {
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DSSERR("failed to power on device\n");
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goto err0;
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}
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mutex_unlock(&hdmi.lock);
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return 0;
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err0:
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mutex_unlock(&hdmi.lock);
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return r;
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}
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static void hdmi_core_disable(struct omap_dss_device *dssdev)
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{
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DSSDBG("Enter omapdss_hdmi_core_disable\n");
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mutex_lock(&hdmi.lock);
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hdmi_power_off_core(dssdev);
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mutex_unlock(&hdmi.lock);
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}
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static int hdmi_get_clocks(struct platform_device *pdev)
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{
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struct clk *clk;
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clk = devm_clk_get(&pdev->dev, "sys_clk");
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if (IS_ERR(clk)) {
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DSSERR("can't get sys_clk\n");
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return PTR_ERR(clk);
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}
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hdmi.sys_clk = clk;
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return 0;
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}
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static int hdmi_connect(struct omap_dss_device *dssdev,
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struct omap_dss_device *dst)
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{
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struct omap_overlay_manager *mgr;
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int r;
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r = hdmi_init_regulator();
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if (r)
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return r;
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mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
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if (!mgr)
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return -ENODEV;
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r = dss_mgr_connect(mgr, dssdev);
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if (r)
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return r;
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r = omapdss_output_set_device(dssdev, dst);
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if (r) {
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DSSERR("failed to connect output to new device: %s\n",
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dst->name);
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dss_mgr_disconnect(mgr, dssdev);
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return r;
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}
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return 0;
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}
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static void hdmi_disconnect(struct omap_dss_device *dssdev,
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struct omap_dss_device *dst)
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{
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WARN_ON(dst != dssdev->dst);
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if (dst != dssdev->dst)
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return;
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omapdss_output_unset_device(dssdev);
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if (dssdev->manager)
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dss_mgr_disconnect(dssdev->manager, dssdev);
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}
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static int hdmi_read_edid(struct omap_dss_device *dssdev,
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u8 *edid, int len)
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{
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bool need_enable;
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int r;
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need_enable = hdmi.core_enabled == false;
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if (need_enable) {
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r = hdmi_core_enable(dssdev);
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if (r)
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return r;
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}
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r = read_edid(edid, len);
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if (need_enable)
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hdmi_core_disable(dssdev);
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return r;
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}
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#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
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static int hdmi_audio_enable(struct omap_dss_device *dssdev)
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{
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int r;
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mutex_lock(&hdmi.lock);
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if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
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r = -EPERM;
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goto err;
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}
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r = hdmi_wp_audio_enable(&hdmi.wp, true);
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if (r)
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goto err;
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mutex_unlock(&hdmi.lock);
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return 0;
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err:
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mutex_unlock(&hdmi.lock);
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return r;
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}
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static void hdmi_audio_disable(struct omap_dss_device *dssdev)
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{
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hdmi_wp_audio_enable(&hdmi.wp, false);
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}
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static int hdmi_audio_start(struct omap_dss_device *dssdev)
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{
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return hdmi4_audio_start(&hdmi.core, &hdmi.wp);
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}
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static void hdmi_audio_stop(struct omap_dss_device *dssdev)
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{
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hdmi4_audio_stop(&hdmi.core, &hdmi.wp);
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}
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static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
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{
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bool r;
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mutex_lock(&hdmi.lock);
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r = hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode);
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mutex_unlock(&hdmi.lock);
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return r;
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}
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static int hdmi_audio_config(struct omap_dss_device *dssdev,
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struct omap_dss_audio *audio)
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{
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int r;
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u32 pclk = hdmi.cfg.timings.pixelclock;
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mutex_lock(&hdmi.lock);
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if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
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r = -EPERM;
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goto err;
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}
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r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, audio, pclk);
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if (r)
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goto err;
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mutex_unlock(&hdmi.lock);
|
|
return 0;
|
|
|
|
err:
|
|
mutex_unlock(&hdmi.lock);
|
|
return r;
|
|
}
|
|
#else
|
|
static int hdmi_audio_enable(struct omap_dss_device *dssdev)
|
|
{
|
|
return -EPERM;
|
|
}
|
|
|
|
static void hdmi_audio_disable(struct omap_dss_device *dssdev)
|
|
{
|
|
}
|
|
|
|
static int hdmi_audio_start(struct omap_dss_device *dssdev)
|
|
{
|
|
return -EPERM;
|
|
}
|
|
|
|
static void hdmi_audio_stop(struct omap_dss_device *dssdev)
|
|
{
|
|
}
|
|
|
|
static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static int hdmi_audio_config(struct omap_dss_device *dssdev,
|
|
struct omap_dss_audio *audio)
|
|
{
|
|
return -EPERM;
|
|
}
|
|
#endif
|
|
|
|
static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
|
|
const struct hdmi_avi_infoframe *avi)
|
|
{
|
|
hdmi.cfg.infoframe = *avi;
|
|
return 0;
|
|
}
|
|
|
|
static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
|
|
bool hdmi_mode)
|
|
{
|
|
hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
|
|
return 0;
|
|
}
|
|
|
|
static const struct omapdss_hdmi_ops hdmi_ops = {
|
|
.connect = hdmi_connect,
|
|
.disconnect = hdmi_disconnect,
|
|
|
|
.enable = hdmi_display_enable,
|
|
.disable = hdmi_display_disable,
|
|
|
|
.check_timings = hdmi_display_check_timing,
|
|
.set_timings = hdmi_display_set_timing,
|
|
.get_timings = hdmi_display_get_timings,
|
|
|
|
.read_edid = hdmi_read_edid,
|
|
.set_infoframe = hdmi_set_infoframe,
|
|
.set_hdmi_mode = hdmi_set_hdmi_mode,
|
|
|
|
.audio_enable = hdmi_audio_enable,
|
|
.audio_disable = hdmi_audio_disable,
|
|
.audio_start = hdmi_audio_start,
|
|
.audio_stop = hdmi_audio_stop,
|
|
.audio_supported = hdmi_audio_supported,
|
|
.audio_config = hdmi_audio_config,
|
|
};
|
|
|
|
static void hdmi_init_output(struct platform_device *pdev)
|
|
{
|
|
struct omap_dss_device *out = &hdmi.output;
|
|
|
|
out->dev = &pdev->dev;
|
|
out->id = OMAP_DSS_OUTPUT_HDMI;
|
|
out->output_type = OMAP_DISPLAY_TYPE_HDMI;
|
|
out->name = "hdmi.0";
|
|
out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
|
|
out->ops.hdmi = &hdmi_ops;
|
|
out->owner = THIS_MODULE;
|
|
|
|
omapdss_register_output(out);
|
|
}
|
|
|
|
static void __exit hdmi_uninit_output(struct platform_device *pdev)
|
|
{
|
|
struct omap_dss_device *out = &hdmi.output;
|
|
|
|
omapdss_unregister_output(out);
|
|
}
|
|
|
|
static int hdmi_probe_of(struct platform_device *pdev)
|
|
{
|
|
struct device_node *node = pdev->dev.of_node;
|
|
struct device_node *ep;
|
|
int r;
|
|
|
|
ep = omapdss_of_get_first_endpoint(node);
|
|
if (!ep)
|
|
return 0;
|
|
|
|
r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
|
|
if (r)
|
|
goto err;
|
|
|
|
of_node_put(ep);
|
|
return 0;
|
|
|
|
err:
|
|
of_node_put(ep);
|
|
return r;
|
|
}
|
|
|
|
/* HDMI HW IP initialisation */
|
|
static int omapdss_hdmihw_probe(struct platform_device *pdev)
|
|
{
|
|
int r;
|
|
int irq;
|
|
|
|
hdmi.pdev = pdev;
|
|
|
|
mutex_init(&hdmi.lock);
|
|
|
|
if (pdev->dev.of_node) {
|
|
r = hdmi_probe_of(pdev);
|
|
if (r)
|
|
return r;
|
|
}
|
|
|
|
r = hdmi_wp_init(pdev, &hdmi.wp);
|
|
if (r)
|
|
return r;
|
|
|
|
r = hdmi_pll_init(pdev, &hdmi.pll);
|
|
if (r)
|
|
return r;
|
|
|
|
r = hdmi_phy_init(pdev, &hdmi.phy);
|
|
if (r)
|
|
return r;
|
|
|
|
r = hdmi4_core_init(pdev, &hdmi.core);
|
|
if (r)
|
|
return r;
|
|
|
|
r = hdmi_get_clocks(pdev);
|
|
if (r) {
|
|
DSSERR("can't get clocks\n");
|
|
return r;
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0) {
|
|
DSSERR("platform_get_irq failed\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
r = devm_request_threaded_irq(&pdev->dev, irq,
|
|
NULL, hdmi_irq_handler,
|
|
IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
|
|
if (r) {
|
|
DSSERR("HDMI IRQ request failed\n");
|
|
return r;
|
|
}
|
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
|
|
hdmi_init_output(pdev);
|
|
|
|
dss_debugfs_create_file("hdmi", hdmi_dump_regs);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
|
|
{
|
|
hdmi_uninit_output(pdev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hdmi_runtime_suspend(struct device *dev)
|
|
{
|
|
clk_disable_unprepare(hdmi.sys_clk);
|
|
|
|
dispc_runtime_put();
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hdmi_runtime_resume(struct device *dev)
|
|
{
|
|
int r;
|
|
|
|
r = dispc_runtime_get();
|
|
if (r < 0)
|
|
return r;
|
|
|
|
clk_prepare_enable(hdmi.sys_clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops hdmi_pm_ops = {
|
|
.runtime_suspend = hdmi_runtime_suspend,
|
|
.runtime_resume = hdmi_runtime_resume,
|
|
};
|
|
|
|
static const struct of_device_id hdmi_of_match[] = {
|
|
{ .compatible = "ti,omap4-hdmi", },
|
|
{},
|
|
};
|
|
|
|
static struct platform_driver omapdss_hdmihw_driver = {
|
|
.probe = omapdss_hdmihw_probe,
|
|
.remove = __exit_p(omapdss_hdmihw_remove),
|
|
.driver = {
|
|
.name = "omapdss_hdmi",
|
|
.owner = THIS_MODULE,
|
|
.pm = &hdmi_pm_ops,
|
|
.of_match_table = hdmi_of_match,
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
};
|
|
|
|
int __init hdmi4_init_platform_driver(void)
|
|
{
|
|
return platform_driver_register(&omapdss_hdmihw_driver);
|
|
}
|
|
|
|
void __exit hdmi4_uninit_platform_driver(void)
|
|
{
|
|
platform_driver_unregister(&omapdss_hdmihw_driver);
|
|
}
|