116 lines
4.9 KiB
C
116 lines
4.9 KiB
C
/*
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* Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef UFS_QCOM_PHY_QRBTC_V2_H_
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#define UFS_QCOM_PHY_QRBTC_V2_H_
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#include "phy-qcom-ufs-i.h"
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/* QCOM UFS PHY control registers */
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#define COM_OFF(x) (0x000 + x)
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#define PHY_OFF(x) (0x700 + x)
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#define PHY_USR(x) (0x11000 + x)
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#define UFS_PHY_PHY_START_OFFSET PHY_OFF(0x00)
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#define UFS_PHY_POWER_DOWN_CONTROL_OFFSET PHY_OFF(0x04)
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#define QSERDES_COM_BIAS_EN_CLKBUFLR_EN_OFFSET COM_OFF(0x20)
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#define QSERDES_COM_SYSCLK_EN_SEL COM_OFF(0x38)
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#define QSERDES_COM_SYS_CLK_CTRL COM_OFF(0x00)
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#define QSERDES_COM_RES_CODE_TXBAND COM_OFF(0x3C)
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#define QSERDES_COM_PLL_VCOTAIL_EN COM_OFF(0x04)
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#define QSERDES_COM_PLL_CNTRL COM_OFF(0x14)
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#define QSERDES_COM_PLL_CLKEPDIV COM_OFF(0xB0)
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#define QSERDES_COM_RESETSM_CNTRL COM_OFF(0x40)
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#define QSERDES_COM_PLL_RXTXEPCLK_EN COM_OFF(0xA8)
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#define QSERDES_COM_PLL_CRCTRL COM_OFF(0xAC)
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#define QSERDES_COM_DEC_START1 COM_OFF(0x64)
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#define QSERDES_COM_DEC_START2 COM_OFF(0xA4)
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#define QSERDES_COM_DIV_FRAC_START1 COM_OFF(0x98)
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#define QSERDES_COM_DIV_FRAC_START2 COM_OFF(0x9C)
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#define QSERDES_COM_DIV_FRAC_START3 COM_OFF(0xA0)
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#define QSERDES_COM_PLLLOCK_CMP1 COM_OFF(0x44)
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#define QSERDES_COM_PLLLOCK_CMP2 COM_OFF(0x48)
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#define QSERDES_COM_PLLLOCK_CMP3 COM_OFF(0x4C)
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#define QSERDES_COM_PLLLOCK_CMP_EN COM_OFF(0x50)
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#define QSERDES_COM_PLL_IP_SETI COM_OFF(0x18)
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#define QSERDES_COM_PLL_CP_SETI COM_OFF(0x24)
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#define QSERDES_COM_PLL_IP_SETP COM_OFF(0x28)
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#define QSERDES_COM_PLL_CP_SETP COM_OFF(0x2C)
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#define QSERDES_COM_RESET_SM COM_OFF(0xBC)
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#define QSERDES_COM_PWM_CNTRL1 COM_OFF(0x280)
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#define QSERDES_COM_PWM_CNTRL2 COM_OFF(0x284)
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#define QSERDES_COM_PWM_NDIV COM_OFF(0x288)
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#define QSERDES_COM_CDR_CONTROL COM_OFF(0x200)
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#define QSERDES_COM_CDR_CONTROL_HALF COM_OFF(0x298)
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#define QSERDES_COM_CDR_CONTROL_QUARTER COM_OFF(0x29C)
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#define QSERDES_COM_SIGDET_CNTRL COM_OFF(0x234)
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#define QSERDES_COM_SIGDET_CNTRL2 COM_OFF(0x28C)
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#define QSERDES_COM_UFS_CNTRL COM_OFF(0x290)
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/* QRBTC V2 USER REGISTERS */
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#define U11_UFS_RESET_REG_OFFSET PHY_USR(0x4)
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#define U11_QRBTC_CONTROL_OFFSET PHY_USR(0x18)
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#define U11_QRBTC_TX_CLK_CTRL PHY_USR(0x20)
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static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = {
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UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_PHY_START_OFFSET, 0x00),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_BIAS_EN_CLKBUFLR_EN_OFFSET, 0x3F),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SYSCLK_EN_SEL, 0x03),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SYS_CLK_CTRL, 0x16),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RES_CODE_TXBAND, 0xC0),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_VCOTAIL_EN, 0x03),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CNTRL, 0x88),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CLKEPDIV, 0x03),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RESETSM_CNTRL, 0x30),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RXTXEPCLK_EN, 0x10),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CRCTRL, 0x94),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START1, 0x98),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START2, 0x02),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START1, 0x8C),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START2, 0xAE),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START3, 0x1F),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP1, 0xF7),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP2, 0x13),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP3, 0x00),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP_EN, 0x01),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETI, 0x01),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETI, 0x3B),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETP, 0x0A),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETP, 0x04),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_CNTRL1, 0xCF),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_CNTRL2, 0x61),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PWM_NDIV, 0x4F),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CDR_CONTROL, 0xF2),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CDR_CONTROL_HALF, 0x2A),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CDR_CONTROL_QUARTER, 0x2A),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SIGDET_CNTRL, 0xC0),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SIGDET_CNTRL2, 0x07),
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UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_UFS_CNTRL, 0x18),
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};
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/*
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* This structure represents the qrbtc-v2 specific phy.
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* common_cfg MUST remain the first field in this structure
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* in case extra fields are added. This way, when calling
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* get_ufs_qcom_phy() of generic phy, we can extract the
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* common phy structure (struct ufs_qcom_phy) out of it
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* regardless of the relevant specific phy.
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*/
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struct ufs_qcom_phy_qrbtc_v2 {
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struct ufs_qcom_phy common_cfg;
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};
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#endif
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