722 lines
17 KiB
C
722 lines
17 KiB
C
/* Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regulator/rpm-smd-regulator.h>
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#include <linux/wcnss_wlan.h>
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#include <linux/semaphore.h>
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#include <linux/list.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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static void __iomem *msm_wcnss_base;
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static LIST_HEAD(power_on_lock_list);
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static DEFINE_MUTEX(list_lock);
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static DEFINE_SEMAPHORE(wcnss_power_on_lock);
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static int auto_detect;
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static int is_power_on;
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#define RIVA_PMU_OFFSET 0x28
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#define RIVA_SPARE_OFFSET 0x0b4
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#define PRONTO_SPARE_OFFSET 0x1088
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#define NVBIN_DLND_BIT BIT(25)
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#define PRONTO_IRIS_REG_READ_OFFSET 0x1134
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#define PRONTO_IRIS_REG_CHIP_ID 0x04
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/* IRIS card chip ID's */
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#define WCN3660 0x0200
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#define WCN3660A 0x0300
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#define WCN3660B 0x0400
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#define WCN3620 0x5111
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#define WCN3620A 0x5112
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#define WCN3610 0x9101
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#define WCN3610V1 0x9110
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#define WCNSS_PMU_CFG_IRIS_XO_CFG BIT(3)
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#define WCNSS_PMU_CFG_IRIS_XO_EN BIT(4)
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#define WCNSS_PMU_CFG_IRIS_XO_CFG_STS BIT(6) /* 1: in progress, 0: done */
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#define WCNSS_PMU_CFG_IRIS_RESET BIT(7)
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#define WCNSS_PMU_CFG_IRIS_RESET_STS BIT(8) /* 1: in progress, 0: done */
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#define WCNSS_PMU_CFG_IRIS_XO_READ BIT(9)
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#define WCNSS_PMU_CFG_IRIS_XO_READ_STS BIT(10)
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#define WCNSS_PMU_CFG_IRIS_XO_MODE 0x6
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#define WCNSS_PMU_CFG_IRIS_XO_MODE_48 (3 << 1)
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#define VREG_NULL_CONFIG 0x0000
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#define VREG_GET_REGULATOR_MASK 0x0001
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#define VREG_SET_VOLTAGE_MASK 0x0002
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#define VREG_OPTIMUM_MODE_MASK 0x0004
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#define VREG_ENABLE_MASK 0x0008
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#define VDD_PA "qcom,iris-vddpa"
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#define WCNSS_INVALID_IRIS_REG 0xbaadbaad
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struct vregs_info {
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const char * const name;
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int state;
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struct regulator *regulator;
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};
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/* IRIS regulators for Pronto hardware */
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static struct vregs_info iris_vregs_pronto[] = {
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{"qcom,iris-vddxo", VREG_NULL_CONFIG, NULL},
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{"qcom,iris-vddrfa", VREG_NULL_CONFIG, NULL},
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{"qcom,iris-vddpa", VREG_NULL_CONFIG, NULL},
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{"qcom,iris-vdddig", VREG_NULL_CONFIG, NULL},
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};
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/* WCNSS regulators for Pronto hardware */
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static struct vregs_info pronto_vregs[] = {
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{"qcom,pronto-vddmx", VREG_NULL_CONFIG, NULL},
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{"qcom,pronto-vddcx", VREG_NULL_CONFIG, NULL},
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{"qcom,pronto-vddpx", VREG_NULL_CONFIG, NULL},
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};
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struct host_driver {
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char name[20];
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struct list_head list;
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};
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enum {
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IRIS_3660, /* also 3660A and 3680 */
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IRIS_3620,
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IRIS_3610
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};
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int xo_auto_detect(u32 reg)
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{
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reg >>= 30;
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switch (reg) {
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case IRIS_3660:
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return WCNSS_XO_48MHZ;
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case IRIS_3620:
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return WCNSS_XO_19MHZ;
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case IRIS_3610:
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return WCNSS_XO_19MHZ;
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default:
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return WCNSS_XO_INVALID;
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}
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}
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int wcnss_get_iris_name(char *iris_name)
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{
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struct wcnss_wlan_config *cfg = NULL;
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int iris_id;
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cfg = wcnss_get_wlan_config();
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if (cfg) {
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iris_id = cfg->iris_id;
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iris_id = iris_id >> 16;
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} else {
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return 1;
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}
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switch (iris_id) {
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case WCN3660:
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memcpy(iris_name, "WCN3660", sizeof("WCN3660"));
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break;
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case WCN3660A:
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memcpy(iris_name, "WCN3660A", sizeof("WCN3660A"));
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break;
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case WCN3660B:
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memcpy(iris_name, "WCN3660B", sizeof("WCN3660B"));
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break;
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case WCN3620:
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memcpy(iris_name, "WCN3620", sizeof("WCN3620"));
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break;
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case WCN3620A:
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memcpy(iris_name, "WCN3620A", sizeof("WCN3620A"));
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break;
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case WCN3610:
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memcpy(iris_name, "WCN3610", sizeof("WCN3610"));
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break;
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case WCN3610V1:
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memcpy(iris_name, "WCN3610V1", sizeof("WCN3610V1"));
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break;
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default:
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return 1;
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}
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return 0;
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}
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EXPORT_SYMBOL(wcnss_get_iris_name);
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int validate_iris_chip_id(u32 reg)
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{
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int iris_id;
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iris_id = reg >> 16;
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switch (iris_id) {
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case WCN3660:
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case WCN3660A:
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case WCN3660B:
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case WCN3620:
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case WCN3620A:
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case WCN3610:
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case WCN3610V1:
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return 0;
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default:
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return 1;
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}
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}
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void wcnss_iris_reset(u32 reg, void __iomem *pmu_conf_reg)
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{
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/* Reset IRIS */
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reg |= WCNSS_PMU_CFG_IRIS_RESET;
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writel_relaxed(reg, pmu_conf_reg);
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/* Wait for PMU_CFG.iris_reg_reset_sts */
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while (readl_relaxed(pmu_conf_reg) &
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WCNSS_PMU_CFG_IRIS_RESET_STS)
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cpu_relax();
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/* Reset iris reset bit */
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reg &= ~WCNSS_PMU_CFG_IRIS_RESET;
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writel_relaxed(reg, pmu_conf_reg);
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}
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static int
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configure_iris_xo(struct device *dev,
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struct wcnss_wlan_config *cfg,
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int on, int *iris_xo_set)
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{
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u32 reg = 0, i = 0;
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u32 iris_reg = WCNSS_INVALID_IRIS_REG;
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int rc = 0;
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int pmu_offset = 0;
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int spare_offset = 0;
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void __iomem *pmu_conf_reg;
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void __iomem *spare_reg;
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void __iomem *iris_read_reg;
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struct clk *clk;
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struct clk *clk_rf = NULL;
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bool use_48mhz_xo;
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use_48mhz_xo = cfg->use_48mhz_xo;
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if (wcnss_hardware_type() == WCNSS_PRONTO_HW) {
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pmu_offset = PRONTO_PMU_OFFSET;
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spare_offset = PRONTO_SPARE_OFFSET;
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clk = clk_get(dev, "xo");
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if (IS_ERR(clk)) {
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pr_err("Couldn't get xo clock\n");
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return PTR_ERR(clk);
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}
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} else {
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pmu_offset = RIVA_PMU_OFFSET;
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spare_offset = RIVA_SPARE_OFFSET;
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clk = clk_get(dev, "cxo");
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if (IS_ERR(clk)) {
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pr_err("Couldn't get cxo clock\n");
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return PTR_ERR(clk);
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}
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}
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if (on) {
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msm_wcnss_base = cfg->msm_wcnss_base;
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if (!msm_wcnss_base) {
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pr_err("ioremap wcnss physical failed\n");
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goto fail;
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}
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/* Enable IRIS XO */
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rc = clk_prepare_enable(clk);
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if (rc) {
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pr_err("clk enable failed\n");
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goto fail;
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}
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/* NV bit is set to indicate that platform driver is capable
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* of doing NV download.
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*/
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pr_debug("wcnss: Indicate NV bin download\n");
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spare_reg = msm_wcnss_base + spare_offset;
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reg = readl_relaxed(spare_reg);
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reg |= NVBIN_DLND_BIT;
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writel_relaxed(reg, spare_reg);
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pmu_conf_reg = msm_wcnss_base + pmu_offset;
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writel_relaxed(0, pmu_conf_reg);
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reg = readl_relaxed(pmu_conf_reg);
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reg |= WCNSS_PMU_CFG_GC_BUS_MUX_SEL_TOP |
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WCNSS_PMU_CFG_IRIS_XO_EN;
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writel_relaxed(reg, pmu_conf_reg);
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if (wcnss_xo_auto_detect_enabled()) {
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iris_read_reg = msm_wcnss_base +
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PRONTO_IRIS_REG_READ_OFFSET;
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iris_reg = readl_relaxed(iris_read_reg);
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}
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wcnss_iris_reset(reg, pmu_conf_reg);
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if (iris_reg != WCNSS_INVALID_IRIS_REG) {
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iris_reg &= 0xffff;
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iris_reg |= PRONTO_IRIS_REG_CHIP_ID;
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writel_relaxed(iris_reg, iris_read_reg);
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do {
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/* Iris read */
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reg = readl_relaxed(pmu_conf_reg);
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reg |= WCNSS_PMU_CFG_IRIS_XO_READ;
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writel_relaxed(reg, pmu_conf_reg);
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/* Wait for PMU_CFG.iris_reg_read_sts */
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while (readl_relaxed(pmu_conf_reg) &
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WCNSS_PMU_CFG_IRIS_XO_READ_STS)
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cpu_relax();
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iris_reg = readl_relaxed(iris_read_reg);
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pr_info("wcnss: IRIS Reg: %08x\n", iris_reg);
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if (validate_iris_chip_id(iris_reg) && i >= 4) {
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pr_info("wcnss: IRIS Card absent/invalid\n");
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auto_detect = WCNSS_XO_INVALID;
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/* Reset iris read bit */
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reg &= ~WCNSS_PMU_CFG_IRIS_XO_READ;
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/* Clear XO_MODE[b2:b1] bits.
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* Clear implies 19.2 MHz TCXO
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*/
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reg &= ~(WCNSS_PMU_CFG_IRIS_XO_MODE);
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goto xo_configure;
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} else if (!validate_iris_chip_id(iris_reg)) {
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pr_debug("wcnss: IRIS Card is present\n");
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break;
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}
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reg &= ~WCNSS_PMU_CFG_IRIS_XO_READ;
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writel_relaxed(reg, pmu_conf_reg);
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wcnss_iris_reset(reg, pmu_conf_reg);
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} while (i++ < 5);
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auto_detect = xo_auto_detect(iris_reg);
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/* Reset iris read bit */
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reg &= ~WCNSS_PMU_CFG_IRIS_XO_READ;
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} else if (wcnss_xo_auto_detect_enabled())
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/* Default to 48 MHZ */
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auto_detect = WCNSS_XO_48MHZ;
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else
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auto_detect = WCNSS_XO_INVALID;
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cfg->iris_id = iris_reg;
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/* Clear XO_MODE[b2:b1] bits. Clear implies 19.2 MHz TCXO */
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reg &= ~(WCNSS_PMU_CFG_IRIS_XO_MODE);
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if ((use_48mhz_xo && auto_detect == WCNSS_XO_INVALID)
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|| auto_detect == WCNSS_XO_48MHZ) {
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reg |= WCNSS_PMU_CFG_IRIS_XO_MODE_48;
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if (iris_xo_set)
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*iris_xo_set = WCNSS_XO_48MHZ;
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}
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xo_configure:
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writel_relaxed(reg, pmu_conf_reg);
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wcnss_iris_reset(reg, pmu_conf_reg);
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/* Start IRIS XO configuration */
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reg |= WCNSS_PMU_CFG_IRIS_XO_CFG;
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writel_relaxed(reg, pmu_conf_reg);
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/* Wait for XO configuration to finish */
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while (readl_relaxed(pmu_conf_reg) &
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WCNSS_PMU_CFG_IRIS_XO_CFG_STS)
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cpu_relax();
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/* Stop IRIS XO configuration */
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reg &= ~(WCNSS_PMU_CFG_GC_BUS_MUX_SEL_TOP |
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WCNSS_PMU_CFG_IRIS_XO_CFG);
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writel_relaxed(reg, pmu_conf_reg);
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clk_disable_unprepare(clk);
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if ((!use_48mhz_xo && auto_detect == WCNSS_XO_INVALID)
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|| auto_detect == WCNSS_XO_19MHZ) {
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clk_rf = clk_get(dev, "rf_clk");
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if (IS_ERR(clk_rf)) {
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pr_err("Couldn't get rf_clk\n");
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goto fail;
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}
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rc = clk_prepare_enable(clk_rf);
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if (rc) {
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pr_err("clk_rf enable failed\n");
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goto fail;
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}
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if (iris_xo_set)
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*iris_xo_set = WCNSS_XO_19MHZ;
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}
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} else if ((!use_48mhz_xo && auto_detect == WCNSS_XO_INVALID)
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|| auto_detect == WCNSS_XO_19MHZ) {
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clk_rf = clk_get(dev, "rf_clk");
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if (IS_ERR(clk_rf)) {
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pr_err("Couldn't get rf_clk\n");
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goto fail;
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}
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clk_disable_unprepare(clk_rf);
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}
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/* Add some delay for XO to settle */
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msleep(20);
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fail:
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clk_put(clk);
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if (clk_rf != NULL)
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clk_put(clk_rf);
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return rc;
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}
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/* Helper routine to turn off all WCNSS & IRIS vregs */
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static void wcnss_vregs_off(struct vregs_info regulators[], uint size,
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struct vregs_level *voltage_level)
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{
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int i, rc = 0;
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struct wcnss_wlan_config *cfg;
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cfg = wcnss_get_wlan_config();
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if (!cfg) {
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pr_err("Failed to get WLAN configuration\n");
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return;
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}
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/* Regulators need to be turned off in the reverse order */
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for (i = (size-1); i >= 0; i--) {
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if (regulators[i].state == VREG_NULL_CONFIG)
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continue;
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/* Remove PWM mode */
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if (regulators[i].state & VREG_OPTIMUM_MODE_MASK) {
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rc = regulator_set_optimum_mode(
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regulators[i].regulator, 0);
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if (rc < 0)
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pr_err("regulator_set_optimum_mode(%s) failed (%d)\n",
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regulators[i].name, rc);
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}
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/* Set voltage to lowest level */
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if (regulators[i].state & VREG_SET_VOLTAGE_MASK) {
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if (cfg->is_pronto_vadc) {
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if (cfg->vbatt < WCNSS_VBATT_THRESHOLD &&
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!memcmp(regulators[i].name,
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VDD_PA, sizeof(VDD_PA))) {
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voltage_level[i].max_voltage =
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WCNSS_VBATT_LOW;
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}
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}
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rc = regulator_set_voltage(regulators[i].regulator,
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voltage_level[i].low_power_min,
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voltage_level[i].max_voltage);
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if (rc)
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pr_err("regulator_set_voltage(%s) failed (%d)\n",
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regulators[i].name, rc);
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}
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/* Disable regulator */
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if (regulators[i].state & VREG_ENABLE_MASK) {
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rc = regulator_disable(regulators[i].regulator);
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if (rc < 0)
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pr_err("vreg %s disable failed (%d)\n",
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regulators[i].name, rc);
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}
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/* Free the regulator source */
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if (regulators[i].state & VREG_GET_REGULATOR_MASK)
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regulator_put(regulators[i].regulator);
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regulators[i].state = VREG_NULL_CONFIG;
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}
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}
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/* Common helper routine to turn on all WCNSS & IRIS vregs */
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static int wcnss_vregs_on(struct device *dev,
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struct vregs_info regulators[], uint size,
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struct vregs_level *voltage_level)
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{
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int i, rc = 0, reg_cnt;
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struct wcnss_wlan_config *cfg;
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cfg = wcnss_get_wlan_config();
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if (!cfg) {
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pr_err("Failed to get WLAN configuration\n");
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return -EINVAL;
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}
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for (i = 0; i < size; i++) {
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/* Get regulator source */
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regulators[i].regulator =
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regulator_get(dev, regulators[i].name);
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if (IS_ERR(regulators[i].regulator)) {
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rc = PTR_ERR(regulators[i].regulator);
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pr_err("regulator get of %s failed (%d)\n",
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regulators[i].name, rc);
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goto fail;
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}
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regulators[i].state |= VREG_GET_REGULATOR_MASK;
|
|
reg_cnt = regulator_count_voltages(regulators[i].regulator);
|
|
|
|
/* Set voltage to nominal. Exclude swtiches e.g. LVS */
|
|
if ((voltage_level[i].nominal_min ||
|
|
voltage_level[i].max_voltage) && (reg_cnt > 0)) {
|
|
if (cfg->is_pronto_vadc) {
|
|
if (cfg->vbatt < WCNSS_VBATT_THRESHOLD &&
|
|
!memcmp(regulators[i].name,
|
|
VDD_PA, sizeof(VDD_PA))) {
|
|
voltage_level[i].nominal_min =
|
|
WCNSS_VBATT_INITIAL;
|
|
voltage_level[i].max_voltage =
|
|
WCNSS_VBATT_LOW;
|
|
}
|
|
}
|
|
|
|
rc = regulator_set_voltage(regulators[i].regulator,
|
|
voltage_level[i].nominal_min,
|
|
voltage_level[i].max_voltage);
|
|
|
|
if (rc) {
|
|
pr_err("regulator_set_voltage(%s) failed (%d)\n",
|
|
regulators[i].name, rc);
|
|
goto fail;
|
|
}
|
|
regulators[i].state |= VREG_SET_VOLTAGE_MASK;
|
|
}
|
|
|
|
/* Vote for PWM/PFM mode if needed */
|
|
if (voltage_level[i].uA_load && (reg_cnt > 0)) {
|
|
rc = regulator_set_optimum_mode(regulators[i].regulator,
|
|
voltage_level[i].uA_load);
|
|
if (rc < 0) {
|
|
pr_err("regulator_set_optimum_mode(%s) failed (%d)\n",
|
|
regulators[i].name, rc);
|
|
goto fail;
|
|
}
|
|
regulators[i].state |= VREG_OPTIMUM_MODE_MASK;
|
|
}
|
|
|
|
/* Enable the regulator */
|
|
rc = regulator_enable(regulators[i].regulator);
|
|
if (rc) {
|
|
pr_err("vreg %s enable failed (%d)\n",
|
|
regulators[i].name, rc);
|
|
goto fail;
|
|
}
|
|
regulators[i].state |= VREG_ENABLE_MASK;
|
|
}
|
|
|
|
return rc;
|
|
|
|
fail:
|
|
wcnss_vregs_off(regulators, size, voltage_level);
|
|
return rc;
|
|
|
|
}
|
|
|
|
static void wcnss_iris_vregs_off(enum wcnss_hw_type hw_type,
|
|
struct wcnss_wlan_config *cfg)
|
|
{
|
|
switch (hw_type) {
|
|
case WCNSS_PRONTO_HW:
|
|
wcnss_vregs_off(iris_vregs_pronto,
|
|
ARRAY_SIZE(iris_vregs_pronto),
|
|
cfg->iris_vlevel);
|
|
break;
|
|
default:
|
|
pr_err("%s invalid hardware %d\n", __func__, hw_type);
|
|
|
|
}
|
|
}
|
|
|
|
static int wcnss_iris_vregs_on(struct device *dev,
|
|
enum wcnss_hw_type hw_type,
|
|
struct wcnss_wlan_config *cfg)
|
|
{
|
|
int ret = -1;
|
|
|
|
switch (hw_type) {
|
|
case WCNSS_PRONTO_HW:
|
|
ret = wcnss_vregs_on(dev, iris_vregs_pronto,
|
|
ARRAY_SIZE(iris_vregs_pronto),
|
|
cfg->iris_vlevel);
|
|
break;
|
|
default:
|
|
pr_err("%s invalid hardware %d\n", __func__, hw_type);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void wcnss_core_vregs_off(enum wcnss_hw_type hw_type,
|
|
struct wcnss_wlan_config *cfg)
|
|
{
|
|
switch (hw_type) {
|
|
case WCNSS_PRONTO_HW:
|
|
wcnss_vregs_off(pronto_vregs,
|
|
ARRAY_SIZE(pronto_vregs), cfg->pronto_vlevel);
|
|
break;
|
|
default:
|
|
pr_err("%s invalid hardware %d\n", __func__, hw_type);
|
|
}
|
|
|
|
}
|
|
|
|
static int wcnss_core_vregs_on(struct device *dev,
|
|
enum wcnss_hw_type hw_type,
|
|
struct wcnss_wlan_config *cfg)
|
|
{
|
|
int ret = -1;
|
|
|
|
switch (hw_type) {
|
|
case WCNSS_PRONTO_HW:
|
|
ret = wcnss_vregs_on(dev, pronto_vregs,
|
|
ARRAY_SIZE(pronto_vregs),
|
|
cfg->pronto_vlevel);
|
|
break;
|
|
default:
|
|
pr_err("%s invalid hardware %d\n", __func__, hw_type);
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
int wcnss_wlan_power(struct device *dev,
|
|
struct wcnss_wlan_config *cfg,
|
|
enum wcnss_opcode on, int *iris_xo_set)
|
|
{
|
|
int rc = 0;
|
|
enum wcnss_hw_type hw_type = wcnss_hardware_type();
|
|
|
|
down(&wcnss_power_on_lock);
|
|
if (on) {
|
|
/* RIVA regulator settings */
|
|
rc = wcnss_core_vregs_on(dev, hw_type,
|
|
cfg);
|
|
if (rc)
|
|
goto fail_wcnss_on;
|
|
|
|
/* IRIS regulator settings */
|
|
rc = wcnss_iris_vregs_on(dev, hw_type,
|
|
cfg);
|
|
if (rc)
|
|
goto fail_iris_on;
|
|
|
|
/* Configure IRIS XO */
|
|
rc = configure_iris_xo(dev, cfg,
|
|
WCNSS_WLAN_SWITCH_ON, iris_xo_set);
|
|
if (rc)
|
|
goto fail_iris_xo;
|
|
|
|
is_power_on = true;
|
|
|
|
} else if (is_power_on) {
|
|
is_power_on = false;
|
|
configure_iris_xo(dev, cfg,
|
|
WCNSS_WLAN_SWITCH_OFF, NULL);
|
|
wcnss_iris_vregs_off(hw_type, cfg);
|
|
wcnss_core_vregs_off(hw_type, cfg);
|
|
}
|
|
|
|
up(&wcnss_power_on_lock);
|
|
return rc;
|
|
|
|
fail_iris_xo:
|
|
wcnss_iris_vregs_off(hw_type, cfg);
|
|
|
|
fail_iris_on:
|
|
wcnss_core_vregs_off(hw_type, cfg);
|
|
|
|
fail_wcnss_on:
|
|
up(&wcnss_power_on_lock);
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(wcnss_wlan_power);
|
|
|
|
/*
|
|
* During SSR WCNSS should not be 'powered on' until all the host drivers
|
|
* finish their shutdown routines. Host drivers use below APIs to
|
|
* synchronize power-on. WCNSS will not be 'powered on' until all the
|
|
* requests(to lock power-on) are freed.
|
|
*/
|
|
int wcnss_req_power_on_lock(char *driver_name)
|
|
{
|
|
struct host_driver *node;
|
|
|
|
if (!driver_name)
|
|
goto err;
|
|
|
|
node = kmalloc(sizeof(struct host_driver), GFP_KERNEL);
|
|
if (!node)
|
|
goto err;
|
|
strlcpy(node->name, driver_name, sizeof(node->name));
|
|
|
|
mutex_lock(&list_lock);
|
|
/* Lock when the first request is added */
|
|
if (list_empty(&power_on_lock_list))
|
|
down(&wcnss_power_on_lock);
|
|
list_add(&node->list, &power_on_lock_list);
|
|
mutex_unlock(&list_lock);
|
|
|
|
return 0;
|
|
|
|
err:
|
|
return -EINVAL;
|
|
}
|
|
EXPORT_SYMBOL(wcnss_req_power_on_lock);
|
|
|
|
int wcnss_free_power_on_lock(char *driver_name)
|
|
{
|
|
int ret = -1;
|
|
struct host_driver *node;
|
|
|
|
mutex_lock(&list_lock);
|
|
list_for_each_entry(node, &power_on_lock_list, list) {
|
|
if (!strncmp(node->name, driver_name, sizeof(node->name))) {
|
|
list_del(&node->list);
|
|
kfree(node);
|
|
ret = 0;
|
|
break;
|
|
}
|
|
}
|
|
/* unlock when the last host driver frees the lock */
|
|
if (list_empty(&power_on_lock_list))
|
|
up(&wcnss_power_on_lock);
|
|
mutex_unlock(&list_lock);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(wcnss_free_power_on_lock);
|