482 lines
11 KiB
C
482 lines
11 KiB
C
/*
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* Mac80211 SPI driver for ST-Ericsson CW1200 device
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*
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* Copyright (c) 2011, Sagrad Inc.
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* Author: Solomon Peachy <speachy@sagrad.com>
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*
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* Based on cw1200_sdio.c
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* Copyright (c) 2010, ST-Ericsson
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* Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <net/mac80211.h>
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#include <linux/spi/spi.h>
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#include <linux/device.h>
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#include "cw1200.h"
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#include "hwbus.h"
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#include <linux/platform_data/net-cw1200.h>
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#include "hwio.h"
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MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
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MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("spi:cw1200_wlan_spi");
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/* #define SPI_DEBUG */
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struct hwbus_priv {
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struct spi_device *func;
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struct cw1200_common *core;
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const struct cw1200_platform_data_spi *pdata;
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spinlock_t lock; /* Serialize all bus operations */
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wait_queue_head_t wq;
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int claimed;
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};
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#define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
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#define SET_WRITE 0x7FFF /* usage: and operation */
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#define SET_READ 0x8000 /* usage: or operation */
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/* Notes on byte ordering:
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LE: B0 B1 B2 B3
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BE: B3 B2 B1 B0
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Hardware expects 32-bit data to be written as 16-bit BE words:
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B1 B0 B3 B2
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*/
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static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
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unsigned int addr,
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void *dst, int count)
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{
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int ret, i;
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u16 regaddr;
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struct spi_message m;
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struct spi_transfer t_addr = {
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.tx_buf = ®addr,
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.len = sizeof(regaddr),
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};
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struct spi_transfer t_msg = {
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.rx_buf = dst,
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.len = count,
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};
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regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
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regaddr |= SET_READ;
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regaddr |= (count>>1);
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#ifdef SPI_DEBUG
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pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
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#endif
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/* Header is LE16 */
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regaddr = cpu_to_le16(regaddr);
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/* We have to byteswap if the SPI bus is limited to 8b operation
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or we are running on a Big Endian system
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*/
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#if defined(__LITTLE_ENDIAN)
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if (self->func->bits_per_word == 8)
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#endif
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regaddr = swab16(regaddr);
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spi_message_init(&m);
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spi_message_add_tail(&t_addr, &m);
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spi_message_add_tail(&t_msg, &m);
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ret = spi_sync(self->func, &m);
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#ifdef SPI_DEBUG
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pr_info("READ : ");
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for (i = 0; i < t_addr.len; i++)
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printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
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printk(" : ");
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for (i = 0; i < t_msg.len; i++)
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printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
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printk("\n");
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#endif
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/* We have to byteswap if the SPI bus is limited to 8b operation
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or we are running on a Big Endian system
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*/
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#if defined(__LITTLE_ENDIAN)
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if (self->func->bits_per_word == 8)
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#endif
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{
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uint16_t *buf = (uint16_t *)dst;
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for (i = 0; i < ((count + 1) >> 1); i++)
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buf[i] = swab16(buf[i]);
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}
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return ret;
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}
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static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
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unsigned int addr,
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const void *src, int count)
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{
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int rval, i;
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u16 regaddr;
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struct spi_transfer t_addr = {
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.tx_buf = ®addr,
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.len = sizeof(regaddr),
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};
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struct spi_transfer t_msg = {
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.tx_buf = src,
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.len = count,
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};
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struct spi_message m;
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regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
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regaddr &= SET_WRITE;
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regaddr |= (count>>1);
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#ifdef SPI_DEBUG
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pr_info("WRITE: %04d to 0x%02x (%04x)\n", count, addr, regaddr);
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#endif
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/* Header is LE16 */
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regaddr = cpu_to_le16(regaddr);
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/* We have to byteswap if the SPI bus is limited to 8b operation
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or we are running on a Big Endian system
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*/
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#if defined(__LITTLE_ENDIAN)
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if (self->func->bits_per_word == 8)
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#endif
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{
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uint16_t *buf = (uint16_t *)src;
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regaddr = swab16(regaddr);
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for (i = 0; i < ((count + 1) >> 1); i++)
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buf[i] = swab16(buf[i]);
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}
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#ifdef SPI_DEBUG
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pr_info("WRITE: ");
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for (i = 0; i < t_addr.len; i++)
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printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
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printk(" : ");
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for (i = 0; i < t_msg.len; i++)
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printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
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printk("\n");
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#endif
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spi_message_init(&m);
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spi_message_add_tail(&t_addr, &m);
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spi_message_add_tail(&t_msg, &m);
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rval = spi_sync(self->func, &m);
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#ifdef SPI_DEBUG
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pr_info("WROTE: %d\n", m.actual_length);
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#endif
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#if defined(__LITTLE_ENDIAN)
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/* We have to byteswap if the SPI bus is limited to 8b operation */
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if (self->func->bits_per_word == 8)
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#endif
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{
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uint16_t *buf = (uint16_t *)src;
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for (i = 0; i < ((count + 1) >> 1); i++)
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buf[i] = swab16(buf[i]);
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}
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return rval;
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}
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static void cw1200_spi_lock(struct hwbus_priv *self)
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{
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unsigned long flags;
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DECLARE_WAITQUEUE(wait, current);
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might_sleep();
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add_wait_queue(&self->wq, &wait);
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spin_lock_irqsave(&self->lock, flags);
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while (1) {
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set_current_state(TASK_UNINTERRUPTIBLE);
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if (!self->claimed)
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break;
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spin_unlock_irqrestore(&self->lock, flags);
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schedule();
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spin_lock_irqsave(&self->lock, flags);
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}
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set_current_state(TASK_RUNNING);
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self->claimed = 1;
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spin_unlock_irqrestore(&self->lock, flags);
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remove_wait_queue(&self->wq, &wait);
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return;
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}
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static void cw1200_spi_unlock(struct hwbus_priv *self)
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{
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unsigned long flags;
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spin_lock_irqsave(&self->lock, flags);
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self->claimed = 0;
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spin_unlock_irqrestore(&self->lock, flags);
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wake_up(&self->wq);
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return;
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}
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static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
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{
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struct hwbus_priv *self = dev_id;
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if (self->core) {
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cw1200_spi_lock(self);
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cw1200_irq_handler(self->core);
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cw1200_spi_unlock(self);
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return IRQ_HANDLED;
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} else {
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return IRQ_NONE;
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}
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}
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static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
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{
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int ret;
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pr_debug("SW IRQ subscribe\n");
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ret = request_threaded_irq(self->func->irq, NULL,
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cw1200_spi_irq_handler,
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IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
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"cw1200_wlan_irq", self);
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if (WARN_ON(ret < 0))
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goto exit;
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ret = enable_irq_wake(self->func->irq);
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if (WARN_ON(ret))
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goto free_irq;
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return 0;
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free_irq:
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free_irq(self->func->irq, self);
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exit:
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return ret;
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}
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static int cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
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{
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int ret = 0;
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pr_debug("SW IRQ unsubscribe\n");
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disable_irq_wake(self->func->irq);
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free_irq(self->func->irq, self);
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return ret;
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}
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static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata)
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{
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if (pdata->reset) {
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gpio_set_value(pdata->reset, 0);
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msleep(30); /* Min is 2 * CLK32K cycles */
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gpio_free(pdata->reset);
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}
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if (pdata->power_ctrl)
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pdata->power_ctrl(pdata, false);
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if (pdata->clk_ctrl)
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pdata->clk_ctrl(pdata, false);
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return 0;
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}
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static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata)
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{
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/* Ensure I/Os are pulled low */
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if (pdata->reset) {
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gpio_request(pdata->reset, "cw1200_wlan_reset");
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gpio_direction_output(pdata->reset, 0);
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}
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if (pdata->powerup) {
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gpio_request(pdata->powerup, "cw1200_wlan_powerup");
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gpio_direction_output(pdata->powerup, 0);
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}
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if (pdata->reset || pdata->powerup)
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msleep(10); /* Settle time? */
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/* Enable 3v3 and 1v8 to hardware */
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if (pdata->power_ctrl) {
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if (pdata->power_ctrl(pdata, true)) {
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pr_err("power_ctrl() failed!\n");
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return -1;
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}
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}
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/* Enable CLK32K */
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if (pdata->clk_ctrl) {
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if (pdata->clk_ctrl(pdata, true)) {
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pr_err("clk_ctrl() failed!\n");
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return -1;
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}
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msleep(10); /* Delay until clock is stable for 2 cycles */
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}
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/* Enable POWERUP signal */
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if (pdata->powerup) {
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gpio_set_value(pdata->powerup, 1);
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msleep(250); /* or more..? */
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}
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/* Enable RSTn signal */
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if (pdata->reset) {
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gpio_set_value(pdata->reset, 1);
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msleep(50); /* Or more..? */
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}
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return 0;
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}
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static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
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{
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return size & 1 ? size + 1 : size;
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}
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static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
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{
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return irq_set_irq_wake(self->func->irq, suspend);
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}
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static struct hwbus_ops cw1200_spi_hwbus_ops = {
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.hwbus_memcpy_fromio = cw1200_spi_memcpy_fromio,
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.hwbus_memcpy_toio = cw1200_spi_memcpy_toio,
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.lock = cw1200_spi_lock,
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.unlock = cw1200_spi_unlock,
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.align_size = cw1200_spi_align_size,
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.power_mgmt = cw1200_spi_pm,
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};
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/* Probe Function to be called by SPI stack when device is discovered */
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static int cw1200_spi_probe(struct spi_device *func)
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{
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const struct cw1200_platform_data_spi *plat_data =
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dev_get_platdata(&func->dev);
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struct hwbus_priv *self;
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int status;
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/* Sanity check speed */
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if (func->max_speed_hz > 52000000)
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func->max_speed_hz = 52000000;
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if (func->max_speed_hz < 1000000)
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func->max_speed_hz = 1000000;
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/* Fix up transfer size */
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if (plat_data->spi_bits_per_word)
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func->bits_per_word = plat_data->spi_bits_per_word;
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if (!func->bits_per_word)
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func->bits_per_word = 16;
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/* And finally.. */
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func->mode = SPI_MODE_0;
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pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
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func->chip_select, func->mode, func->bits_per_word,
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func->max_speed_hz);
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if (cw1200_spi_on(plat_data)) {
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pr_err("spi_on() failed!\n");
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return -1;
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}
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if (spi_setup(func)) {
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pr_err("spi_setup() failed!\n");
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return -1;
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}
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self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL);
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if (!self) {
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pr_err("Can't allocate SPI hwbus_priv.");
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return -ENOMEM;
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}
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self->pdata = plat_data;
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self->func = func;
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spin_lock_init(&self->lock);
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spi_set_drvdata(func, self);
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init_waitqueue_head(&self->wq);
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status = cw1200_spi_irq_subscribe(self);
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status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
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self, &func->dev, &self->core,
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self->pdata->ref_clk,
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self->pdata->macaddr,
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self->pdata->sdd_file,
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self->pdata->have_5ghz);
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if (status) {
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cw1200_spi_irq_unsubscribe(self);
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cw1200_spi_off(plat_data);
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}
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return status;
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}
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/* Disconnect Function to be called by SPI stack when device is disconnected */
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static int cw1200_spi_disconnect(struct spi_device *func)
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{
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struct hwbus_priv *self = spi_get_drvdata(func);
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if (self) {
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cw1200_spi_irq_unsubscribe(self);
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if (self->core) {
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cw1200_core_release(self->core);
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self->core = NULL;
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}
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}
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cw1200_spi_off(dev_get_platdata(&func->dev));
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return 0;
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}
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#ifdef CONFIG_PM
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static int cw1200_spi_suspend(struct device *dev, pm_message_t state)
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{
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struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
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if (!cw1200_can_suspend(self->core))
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return -EAGAIN;
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/* XXX notify host that we have to keep CW1200 powered on? */
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return 0;
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}
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static int cw1200_spi_resume(struct device *dev)
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{
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return 0;
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}
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#endif
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static struct spi_driver spi_driver = {
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.probe = cw1200_spi_probe,
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.remove = cw1200_spi_disconnect,
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.driver = {
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.name = "cw1200_wlan_spi",
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.bus = &spi_bus_type,
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.owner = THIS_MODULE,
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#ifdef CONFIG_PM
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.suspend = cw1200_spi_suspend,
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.resume = cw1200_spi_resume,
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#endif
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},
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};
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module_spi_driver(spi_driver);
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