191 lines
5.5 KiB
C
191 lines
5.5 KiB
C
/* Qualcomm Crypto Engine driver API
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*
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* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __CRYPTO_MSM_QCE_H
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#define __CRYPTO_MSM_QCE_H
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#include <linux/types.h>
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#include <linux/platform_device.h>
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#include <linux/crypto.h>
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#include <crypto/algapi.h>
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#include <crypto/aes.h>
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#include <crypto/des.h>
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#include <crypto/sha.h>
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#include <crypto/aead.h>
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#include <crypto/authenc.h>
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#include <crypto/scatterwalk.h>
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/* SHA digest size in bytes */
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#define SHA256_DIGESTSIZE 32
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#define SHA1_DIGESTSIZE 20
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#define AES_CE_BLOCK_SIZE 16
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/* key size in bytes */
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#define HMAC_KEY_SIZE (SHA1_DIGESTSIZE) /* hmac-sha1 */
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#define SHA_HMAC_KEY_SIZE 64
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#define DES_KEY_SIZE 8
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#define TRIPLE_DES_KEY_SIZE 24
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#define AES128_KEY_SIZE 16
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#define AES192_KEY_SIZE 24
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#define AES256_KEY_SIZE 32
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#define MAX_CIPHER_KEY_SIZE AES256_KEY_SIZE
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/* iv length in bytes */
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#define AES_IV_LENGTH 16
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#define DES_IV_LENGTH 8
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#define MAX_IV_LENGTH AES_IV_LENGTH
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/* Maximum number of bytes per transfer */
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#define QCE_MAX_OPER_DATA 0xFF00
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/* Maximum Nonce bytes */
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#define MAX_NONCE 16
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typedef void (*qce_comp_func_ptr_t)(void *areq,
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unsigned char *icv, unsigned char *iv, int ret);
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/* Cipher algorithms supported */
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enum qce_cipher_alg_enum {
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CIPHER_ALG_DES = 0,
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CIPHER_ALG_3DES = 1,
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CIPHER_ALG_AES = 2,
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CIPHER_ALG_LAST
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};
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/* Hash and hmac algorithms supported */
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enum qce_hash_alg_enum {
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QCE_HASH_SHA1 = 0,
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QCE_HASH_SHA256 = 1,
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QCE_HASH_SHA1_HMAC = 2,
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QCE_HASH_SHA256_HMAC = 3,
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QCE_HASH_AES_CMAC = 4,
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QCE_HASH_LAST
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};
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/* Cipher encryption/decryption operations */
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enum qce_cipher_dir_enum {
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QCE_ENCRYPT = 0,
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QCE_DECRYPT = 1,
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QCE_CIPHER_DIR_LAST
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};
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/* Cipher algorithms modes */
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enum qce_cipher_mode_enum {
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QCE_MODE_CBC = 0,
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QCE_MODE_ECB = 1,
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QCE_MODE_CTR = 2,
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QCE_MODE_XTS = 3,
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QCE_MODE_CCM = 4,
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QCE_CIPHER_MODE_LAST
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};
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/* Cipher operation type */
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enum qce_req_op_enum {
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QCE_REQ_ABLK_CIPHER = 0,
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QCE_REQ_ABLK_CIPHER_NO_KEY = 1,
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QCE_REQ_AEAD = 2,
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QCE_REQ_LAST
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};
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/* Algorithms/features supported in CE HW engine */
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struct ce_hw_support {
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bool sha1_hmac_20; /* Supports 20 bytes of HMAC key*/
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bool sha1_hmac; /* supports max HMAC key of 64 bytes*/
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bool sha256_hmac; /* supports max HMAC key of 64 bytes*/
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bool sha_hmac; /* supports SHA1 and SHA256 MAX HMAC key of 64 bytes*/
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bool cmac;
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bool aes_key_192;
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bool aes_xts;
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bool aes_ccm;
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bool ota;
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bool aligned_only;
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bool bam;
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bool is_shared;
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bool hw_key;
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bool use_sw_aes_cbc_ecb_ctr_algo;
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bool use_sw_aead_algo;
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bool use_sw_aes_xts_algo;
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bool use_sw_ahash_algo;
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bool use_sw_hmac_algo;
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bool use_sw_aes_ccm_algo;
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bool clk_mgmt_sus_res;
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unsigned int ce_device;
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unsigned int ce_hw_instance;
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unsigned int max_request;
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};
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/* Sha operation parameters */
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struct qce_sha_req {
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qce_comp_func_ptr_t qce_cb; /* call back */
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enum qce_hash_alg_enum alg; /* sha algorithm */
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unsigned char *digest; /* sha digest */
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struct scatterlist *src; /* pointer to scatter list entry */
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uint32_t auth_data[4]; /* byte count */
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unsigned char *authkey; /* auth key */
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unsigned int authklen; /* auth key length */
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bool first_blk; /* first block indicator */
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bool last_blk; /* last block indicator */
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unsigned int size; /* data length in bytes */
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void *areq;
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unsigned int flags;
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};
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struct qce_req {
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enum qce_req_op_enum op; /* operation type */
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qce_comp_func_ptr_t qce_cb; /* call back */
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void *areq;
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enum qce_cipher_alg_enum alg; /* cipher algorithms*/
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enum qce_cipher_dir_enum dir; /* encryption? decryption? */
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enum qce_cipher_mode_enum mode; /* algorithm mode */
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enum qce_hash_alg_enum auth_alg;/* authentication algorithm for aead */
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unsigned char *authkey; /* authentication key */
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unsigned int authklen; /* authentication key kength */
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unsigned int authsize; /* authentication key kength */
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unsigned char nonce[MAX_NONCE];/* nonce for ccm mode */
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unsigned char *assoc; /* Ptr to formatted associated data */
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unsigned int assoclen; /* Formatted associated data length */
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struct scatterlist *asg; /* Formatted associated data sg */
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unsigned char *enckey; /* cipher key */
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unsigned int encklen; /* cipher key length */
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unsigned char *iv; /* initialization vector */
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unsigned int ivsize; /* initialization vector size*/
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unsigned int cryptlen; /* data length */
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unsigned int use_pmem; /* is source of data PMEM allocated? */
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struct qcedev_pmem_info *pmem; /* pointer to pmem_info structure*/
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unsigned int flags;
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};
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struct qce_pm_table {
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int (*suspend)(void *handle);
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int (*resume)(void *handle);
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};
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extern struct qce_pm_table qce_pm_table;
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void *qce_open(struct platform_device *pdev, int *rc);
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int qce_close(void *handle);
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int qce_aead_req(void *handle, struct qce_req *req);
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int qce_ablk_cipher_req(void *handle, struct qce_req *req);
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int qce_hw_support(void *handle, struct ce_hw_support *support);
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int qce_process_sha_req(void *handle, struct qce_sha_req *s_req);
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int qce_enable_clk(void *handle);
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int qce_disable_clk(void *handle);
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void qce_get_driver_stats(void *handle);
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void qce_clear_driver_stats(void *handle);
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#endif /* __CRYPTO_MSM_QCE_H */
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