304 lines
6.5 KiB
C
304 lines
6.5 KiB
C
/*
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*
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* arch/xtensa/platform/xtavnet/setup.c
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*
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* ...
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*
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* Authors: Chris Zankel <chris@zankel.net>
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* Joe Taylor <joe@tensilica.com>
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*
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* Copyright 2001 - 2006 Tensilica Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/kdev_t.h>
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#include <linux/types.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <asm/timex.h>
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#include <asm/processor.h>
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#include <asm/platform.h>
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#include <asm/bootparam.h>
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#include <platform/lcd.h>
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#include <platform/hardware.h>
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void platform_halt(void)
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{
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lcd_disp_at_pos(" HALT ", 0);
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local_irq_disable();
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while (1)
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cpu_relax();
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}
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void platform_power_off(void)
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{
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lcd_disp_at_pos("POWEROFF", 0);
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local_irq_disable();
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while (1)
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cpu_relax();
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}
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void platform_restart(void)
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{
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/* Flush and reset the mmu, simulate a processor reset, and
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* jump to the reset vector. */
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__asm__ __volatile__ ("movi a2, 15\n\t"
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"wsr a2, icountlevel\n\t"
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"movi a2, 0\n\t"
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"wsr a2, icount\n\t"
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#if XCHAL_NUM_IBREAK > 0
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"wsr a2, ibreakenable\n\t"
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#endif
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"wsr a2, lcount\n\t"
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"movi a2, 0x1f\n\t"
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"wsr a2, ps\n\t"
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"isync\n\t"
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"jx %0\n\t"
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:
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: "a" (XCHAL_RESET_VECTOR_VADDR)
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: "a2"
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);
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/* control never gets here */
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}
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void __init platform_setup(char **cmdline)
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{
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}
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#ifdef CONFIG_OF
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static void __init update_clock_frequency(struct device_node *node)
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{
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struct property *newfreq;
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u32 freq;
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if (!of_property_read_u32(node, "clock-frequency", &freq) && freq != 0)
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return;
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newfreq = kzalloc(sizeof(*newfreq) + sizeof(u32), GFP_KERNEL);
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if (!newfreq)
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return;
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newfreq->value = newfreq + 1;
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newfreq->length = sizeof(freq);
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newfreq->name = kstrdup("clock-frequency", GFP_KERNEL);
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if (!newfreq->name) {
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kfree(newfreq);
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return;
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}
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*(u32 *)newfreq->value = cpu_to_be32(*(u32 *)XTFPGA_CLKFRQ_VADDR);
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of_update_property(node, newfreq);
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}
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#define MAC_LEN 6
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static void __init update_local_mac(struct device_node *node)
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{
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struct property *newmac;
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const u8* macaddr;
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int prop_len;
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macaddr = of_get_property(node, "local-mac-address", &prop_len);
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if (macaddr == NULL || prop_len != MAC_LEN)
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return;
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newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
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if (newmac == NULL)
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return;
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newmac->value = newmac + 1;
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newmac->length = MAC_LEN;
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newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
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if (newmac->name == NULL) {
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kfree(newmac);
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return;
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}
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memcpy(newmac->value, macaddr, MAC_LEN);
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((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
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of_update_property(node, newmac);
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}
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static int __init machine_setup(void)
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{
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struct device_node *clock;
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struct device_node *eth = NULL;
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for_each_node_by_name(clock, "main-oscillator")
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update_clock_frequency(clock);
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if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
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update_local_mac(eth);
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return 0;
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}
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arch_initcall(machine_setup);
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#endif
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/* early initialization */
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void __init platform_init(bp_tag_t *first)
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{
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}
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/* Heartbeat. */
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void platform_heartbeat(void)
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{
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}
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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void __init platform_calibrate_ccount(void)
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{
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long clk_freq = 0;
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#ifdef CONFIG_OF
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struct device_node *cpu =
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of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu");
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if (cpu) {
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u32 freq;
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update_clock_frequency(cpu);
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if (!of_property_read_u32(cpu, "clock-frequency", &freq))
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clk_freq = freq;
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}
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#endif
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if (!clk_freq)
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clk_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
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ccount_freq = clk_freq;
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}
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#endif
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#ifndef CONFIG_OF
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#include <linux/serial_8250.h>
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#include <linux/if.h>
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#include <net/ethoc.h>
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/*----------------------------------------------------------------------------
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* Ethernet -- OpenCores Ethernet MAC (ethoc driver)
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*/
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static struct resource ethoc_res[] = {
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[0] = { /* register space */
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.start = OETH_REGS_PADDR,
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.end = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = { /* buffer space */
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.start = OETH_SRAMBUFF_PADDR,
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.end = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[2] = { /* IRQ number */
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.start = OETH_IRQ,
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.end = OETH_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct ethoc_platform_data ethoc_pdata = {
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/*
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* The MAC address for these boards is 00:50:c2:13:6f:xx.
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* The last byte (here as zero) is read from the DIP switches on the
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* board.
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*/
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.hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
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.phy_id = -1,
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};
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static struct platform_device ethoc_device = {
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.name = "ethoc",
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.id = -1,
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.num_resources = ARRAY_SIZE(ethoc_res),
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.resource = ethoc_res,
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.dev = {
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.platform_data = ðoc_pdata,
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},
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};
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/*----------------------------------------------------------------------------
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* UART
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*/
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static struct resource serial_resource = {
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.start = DUART16552_PADDR,
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.end = DUART16552_PADDR + 0x1f,
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.flags = IORESOURCE_MEM,
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};
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static struct plat_serial8250_port serial_platform_data[] = {
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[0] = {
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.mapbase = DUART16552_PADDR,
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.irq = DUART16552_INTNUM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
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UPF_IOREMAP,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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.uartclk = 0, /* set in xtavnet_init() */
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},
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{ },
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};
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static struct platform_device xtavnet_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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.num_resources = 1,
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.resource = &serial_resource,
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};
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/* platform devices */
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static struct platform_device *platform_devices[] __initdata = {
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ðoc_device,
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&xtavnet_uart,
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};
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static int __init xtavnet_init(void)
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{
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/* Ethernet MAC address. */
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ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
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/* Clock rate varies among FPGA bitstreams; board specific FPGA register
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* reports the actual clock rate.
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*/
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serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
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/* register platform devices */
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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/* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
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* knows whether they set it correctly on the DIP switches.
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*/
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pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
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ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
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return 0;
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}
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/*
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* Register to be done during do_initcalls().
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*/
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arch_initcall(xtavnet_init);
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#endif /* CONFIG_OF */
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