203 lines
4.0 KiB
C
203 lines
4.0 KiB
C
/*
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* Copyright (C) 2002 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef _ASM_FPU_H
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#define _ASM_FPU_H
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#include <linux/sched.h>
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#include <linux/thread_info.h>
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#include <linux/bitops.h>
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#include <asm/mipsregs.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/fpu_emulator.h>
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#include <asm/hazards.h>
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#include <asm/processor.h>
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#include <asm/current.h>
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#include <asm/msa.h>
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#ifdef CONFIG_MIPS_MT_FPAFF
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#include <asm/mips_mt.h>
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#endif
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struct sigcontext;
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struct sigcontext32;
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extern void _init_fpu(void);
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extern void _save_fp(struct task_struct *);
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extern void _restore_fp(struct task_struct *);
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/*
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* This enum specifies a mode in which we want the FPU to operate, for cores
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* which implement the Status.FR bit. Note that FPU_32BIT & FPU_64BIT
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* purposefully have the values 0 & 1 respectively, so that an integer value
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* of Status.FR can be trivially casted to the corresponding enum fpu_mode.
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*/
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enum fpu_mode {
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FPU_32BIT = 0, /* FR = 0 */
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FPU_64BIT, /* FR = 1 */
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FPU_AS_IS,
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};
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static inline int __enable_fpu(enum fpu_mode mode)
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{
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int fr;
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switch (mode) {
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case FPU_AS_IS:
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/* just enable the FPU in its current mode */
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set_c0_status(ST0_CU1);
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enable_fpu_hazard();
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return 0;
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case FPU_64BIT:
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#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT))
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/* we only have a 32-bit FPU */
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return SIGFPE;
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#endif
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/* fall through */
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case FPU_32BIT:
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/* set CU1 & change FR appropriately */
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fr = (int)mode;
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change_c0_status(ST0_CU1 | ST0_FR, ST0_CU1 | (fr ? ST0_FR : 0));
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enable_fpu_hazard();
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/* check FR has the desired value */
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return (!!(read_c0_status() & ST0_FR) == !!fr) ? 0 : SIGFPE;
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default:
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BUG();
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}
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return SIGFPE;
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}
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#define __disable_fpu() \
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do { \
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clear_c0_status(ST0_CU1); \
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disable_fpu_hazard(); \
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} while (0)
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#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
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static inline int __is_fpu_owner(void)
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{
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return test_thread_flag(TIF_USEDFPU);
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}
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static inline int is_fpu_owner(void)
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{
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return cpu_has_fpu && __is_fpu_owner();
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}
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static inline int __own_fpu(void)
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{
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enum fpu_mode mode;
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int ret;
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mode = !test_thread_flag(TIF_32BIT_FPREGS);
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ret = __enable_fpu(mode);
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if (ret)
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return ret;
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KSTK_STATUS(current) |= ST0_CU1;
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if (mode == FPU_64BIT)
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KSTK_STATUS(current) |= ST0_FR;
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else /* mode == FPU_32BIT */
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KSTK_STATUS(current) &= ~ST0_FR;
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set_thread_flag(TIF_USEDFPU);
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return 0;
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}
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static inline int own_fpu_inatomic(int restore)
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{
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int ret = 0;
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if (cpu_has_fpu && !__is_fpu_owner()) {
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ret = __own_fpu();
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if (restore && !ret)
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_restore_fp(current);
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}
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return ret;
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}
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static inline int own_fpu(int restore)
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{
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int ret;
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preempt_disable();
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ret = own_fpu_inatomic(restore);
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preempt_enable();
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return ret;
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}
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static inline void lose_fpu(int save)
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{
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preempt_disable();
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if (is_msa_enabled()) {
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if (save) {
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save_msa(current);
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current->thread.fpu.fcr31 =
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read_32bit_cp1_register(CP1_STATUS);
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}
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disable_msa();
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clear_thread_flag(TIF_USEDMSA);
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__disable_fpu();
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} else if (is_fpu_owner()) {
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if (save)
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_save_fp(current);
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__disable_fpu();
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}
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KSTK_STATUS(current) &= ~ST0_CU1;
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clear_thread_flag(TIF_USEDFPU);
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preempt_enable();
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}
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static inline int init_fpu(void)
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{
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int ret = 0;
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if (cpu_has_fpu) {
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ret = __own_fpu();
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if (!ret)
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_init_fpu();
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} else
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fpu_emulator_init_fpu();
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return ret;
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}
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static inline void save_fp(struct task_struct *tsk)
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{
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if (cpu_has_fpu)
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_save_fp(tsk);
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}
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static inline void restore_fp(struct task_struct *tsk)
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{
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if (cpu_has_fpu)
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_restore_fp(tsk);
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}
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static inline union fpureg *get_fpu_regs(struct task_struct *tsk)
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{
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if (tsk == current) {
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preempt_disable();
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if (is_fpu_owner())
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_save_fp(current);
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preempt_enable();
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}
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return tsk->thread.fpu.fpr;
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}
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#endif /* _ASM_FPU_H */
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