130 lines
3.2 KiB
Plaintext
130 lines
3.2 KiB
Plaintext
/*
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* ARM Juno Platform motherboard peripherals
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*
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* Copyright (c) 2013-2014 ARM Ltd
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*
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* This file is licensed under a dual GPLv2 or BSD license.
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*
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*/
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mb_clk24mhz: clk24mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "juno_mb:clk24mhz";
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};
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mb_clk25mhz: clk25mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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clock-output-names = "juno_mb:clk25mhz";
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};
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motherboard {
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compatible = "arm,vexpress,v2p-p1", "simple-bus";
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#address-cells = <2>; /* SMB chipselect number and offset */
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#size-cells = <1>;
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#interrupt-cells = <1>;
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ranges;
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model = "V2M-Juno";
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arm,hbi = <0x252>;
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arm,vexpress,site = <0>;
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arm,v2m-memory-map = "rs1";
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mb_fixed_3v3: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "MCC_SB_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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ethernet@2,00000000 {
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compatible = "smsc,lan9118", "smsc,lan9115";
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reg = <2 0x00000000 0x10000>;
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interrupts = <3>;
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phy-mode = "mii";
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reg-io-width = <4>;
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smsc,irq-active-high;
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smsc,irq-push-pull;
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clocks = <&mb_clk25mhz>;
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vdd33a-supply = <&mb_fixed_3v3>;
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vddvario-supply = <&mb_fixed_3v3>;
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};
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usb@5,00000000 {
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compatible = "nxp,usb-isp1763";
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reg = <5 0x00000000 0x20000>;
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bus-width = <16>;
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interrupts = <4>;
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};
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iofpga@3,00000000 {
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compatible = "arm,amba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 3 0 0x200000>;
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mmci@050000 {
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compatible = "arm,pl180", "arm,primecell";
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reg = <0x050000 0x1000>;
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interrupts = <5>;
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/* cd-gpios = <&v2m_mmc_gpios 0 0>;
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wp-gpios = <&v2m_mmc_gpios 1 0>; */
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max-frequency = <12000000>;
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vmmc-supply = <&mb_fixed_3v3>;
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
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clock-names = "mclk", "apb_pclk";
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};
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kmi@060000 {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x060000 0x1000>;
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interrupts = <8>;
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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kmi@070000 {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x070000 0x1000>;
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interrupts = <8>;
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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wdt@0f0000 {
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compatible = "arm,sp805", "arm,primecell";
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reg = <0x0f0000 0x10000>;
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interrupts = <7>;
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
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clock-names = "wdogclk", "apb_pclk";
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};
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v2m_timer01: timer@110000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x110000 0x10000>;
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interrupts = <9>;
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
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clock-names = "timclken1", "apb_pclk";
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};
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v2m_timer23: timer@120000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x120000 0x10000>;
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interrupts = <9>;
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clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
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clock-names = "timclken1", "apb_pclk";
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};
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rtc@170000 {
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compatible = "arm,pl031", "arm,primecell";
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reg = <0x170000 0x10000>;
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interrupts = <0>;
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clocks = <&soc_smc50mhz>;
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clock-names = "apb_pclk";
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};
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};
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};
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