139 lines
3.5 KiB
Plaintext
139 lines
3.5 KiB
Plaintext
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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mdss_dsi0_pll: qcom,mdss_dsi_pll@994400 {
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compatible = "qcom,mdss_dsi_pll_8996_v2";
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label = "MDSS DSI 0 PLL";
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cell-index = <0>;
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#clock-cells = <1>;
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reg = <0x00994400 0x588>,
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<0x008C2300 0x8>,
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<0x00994200 0x98>;
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reg-names = "pll_base", "gdsc_base", "dynamic_pll_base";
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gdsc-supply = <&gdsc_mdss>;
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clocks = <&clock_mmss clk_mdss_ahb_clk>;
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clock-names = "iface_clk";
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clock-rate = <0>;
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qcom,dsi-pll-ssc-en;
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qcom,dsi-pll-ssc-mode = "down-spread";
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/* Memory region for passing dynamic refresh pll codes */
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memory-region = <&dfps_data_mem>;
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qcom,platform-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,platform-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "gdsc";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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mdss_dsi1_pll: qcom,mdss_dsi_pll@996400 {
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compatible = "qcom,mdss_dsi_pll_8996_v2";
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label = "MDSS DSI 1 PLL";
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cell-index = <1>;
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#clock-cells = <1>;
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reg = <0x00996400 0x588>,
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<0x008C2300 0x8>,
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<0x00996200 0x98>;
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reg-names = "pll_base", "gdsc_base", "dynamic_pll_base";
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gdsc-supply = <&gdsc_mdss>;
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clocks = <&clock_mmss clk_mdss_ahb_clk>;
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clock-names = "iface_clk";
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clock-rate = <0>;
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qcom,dsi-pll-ssc-en;
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qcom,dsi-pll-ssc-mode = "down-spread";
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qcom,platform-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,platform-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "gdsc";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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mdss_hdmi_pll: qcom,mdss_hdmi_pll@0x9a0600 {
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compatible = "qcom,mdss_hdmi_pll_8996";
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label = "MDSS HDMI PLL";
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#clock-cells = <1>;
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reg = <0x9a0600 0xb10>,
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<0x9a1200 0x0c8>,
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<0x8C2300 0x8>;
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reg-names = "pll_base", "phy_base", "gdsc_base";
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gdsc-supply = <&gdsc_mdss>;
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vddio-supply = <&pm8994_l12>;
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vcca-supply = <&pm8994_l28>;
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clocks = <&clock_mmss clk_mdss_ahb_clk>,
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<&clock_gcc clk_gcc_hdmi_clkref_clk>,
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<&clock_gcc clk_ln_bb_clk>;
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clock-names = "iface_clk", "ref_clk", "ref_clk_src";
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clock-rate = <0>;
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qcom,platform-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,platform-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "gdsc";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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qcom,platform-supply-entry@1 {
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reg = <1>;
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qcom,supply-name = "vddio";
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qcom,supply-min-voltage = <1800000>;
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qcom,supply-max-voltage = <1800000>;
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qcom,supply-enable-load = <100000>;
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qcom,supply-disable-load = <100>;
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};
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qcom,platform-supply-entry@2 {
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reg = <2>;
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qcom,supply-name = "vcca";
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qcom,supply-min-voltage = <925000>;
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qcom,supply-max-voltage = <925000>;
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qcom,supply-enable-load = <10000>;
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qcom,supply-disable-load = <100>;
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};
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};
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};
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};
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