1250 lines
31 KiB
Plaintext
1250 lines
31 KiB
Plaintext
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/msm-clocks-a7.h>
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#include <dt-bindings/clock/msm-clocks-californium.h>
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#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
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/ {
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model = "Qualcomm Technologies, Inc. MDM CALIFORNIUM";
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compatible = "qcom,mdmcalifornium";
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qcom,msm-id = <279 0x10000>, <284 0x10000>, <285 0x10000>,
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<286 0x10000>, <283 0x10000>;
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interrupt-parent = <&intc>;
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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peripheral2_mem: peripheral2_region@0x87d00000 {
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compatible = "removed-dma-pool";
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no-map;
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reg = <0x87d00000 0x300000>;
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label = "peripheral2_mem";
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};
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mss_mem: mss_region@88000000 {
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compatible = "removed-dma-pool";
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no-map;
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reg = <0x88000000 0x6E00000>;
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label = "mss_mem";
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};
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audio_mem: audio_region@0 {
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compatible = "shared-dma-pool";
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reusable;
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size = <0 0x400000>;
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};
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};
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aliases {
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smd7 = &smdtty_data1;
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smd8 = &smdtty_data4;
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smd11 = &smdtty_data11;
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smd21 = &smdtty_data21;
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smd36 = &smdtty_loopback;
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qpic_nand1 = &qnand_1;
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sdhc1 = &sdhc_1; /* SDC1 eMMC/SD slot */
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};
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cpus {
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#size-cells = <0>;
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#address-cells = <1>;
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x0>;
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qcom,limits-info = <&mitigation_profile0>;
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};
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};
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soc: soc { };
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};
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#include "mdmcalifornium-smp2p.dtsi"
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#include "msm-gdsc.dtsi"
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#include "mdmcalifornium-blsp.dtsi"
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#include "mdmcalifornium-bus.dtsi"
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#include "mdmcalifornium-coresight.dtsi"
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#include "mdmcalifornium-ion.dtsi"
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#include "mdmcalifornium-pm.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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intc: interrupt-controller@b000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x0b000000 0x1000>,
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<0x0b002000 0x1000>;
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};
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qcom,mpm2-sleep-counter@4a3000 {
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compatible = "qcom,mpm2-sleep-counter";
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reg = <0x004a3000 0x1000>;
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clock-frequency = <32768>;
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};
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qcom,msm-imem@8600000 {
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compatible = "qcom,msm-imem";
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reg = <0x8600000 0x1000>; /* Address and size of IMEM */
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ranges = <0x0 0x8600000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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mem_dump_table@10 {
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compatible = "qcom,msm-imem-mem_dump_table";
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reg = <0x10 8>;
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};
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restart_reason@65c {
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compatible = "qcom,msm-imem-restart_reason";
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reg = <0x65c 4>;
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};
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boot_stats@6b0 {
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compatible = "qcom,msm-imem-boot_stats";
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reg = <0x6b0 32>;
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};
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pil@94c {
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compatible = "qcom,msm-imem-pil";
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reg = <0x94c 200>;
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};
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};
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qcom,mss@4080000{
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compatible = "qcom,pil-q6v55-mss";
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reg = <0x4080000 0x100>,
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<0x194e000 0x400>,
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<0x4180000 0x040>,
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<0x1810000 0x004>;
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reg-names = "qdsp6_base", "halt_base", "rmb_base",
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"restart_reg";
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clocks = <&clock_gcc clk_xo>,
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<&clock_gcc clk_gcc_mss_cfg_ahb_clk>,
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<&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>,
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<&clock_gcc clk_gcc_boot_rom_ahb_clk>,
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<&clock_gcc clk_gpll0_out_msscc>;
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clock-names = "xo", "iface_clk", "bus_clk", "mem_clk",
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"gpll0_mss_clk";
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qcom,proxy-clock-names = "xo";
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qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk",
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"gpll0_mss_clk";
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interrupts = <0 24 1>;
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vdd_cx-supply = <&pmdcalifornium_s5_level>;
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vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
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vdd_mx-supply = <&pmdcalifornium_l9_level>;
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vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
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vdd_pll-supply = <&pmdcalifornium_l5>;
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qcom,vdd_pll = <1800000>;
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qcom,firmware-name = "modem";
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qcom,pil-self-auth;
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qcom,sysmon-id = <0>;
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qcom,ssctl-instance-id = <0x12>;
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qcom,override-acc;
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qcom,qdsp6v61-1-1;
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memory-region = <&mss_mem>;
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/* GPIO inputs from mss */
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qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
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qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
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qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
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qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
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/* GPIO output to mss */
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qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
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};
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clock_gcc: qcom,gcc@1800000 {
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compatible = "qcom,gcc-californium";
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reg = <0x1800000 0x80000>,
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<0xb008018 0x1c>;
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reg-names = "cc_base", "apcs_base";
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#clock-cells = <1>;
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qcom,regulator-names = "vdd_dig", "vdd_dig_ao";
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vdd_dig-supply = <&pmdcalifornium_s5_level>;
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vdd_dig_ao-supply = <&pmdcalifornium_s5_level_ao>;
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};
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clock_debug: qcom,cc-debug@1874000 {
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compatible = "qcom,cc-debug-californium";
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reg = <0x1874000 0x4>;
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reg-names = "cc_base";
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#clock-cells = <1>;
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};
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clock_cpu: qcom,clock-a7@0b010008 {
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compatible = "qcom,clock-a7-californium";
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reg = <0x0b010008 0x8>;
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reg-names = "rcg-base";
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#clock-cells = <1>;
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clock-names = "clk-1", "clk-5";
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clocks = <&clock_gcc clk_gpll0_ao>,
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<&clock_gcc clk_a7pll_clk>;
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qcom,speed0-bin-v0 =
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< 0 RPM_SMD_REGULATOR_LEVEL_NONE>,
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< 200000000 RPM_SMD_REGULATOR_LEVEL_LOW_SVS>,
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< 384000000 RPM_SMD_REGULATOR_LEVEL_SVS>,
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< 787200000 RPM_SMD_REGULATOR_LEVEL_NOM>,
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<1286400000 RPM_SMD_REGULATOR_LEVEL_TURBO>;
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cpu-vdd-supply = <&pmdcalifornium_s5_level_ao>;
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qcom,a7ssmux-opp-store-vcorner = <&CPU0>;
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};
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qcom,msm-cpufreq {
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compatible = "qcom,msm-cpufreq";
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clocks = <&clock_cpu clk_a7ssmux>,
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<&clock_cpu clk_a7ssmux>,
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<&clock_cpu clk_a7ssmux>,
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<&clock_cpu clk_a7ssmux>;
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clock-names = "cpu0_clk", "cpu1_clk",
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"cpu2_clk", "cpu3_clk";
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qcom,cpufreq-table =
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< 200000 >,
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< 300000 >,
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< 384000 >,
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< 600000 >,
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< 787200 >,
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< 998400 >,
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< 1190400 >,
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< 1286400 >;
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};
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devfreq-cpufreq {
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cpubw-cpufreq {
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target-dev = <&cpubw>;
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cpu-to-dev-map =
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< 600000 1541 >,
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< 787200 3082 >,
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< 1286400 3952 >;
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};
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};
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cpubw: qcom,cpubw {
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compatible = "qcom,devbw";
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governor = "cpufreq";
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qcom,src-dst-ports = <1 512>;
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qcom,active-only;
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qcom,bw-tbl =
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< 1541 /* 202 MHz */ >,
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< 3082 /* 404 MHz */ >,
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< 3952 /* 518 MHz */ >;
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};
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restart@4ab000 {
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compatible = "qcom,pshold";
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reg = <0x4ab000 0x4>,
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<0x0193d100 0x4>;
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reg-names = "pshold-base", "tcsr-boot-misc-detect";
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};
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timer@b020000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0xb020000 0x1000>;
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clock-frequency = <19200000>;
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frame@b021000 {
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frame-number = <0>;
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interrupts = <0 7 0x4>,
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<0 6 0x4>;
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reg = <0xb021000 0x1000>,
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<0xb022000 0x1000>;
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};
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frame@b023000 {
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frame-number = <1>;
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interrupts = <0 8 0x4>;
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reg = <0xb023000 0x1000>;
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status = "disabled";
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};
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frame@b024000 {
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frame-number = <2>;
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interrupts = <0 9 0x4>;
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reg = <0xb024000 0x1000>;
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status = "disabled";
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};
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frame@b025000 {
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frame-number = <3>;
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interrupts = <0 10 0x4>;
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reg = <0xb025000 0x1000>;
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status = "disabled";
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};
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frame@b026000 {
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frame-number = <4>;
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interrupts = <0 11 0x4>;
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reg = <0xb026000 0x1000>;
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status = "disabled";
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};
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frame@b027000 {
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frame-number = <5>;
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interrupts = <0 12 0x4>;
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reg = <0xb027000 0x1000>;
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status = "disabled";
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};
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frame@b028000 {
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frame-number = <6>;
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interrupts = <0 13 0x4>;
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reg = <0xb028000 0x1000>;
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status = "disabled";
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};
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frame@b029000 {
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frame-number = <7>;
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interrupts = <0 14 0x4>;
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reg = <0xb029000 0x1000>;
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status = "disabled";
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};
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};
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pcie0: qcom,pcie@80000 {
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compatible = "qcom,pci-msm";
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cell-index = <0>;
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reg = <0x00080000 0x2000>,
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<0x00086000 0x1000>,
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<0x40000000 0xf1d>,
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<0x40000f20 0xa8>,
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<0x40100000 0x100000>,
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<0x40200000 0x100000>,
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<0x40300000 0x1d00000>,
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<0x01956044 0x4>;
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reg-names = "parf", "phy", "dm_core", "elbi",
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"conf", "io", "bars", "tcsr";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x40200000 0x40200000 0x0 0x100000>,
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<0x02000000 0x0 0x40300000 0x40300000 0x0 0x1d00000>;
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interrupt-parent = <&pcie0>;
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interrupts = <0 1 2 3 4 5>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0xffffffff>;
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interrupt-map = <0 0 0 0 &intc 0 53 0
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0 0 0 1 &intc 0 115 0
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0 0 0 2 &intc 0 116 0
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0 0 0 3 &intc 0 117 0
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0 0 0 4 &intc 0 118 0
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0 0 0 5 &intc 0 49 0>;
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interrupt-names = "int_msi", "int_a", "int_b", "int_c",
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"int_d", "int_global_int";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_clkreq_default
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&pcie0_perst_default
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&pcie0_wake_default>;
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perst-gpio = <&tlmm_pinmux 60 0>;
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wake-gpio = <&tlmm_pinmux 65 0>;
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gdsc-vdd-supply = <&gdsc_pcie>;
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vreg-1.8-supply = <&pmdcalifornium_l5>;
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vreg-0.9-supply = <&pmdcalifornium_l4>;
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qcom,vreg-0.9-voltage-level = <928000 928000 24000>;
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qcom,l1-supported;
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qcom,l1ss-supported;
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qcom,aux-clk-sync;
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qcom,ep-latency = <10>;
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qcom,cpl-timeout = <0x2>;
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qcom,ep-wakeirq;
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linux,pci-domain = <0>;
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qcom,use-19p2mhz-aux-clk;
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qcom,msm-bus,name = "pcie0";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<45 512 0 0>,
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<45 512 500 800>;
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clocks = <&clock_gcc clk_gcc_pcie_pipe_clk>,
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<&clock_gcc clk_ln_bb_clk>,
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<&clock_gcc clk_gcc_pcie_sleep_clk>,
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<&clock_gcc clk_gcc_pcie_cfg_ahb_clk>,
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<&clock_gcc clk_gcc_pcie_axi_mstr_clk>,
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<&clock_gcc clk_gcc_pcie_axi_clk>,
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<&clock_gcc clk_gcc_pcie_ref_clk>,
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<&clock_gcc clk_gcc_pcie_phy_reset>;
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clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src",
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"pcie_0_aux_clk", "pcie_0_cfg_ahb_clk",
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"pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk",
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"pcie_0_ldo", "pcie_0_phy_reset";
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max-clock-frequency-hz = <0>, <0>, <19200000>,
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<0>, <0>, <0>, <0>, <0>, <0>;
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};
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blsp1_uart1: serial@78af000 {
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compatible = "qcom,msm-lsuart-v14";
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reg = <0x78af000 0x200>;
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interrupts = <0 107 0>;
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clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,
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<&clock_gcc clk_gcc_blsp1_ahb_clk>;
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clock-names = "core_clk", "iface_clk";
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status = "disabled";
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};
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bt_qca6174 {
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compatible = "qca,qca6174";
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qca,bt-reset-gpio = <&pmdcalifornium_gpios 8 0>; /* BT_EN */
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qca,bt-vdd-pa-supply = <&rome_vreg>;
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};
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qcom,sps {
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compatible = "qcom,msm_sps_4k";
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qcom,pipe-attr-ee;
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};
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pcie_ep: qcom,pcie@7fffd000 {
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compatible = "qcom,pcie-ep";
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reg = <0x7fffd000 0x1000>,
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<0x7fffe000 0xf1d>,
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<0x7fffef20 0xa8>,
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<0x00080000 0x2000>,
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<0x00086000 0x1000>,
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<0x00087000 0x1000>;
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reg-names = "msi", "dm_core", "elbi", "parf", "phy", "mmio";
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#address-cells = <0>;
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interrupt-parent = <&pcie_ep>;
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interrupts = <0>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xffffffff>;
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interrupt-map = <0 &intc 0 49 0>;
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interrupt-names = "int_global";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_clkreq_default &pcie0_perst_default
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&pcie0_wake_default &pcie0_mdm2apstatus_default>;
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perst-gpio = <&tlmm_pinmux 65 0>;
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wake-gpio = <&tlmm_pinmux 61 0>;
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clkreq-gpio = <&tlmm_pinmux 64 0>;
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mdm2apstatus-gpio = <&tlmm_pinmux 16 0>;
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gdsc-vdd-supply = <&gdsc_pcie>;
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vreg-1.8-supply = <&pmdcalifornium_l5>;
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vreg-0.9-supply = <&pmdcalifornium_l4>;
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qcom,vreg-0.9-voltage-level = <928000 928000 24000>;
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clocks = <&clock_gcc clk_gcc_pcie_pipe_clk>,
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<&clock_gcc clk_gcc_pcie_cfg_ahb_clk>,
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<&clock_gcc clk_gcc_pcie_axi_mstr_clk>,
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<&clock_gcc clk_gcc_pcie_axi_clk>,
|
|
<&clock_gcc clk_gcc_pcie_sleep_clk>,
|
|
<&clock_gcc clk_gcc_pcie_ref_clk>,
|
|
<&clock_gcc clk_gcc_pcie_phy_reset>;
|
|
|
|
clock-names = "pcie_0_pipe_clk", "pcie_0_cfg_ahb_clk",
|
|
"pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk",
|
|
"pcie_0_aux_clk", "pcie_0_ldo",
|
|
"pcie_0_phy_reset";
|
|
max-clock-frequency-hz = <0>, <0>, <0>, <0>, <19200000>,
|
|
<0>, <0>;
|
|
|
|
qcom,msm-bus,name = "pcie-ep";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<45 512 0 0>,
|
|
<45 512 500 800>;
|
|
|
|
qcom,pcie-link-speed = <2>;
|
|
qcom,pcie-phy-ver = <4>;
|
|
qcom,pcie-active-config;
|
|
qcom,pcie-aggregated-irq;
|
|
};
|
|
|
|
qcom,msm_gsi {
|
|
compatible = "qcom,msm_gsi";
|
|
};
|
|
|
|
qcom,rmnet-ipa {
|
|
compatible = "qcom,rmnet-ipa3";
|
|
};
|
|
|
|
ipa_hw: qcom,ipa@07B00000 {
|
|
compatible = "qcom,ipa";
|
|
reg =
|
|
<0x07B00000 0x34000>,
|
|
<0x07B84000 0x31FFFF>,
|
|
<0x07B04000 0x2C000>;
|
|
reg-names = "ipa-base", "bam-base", "gsi-base";
|
|
interrupts =
|
|
<0 31 0>,
|
|
<0 34 0>,
|
|
<0 34 0>;
|
|
interrupt-names = "ipa-irq", "bam-irq", "gsi-irq";
|
|
qcom,ipa-hw-ver = <10>; /* IPA core version = IPAv3.0 */
|
|
qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */
|
|
qcom,ee = <0>;
|
|
qcom,use-gsi;
|
|
qcom,use-rg10-limitation-mitigation;
|
|
qcom,use-ipa-tethering-bridge;
|
|
qcom,modem-cfg-emb-pipe-flt;
|
|
clock-names = "core_clk";
|
|
clocks = <&clock_gcc clk_ipa_a_clk>;
|
|
qcom,msm-bus,name = "ipa";
|
|
qcom,msm-bus,num-cases = <4>;
|
|
qcom,msm-bus,num-paths = <2>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<90 512 0 0>, <90 585 0 0>, /* No vote */
|
|
<90 512 80000 640000>, <90 585 80000 640000>, /* SVS */
|
|
<90 512 206000 960000>, <90 585 206000 960000>, /* NOMINAL */
|
|
<90 512 206000 3600000>, <90 585 206000 3600000>; /* TURBO */
|
|
qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO";
|
|
};
|
|
|
|
mhi_dev@87000 {
|
|
compatible = "qcom,msm-mhi-dev";
|
|
reg = <0x87000 0x1000>,
|
|
<0x7b22000 0x4>,
|
|
<0x7b22150 0x4>;
|
|
reg-names = "mhi_mmio_base", "ipa_uc_mbox_crdb",
|
|
"ipa_uc_mbox_erdb";
|
|
qcom,mhi-ifc-id = <0x030217cb>;
|
|
qcom,mhi-ep-msi = <1>;
|
|
qcom,mhi-version = <0x1000000>;
|
|
qcom,mhi-use-gsi;
|
|
};
|
|
|
|
blsp1_uart2: serial@78b0000 {
|
|
compatible = "qcom,msm-lsuart-v14";
|
|
reg = <0x78b0000 0x200>;
|
|
interrupts = <0 108 0>;
|
|
clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
|
|
<&clock_gcc clk_gcc_blsp1_ahb_clk>;
|
|
clock-names = "core_clk", "iface_clk";
|
|
status = "disabled";
|
|
};
|
|
|
|
blsp1_uart3: serial@78b1000 {
|
|
compatible = "qcom,msm-lsuart-v14";
|
|
reg = <0x78b1000 0x200>;
|
|
interrupts = <0 109 0>;
|
|
clocks = <&clock_gcc clk_gcc_blsp1_uart3_apps_clk>,
|
|
<&clock_gcc clk_gcc_blsp1_ahb_clk>;
|
|
clock-names = "core_clk", "iface_clk";
|
|
status = "disabled";
|
|
};
|
|
|
|
rpm_bus: qcom,rpm-smd {
|
|
compatible = "qcom,rpm-smd";
|
|
rpm-channel-name = "rpm_requests";
|
|
rpm-channel-type = <15>; /* SMD_APPS_RPM */
|
|
};
|
|
|
|
qcom,wdt@b017000 {
|
|
compatible = "qcom,msm-watchdog";
|
|
reg = <0xb017000 0x1000>;
|
|
reg-names = "wdt-base";
|
|
interrupts = <1 3 0>, <1 2 0>;
|
|
qcom,bark-time = <11000>;
|
|
qcom,pet-time = <10000>;
|
|
};
|
|
|
|
jtag_fuse: jtagfuse@5e01c {
|
|
compatible = "qcom,jtag-fuse-v2";
|
|
reg = <0xa601c 0x8>;
|
|
reg-names = "fuse-base";
|
|
};
|
|
|
|
jtag_mm0: jtagmm@842000 {
|
|
compatible = "qcom,jtag-mm";
|
|
reg = <0x842000 0x1000>,
|
|
<0x840000 0x1000>;
|
|
reg-names = "etm-base","debug-base";
|
|
|
|
qcom,coresight-jtagmm-cpu = <&CPU0>;
|
|
|
|
clocks = <&clock_gcc clk_qdss_clk>,
|
|
<&clock_gcc clk_qdss_a_clk>;
|
|
clock-names = "core_clk", "core_a_clk";
|
|
};
|
|
|
|
qcom,ipc-spinlock@1905000 {
|
|
compatible = "qcom,ipc-spinlock-sfpb";
|
|
reg = <0x1905000 0x8000>;
|
|
qcom,num-locks = <8>;
|
|
};
|
|
|
|
qnand_1: nand@7980000 {
|
|
compatible = "qcom,msm-nand";
|
|
reg = <0x07980000 0x10000>,
|
|
<0x07984000 0x1a000>;
|
|
reg-names = "nand_phys",
|
|
"bam_phys";
|
|
interrupts = <0 247 0>;
|
|
interrupt-names = "bam_irq";
|
|
|
|
qcom,msm-bus,name = "qpic_nand";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
|
|
qcom,msm-bus,vectors-KBps =
|
|
<91 512 0 0>,
|
|
/* Voting for max b/w on PNOC bus for now */
|
|
<91 512 400000 800000>;
|
|
|
|
clock-names = "core_clk";
|
|
clocks = <&clock_gcc clk_qpic_clk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
qcom,smem@87e80000 {
|
|
compatible = "qcom,smem";
|
|
reg = <0x87e80000 0xc0000>,
|
|
<0xb011008 0x4>,
|
|
<0x60000 0x6000>,
|
|
<0x193D000 0x8>;
|
|
reg-names = "smem", "irq-reg-base", "aux-mem1",
|
|
"smem_targ_info_reg";
|
|
qcom,mpu-enabled;
|
|
|
|
qcom,smd-modem {
|
|
compatible = "qcom,smd";
|
|
qcom,smd-edge = <0>;
|
|
qcom,smd-irq-offset = <0x0>;
|
|
qcom,smd-irq-bitmask = <0x1000>;
|
|
interrupts = <0 25 1>;
|
|
label = "modem";
|
|
};
|
|
|
|
qcom,smd-rpm {
|
|
compatible = "qcom,smd";
|
|
qcom,smd-edge = <15>;
|
|
qcom,smd-irq-offset = <0x0>;
|
|
qcom,smd-irq-bitmask = <0x1>;
|
|
interrupts = <0 168 1>;
|
|
label = "rpm";
|
|
qcom,irq-no-suspend;
|
|
qcom,not-loadable;
|
|
};
|
|
};
|
|
|
|
qcom,smdpkt {
|
|
compatible = "qcom,smdpkt";
|
|
|
|
qcom,smdpkt-data5-cntl {
|
|
qcom,smdpkt-remote = "modem";
|
|
qcom,smdpkt-port-name = "DATA5_CNTL";
|
|
qcom,smdpkt-dev-name = "smdcntl0";
|
|
};
|
|
|
|
qcom,smdpkt-data22 {
|
|
qcom,smdpkt-remote = "modem";
|
|
qcom,smdpkt-port-name = "DATA22";
|
|
qcom,smdpkt-dev-name = "smd22";
|
|
};
|
|
|
|
qcom,smdpkt-data40-cntl {
|
|
qcom,smdpkt-remote = "modem";
|
|
qcom,smdpkt-port-name = "DATA40_CNTL";
|
|
qcom,smdpkt-dev-name = "smdcntl8";
|
|
};
|
|
|
|
qcom,smdpkt-apr-apps2 {
|
|
qcom,smdpkt-remote = "modem";
|
|
qcom,smdpkt-port-name = "apr_apps2";
|
|
qcom,smdpkt-dev-name = "apr_apps2";
|
|
};
|
|
|
|
qcom,smdpkt-loopback {
|
|
qcom,smdpkt-remote = "modem";
|
|
qcom,smdpkt-port-name = "LOOPBACK";
|
|
qcom,smdpkt-dev-name = "smd_pkt_loopback";
|
|
};
|
|
};
|
|
|
|
qcom,smdtty {
|
|
compatible = "qcom,smdtty";
|
|
|
|
smdtty_data1: qcom,smdtty-data1 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA1";
|
|
};
|
|
|
|
smdtty_data4: qcom,smdtty-data4 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA4";
|
|
};
|
|
|
|
smdtty_data11: qcom,smdtty-data11 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA11";
|
|
};
|
|
|
|
smdtty_data21: qcom,smdtty-data21 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA21";
|
|
};
|
|
|
|
smdtty_loopback: smdtty-loopback {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "LOOPBACK";
|
|
qcom,smdtty-dev-name = "LOOPBACK_TTY";
|
|
};
|
|
};
|
|
|
|
qcom,glink-smem-native-xprt-modem@87e80000 {
|
|
compatible = "qcom,glink-smem-native-xprt";
|
|
reg = <0x87e80000 0xc0000>,
|
|
<0xb011008 0x4>;
|
|
reg-names = "smem", "irq-reg-base";
|
|
qcom,irq-mask = <0x8000>;
|
|
interrupts = <0 28 1>;
|
|
label = "mpss";
|
|
};
|
|
|
|
qcom,glink-smem-native-xprt-rpm@60000 {
|
|
compatible = "qcom,glink-rpm-native-xprt";
|
|
reg = <0x60000 0x6000>,
|
|
<0xb011008 0x4>;
|
|
reg-names = "msgram", "irq-reg-base";
|
|
qcom,irq-mask = <0x1>;
|
|
interrupts = <0 168 1>;
|
|
label = "rpm";
|
|
};
|
|
|
|
glink_mpss: qcom,glink-ssr-modem {
|
|
compatible = "qcom,glink_ssr";
|
|
label = "modem";
|
|
qcom,edge = "mpss";
|
|
qcom,notify-edges = <&glink_rpm>;
|
|
qcom,xprt = "smem";
|
|
};
|
|
|
|
glink_rpm: qcom,glink-ssr-rpm {
|
|
compatible = "qcom,glink_ssr";
|
|
label = "rpm";
|
|
qcom,edge = "rpm";
|
|
qcom,notify-edges = <&glink_mpss>;
|
|
qcom,xprt = "smem";
|
|
};
|
|
|
|
qcom,glink_pkt {
|
|
compatible = "qcom,glinkpkt";
|
|
|
|
qcom,glinkpkt-at-mdm0 {
|
|
qcom,glinkpkt-transport = "smd_trans";
|
|
qcom,glinkpkt-edge = "mpss";
|
|
qcom,glinkpkt-ch-name = "DS";
|
|
qcom,glinkpkt-dev-name = "at_mdm0";
|
|
};
|
|
|
|
qcom,glinkpkt-loopback_cntl {
|
|
qcom,glinkpkt-transport = "lloop";
|
|
qcom,glinkpkt-edge = "local";
|
|
qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT";
|
|
qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl";
|
|
};
|
|
|
|
qcom,glinkpkt-loopback_data {
|
|
qcom,glinkpkt-transport = "lloop";
|
|
qcom,glinkpkt-edge = "local";
|
|
qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT";
|
|
qcom,glinkpkt-dev-name = "glink_pkt_loopback";
|
|
};
|
|
};
|
|
|
|
qcom,ipc_router {
|
|
compatible = "qcom,ipc_router";
|
|
qcom,node-id = <1>;
|
|
qcom,default-peripheral = "modem";
|
|
};
|
|
|
|
qcom,ipc_router_modem_xprt {
|
|
compatible = "qcom,ipc_router_glink_xprt";
|
|
qcom,ch-name = "IPCRTR";
|
|
qcom,xprt-remote = "mpss";
|
|
qcom,glink-xprt = "smd_trans";
|
|
qcom,xprt-linkid = <1>;
|
|
qcom,xprt-version = <1>;
|
|
qcom,fragmented-data;
|
|
};
|
|
|
|
spmi_bus: qcom,spmi@200f000 {
|
|
compatible = "qcom,spmi-pmic-arb";
|
|
reg = <0x200f000 0x1000>,
|
|
<0x2400000 0x800000>,
|
|
<0x2c00000 0x800000>,
|
|
<0x3800000 0x200000>,
|
|
<0x200a000 0x2100>; /* includes SPMI_CFG and GENI_CFG */
|
|
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
|
|
interrupts = <0 190 0>;
|
|
qcom,pmic-arb-channel = <0>;
|
|
qcom,pmic-arb-ee = <0>;
|
|
qcom,pmic-arb-max-peripherals = <256>;
|
|
qcom,pmic-arb-max-periph-interrupts = <256>;
|
|
#interrupt-cells = <3>;
|
|
interrupt-controller;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cell-index = <0>;
|
|
qcom,not-wakeup; /* Needed until Full-boot-chain enabled */
|
|
};
|
|
|
|
tsens0: tsens@4a9000 {
|
|
compatible = "qcom,msm8996-tsens";
|
|
reg = <0x4a8000 0x2000>,
|
|
<0x74230 0x1000>;
|
|
reg-names = "tsens_physical", "tsens_eeprom_physical";
|
|
interrupts = <0 184 0>, <0 29 0>;
|
|
interrupt-names = "tsens-upper-lower", "tsens-critical";
|
|
qcom,sensors = <5>;
|
|
qcom,slope = <2901 2846 3200 3200 3200>;
|
|
qcom,client-id = <0 1 2 3 4>;
|
|
qcom,sensor-id = <0 1 2 3 6>;
|
|
};
|
|
|
|
qcom,cnss {
|
|
compatible = "qcom,cnss";
|
|
wlan-en-gpio = <&tlmm_pinmux 95 0>;
|
|
vdd-wlan-supply = <&rome_vreg>;
|
|
vdd-wlan-xtal-supply = <&pmdcalifornium_l5>;
|
|
vdd-wlan-io-supply = <&pmdcalifornium_l6>;
|
|
qcom,notify-modem-status;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cnss_default>;
|
|
qcom,wlan-rc-num = <0>;
|
|
qcom,wlan-ramdump-dynamic = <0x200000>;
|
|
|
|
qcom,msm-bus,name = "msm-cnss";
|
|
qcom,msm-bus,num-cases = <4>;
|
|
qcom,msm-bus,num-paths = <2>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<45 512 0 0>, <1 512 0 0>,
|
|
/* Upto 200 Mbps */
|
|
<45 512 41421 655360>, <1 512 41421 655360>,
|
|
/* Upto 400 Mbps */
|
|
<45 512 98572 655360>, <1 512 98572 1600000>,
|
|
/* Upto 800 Mbps */
|
|
<45 512 207108 1146880>, <1 512 207108 3124992>;
|
|
};
|
|
|
|
qcom,msm-thermal {
|
|
compatible = "qcom,msm-thermal";
|
|
qcom,sensor-id = <3>;
|
|
qcom,poll-ms = <250>;
|
|
qcom,limit-temp = <60>;
|
|
qcom,temp-hysteresis = <10>;
|
|
qcom,freq-step = <2>;
|
|
qcom,vdd-restriction-temp = <5>;
|
|
qcom,vdd-restriction-temp-hysteresis = <10>;
|
|
vdd-dig-supply = <&pmdcalifornium_s5_floor_level>;
|
|
qcom,disable-cx-phase-ctrl;
|
|
qcom,disable-gfx-phase-ctrl;
|
|
qcom,disable-vdd-mx;
|
|
qcom,disable-psm;
|
|
qcom,disable-ocr;
|
|
|
|
qcom,vdd-dig-rstr{
|
|
qcom,vdd-rstr-reg = "vdd-dig";
|
|
qcom,levels = <RPM_SMD_REGULATOR_LEVEL_NOM
|
|
RPM_SMD_REGULATOR_LEVEL_TURBO
|
|
RPM_SMD_REGULATOR_LEVEL_TURBO>;
|
|
qcom,min-level = <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
|
|
};
|
|
};
|
|
|
|
qcom,sensor-information {
|
|
compatible = "qcom,sensor-information";
|
|
sensor_information0: qcom,sensor-information-0 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor0";
|
|
qcom,scaling-factor = <10>;
|
|
};
|
|
|
|
sensor_information1: qcom,sensor-information-1 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor1";
|
|
qcom,scaling-factor = <10>;
|
|
};
|
|
|
|
sensor_information2: qcom,sensor-information-2 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor2";
|
|
qcom,scaling-factor = <10>;
|
|
};
|
|
|
|
sensor_information3: qcom,sensor-information-3 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor3";
|
|
qcom,scaling-factor = <10>;
|
|
};
|
|
|
|
sensor_information4: qcom,sensor-information-4 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor4";
|
|
qcom,alias-name = "modem";
|
|
qcom,scaling-factor = <10>;
|
|
};
|
|
|
|
sensor_information5: qcom,sensor-information-5 {
|
|
qcom,sensor-type = "adc";
|
|
qcom,sensor-name = "pa_therm0";
|
|
};
|
|
|
|
sensor_information6: qcom,sensor-information-6 {
|
|
qcom,sensor-type = "adc";
|
|
qcom,sensor-name = "pa_therm1";
|
|
};
|
|
|
|
sensor_information7: qcom,sensor-information-7 {
|
|
qcom,sensor-type = "adc";
|
|
qcom,sensor-name = "xo_therm";
|
|
};
|
|
};
|
|
|
|
mitigation_profile0: qcom,limit_info-0 {
|
|
qcom,temperature-sensor = <&sensor_information3>;
|
|
};
|
|
|
|
wcd9xxx_intc: wcd9xxx-irq {
|
|
compatible = "qcom,wcd9xxx-irq";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
interrupt-parent = <&tlmm_pinmux>;
|
|
qcom,gpio-connect = <&tlmm_pinmux 94 0>;
|
|
};
|
|
|
|
clock_audio: audio_ext_clk {
|
|
compatible = "qcom,audio-ref-clk";
|
|
qcom,codec-mclk-clk-freq = <12288000>;
|
|
pinctrl-names = "sleep", "active";
|
|
pinctrl-0 = <&i2s_mclk_sleep>;
|
|
pinctrl-1 = <&i2s_mclk_active>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
sound {
|
|
compatible = "qcom,mdm-audio-tasha";
|
|
qcom,model = "mdm-tasha-i2s-snd-card";
|
|
|
|
qcom,audio-routing =
|
|
"AIF4 VI", "MCLK",
|
|
"RX_BIAS", "MCLK",
|
|
"MADINPUT", "MCLK",
|
|
"AMIC2", "MIC BIAS2",
|
|
"MIC BIAS2", "Headset Mic",
|
|
"AMIC3", "MIC BIAS2",
|
|
"MIC BIAS2", "ANCRight Headset Mic",
|
|
"AMIC4", "MIC BIAS2",
|
|
"MIC BIAS2", "ANCLeft Headset Mic",
|
|
"AMIC5", "MIC BIAS3",
|
|
"MIC BIAS3", "Handset Mic",
|
|
"AMIC6", "MIC BIAS4",
|
|
"MIC BIAS4", "Analog Mic6",
|
|
"DMIC0", "MIC BIAS1",
|
|
"MIC BIAS1", "Digital Mic0",
|
|
"DMIC1", "MIC BIAS1",
|
|
"MIC BIAS1", "Digital Mic1",
|
|
"DMIC2", "MIC BIAS3",
|
|
"MIC BIAS3", "Digital Mic2",
|
|
"DMIC3", "MIC BIAS3",
|
|
"MIC BIAS3", "Digital Mic3",
|
|
"DMIC4", "MIC BIAS4",
|
|
"MIC BIAS4", "Digital Mic4",
|
|
"DMIC5", "MIC BIAS4",
|
|
"MIC BIAS4", "Digital Mic5",
|
|
"SpkrLeft IN", "SPK1 OUT",
|
|
"SpkrRight IN", "SPK2 OUT";
|
|
|
|
qcom,tasha-mclk-clk-freq = <12288000>;
|
|
asoc-platform = <&pcm0>, <&pcm1>, <&voip>, <&voice>,
|
|
<&loopback>, <&hostless>, <&afe>, <&routing>,
|
|
<&pcm_dtmf>, <&host_pcm>;
|
|
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
|
|
"msm-voip-dsp", "msm-pcm-voice",
|
|
"msm-pcm-loopback", "msm-pcm-hostless",
|
|
"msm-pcm-afe", "msm-pcm-routing",
|
|
"msm-pcm-dtmf", "msm-voice-host-pcm";
|
|
asoc-cpu = <&dai_pri_auxpcm>, <&mi2s_prim>, <&dtmf_tx>,
|
|
<&rx_capture_tx>, <&rx_playback_rx>,
|
|
<&tx_capture_tx>, <&tx_playback_rx>,
|
|
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
|
|
<&afe_proxy_tx>, <&incall_record_rx>,
|
|
<&incall_record_tx>, <&incall_music_rx>;
|
|
asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.0",
|
|
"msm-dai-stub-dev.4", "msm-dai-stub-dev.5",
|
|
"msm-dai-stub-dev.6", "msm-dai-stub-dev.7",
|
|
"msm-dai-stub-dev.8", "msm-dai-q6-dev.224",
|
|
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
|
|
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
|
|
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773";
|
|
asoc-codec = <&stub_codec>;
|
|
asoc-codec-names = "msm-stub-codec.1";
|
|
qcom,aux-codec = <&stub_codec>;
|
|
};
|
|
|
|
qcom,msm-adsp-loader {
|
|
compatible = "qcom,adsp-loader";
|
|
qcom,adsp-state = <0>;
|
|
qcom,proc-img-to-load = "modem";
|
|
};
|
|
|
|
qcom,msm-audio-ion {
|
|
compatible = "qcom,msm-audio-ion";
|
|
};
|
|
|
|
pcm0: qcom,msm-pcm {
|
|
compatible = "qcom,msm-pcm-dsp";
|
|
qcom,msm-pcm-dsp-id = <0>;
|
|
};
|
|
|
|
routing: qcom,msm-pcm-routing {
|
|
compatible = "qcom,msm-pcm-routing";
|
|
};
|
|
|
|
pcm1: qcom,msm-pcm-low-latency {
|
|
compatible = "qcom,msm-pcm-dsp";
|
|
qcom,msm-pcm-dsp-id = <1>;
|
|
qcom,msm-pcm-low-latency;
|
|
qcom,latency-level = "ultra";
|
|
};
|
|
|
|
qcom,msm-compr-dsp {
|
|
compatible = "qcom,msm-compr-dsp";
|
|
};
|
|
|
|
voip: qcom,msm-voip-dsp {
|
|
compatible = "qcom,msm-voip-dsp";
|
|
};
|
|
|
|
voice: qcom,msm-pcm-voice {
|
|
compatible = "qcom,msm-pcm-voice";
|
|
qcom,destroy-cvd;
|
|
};
|
|
|
|
stub_codec: qcom,msm-stub-codec {
|
|
compatible = "qcom,msm-stub-codec";
|
|
};
|
|
|
|
qcom,msm-dai-fe {
|
|
compatible = "qcom,msm-dai-fe";
|
|
};
|
|
|
|
afe: qcom,msm-pcm-afe {
|
|
compatible = "qcom,msm-pcm-afe";
|
|
};
|
|
|
|
hostless: qcom,msm-pcm-hostless {
|
|
compatible = "qcom,msm-pcm-hostless";
|
|
};
|
|
|
|
host_pcm: qcom,msm-voice-host-pcm {
|
|
compatible = "qcom,msm-voice-host-pcm";
|
|
};
|
|
|
|
loopback: qcom,msm-pcm-loopback {
|
|
compatible = "qcom,msm-pcm-loopback";
|
|
};
|
|
|
|
qcom,msm-dai-stub {
|
|
compatible = "qcom,msm-dai-stub";
|
|
dtmf_tx: qcom,msm-dai-stub-dtmf-tx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <4>;
|
|
};
|
|
|
|
rx_capture_tx: qcom,msm-dai-stub-host-rx-capture-tx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <5>;
|
|
};
|
|
|
|
rx_playback_rx: qcom,msm-dai-stub-host-rx-playback-rx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <6>;
|
|
};
|
|
|
|
tx_capture_tx: qcom,msm-dai-stub-host-tx-capture-tx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <7>;
|
|
};
|
|
|
|
tx_playback_rx: qcom,msm-dai-stub-host-tx-playback-rx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <8>;
|
|
};
|
|
};
|
|
|
|
qcom,msm-dai-q6 {
|
|
compatible = "qcom,msm-dai-q6";
|
|
afe_pcm_rx: qcom,msm-dai-q6-be-afe-pcm-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <224>;
|
|
};
|
|
|
|
afe_pcm_tx: qcom,msm-dai-q6-be-afe-pcm-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <225>;
|
|
};
|
|
|
|
afe_proxy_rx: qcom,msm-dai-q6-afe-proxy-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <241>;
|
|
};
|
|
|
|
afe_proxy_tx: qcom,msm-dai-q6-afe-proxy-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <240>;
|
|
};
|
|
|
|
incall_record_rx: qcom,msm-dai-q6-incall-record-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32771>;
|
|
};
|
|
|
|
incall_record_tx: qcom,msm-dai-q6-incall-record-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32772>;
|
|
};
|
|
|
|
incall_music_rx: qcom,msm-dai-q6-incall-music-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32773>;
|
|
};
|
|
};
|
|
|
|
pcm_dtmf: qcom,msm-pcm-dtmf {
|
|
compatible = "qcom,msm-pcm-dtmf";
|
|
};
|
|
|
|
dai_pri_auxpcm: qcom,msm-pri-auxpcm {
|
|
compatible = "qcom,msm-auxpcm-dev";
|
|
qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
|
|
qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
|
|
qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
|
|
qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-data = <0>, <0>;
|
|
qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
|
|
qcom,msm-auxpcm-interface = "primary";
|
|
};
|
|
|
|
qcom,msm-dai-mi2s {
|
|
compatible = "qcom,msm-dai-mi2s";
|
|
mi2s_prim: qcom,msm-dai-q6-mi2s-prim {
|
|
compatible = "qcom,msm-dai-q6-mi2s";
|
|
qcom,msm-dai-q6-mi2s-dev-id = <0>;
|
|
qcom,msm-mi2s-rx-lines = <2>;
|
|
qcom,msm-mi2s-tx-lines = <1>;
|
|
pinctrl-names = "default", "idle";
|
|
pinctrl-0 = <&pri_mi2s_ws_active
|
|
&pri_mi2s_sck_active
|
|
&pri_mi2s_dout_active>,
|
|
<&pri_mi2s_din_active>;
|
|
pinctrl-1 = <&pri_mi2s_ws_sleep
|
|
&pri_mi2s_sck_sleep
|
|
&pri_mi2s_dout_sleep>,
|
|
<&pri_mi2s_din_sleep>;
|
|
};
|
|
};
|
|
|
|
sdhc_1: sdhci@7824000 {
|
|
compatible = "qcom,sdhci-msm";
|
|
reg = <0x07824900 0x500>, <0x07824000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
|
|
interrupts = <0 123 0>, <0 138 0>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
|
|
qcom,devfreq,freq-table = <20000000 50000000>;
|
|
|
|
qcom,msm-bus,name = "sdhc1";
|
|
qcom,msm-bus,num-cases = <8>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
|
|
<78 512 1600 3200>, /* 400 KB/s*/
|
|
<78 512 80000 160000>, /* 20 MB/s */
|
|
<78 512 100000 200000>, /* 25 MB/s */
|
|
<78 512 200000 400000>, /* 50 MB/s */
|
|
<78 512 400000 800000>, /* 100 MB/s */
|
|
<78 512 400000 800000>, /* 200 MB/s */
|
|
<78 512 2048000 4096000>; /* Max. bandwidth */
|
|
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
|
|
100000000 200000000 4294967295>;
|
|
clocks = <&clock_gcc clk_gcc_sdcc1_ahb_clk>,
|
|
<&clock_gcc clk_gcc_sdcc1_apps_clk>;
|
|
clock-names = "iface_clk", "core_clk";
|
|
|
|
qcom,pm-qos-cpu-groups = <0x0>;
|
|
qcom,pm-qos-cmdq-latency-us = <70>;
|
|
qcom,pm-qos-legacy-latency-us = <70>;
|
|
qcom,pm-qos-irq-type = "affine_cores";
|
|
qcom,pm-qos-irq-cpu = <0>;
|
|
qcom,pm-qos-irq-latency = <70>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&gdsc_usb30 {
|
|
reg = <0x185e078 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_pcie {
|
|
reg = <0x0185d044 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
#include "msm-pmdcalifornium-rpm-regulator.dtsi"
|
|
#include "msm-pmdcalifornium.dtsi"
|
|
#include "mdmcalifornium-regulator.dtsi"
|
|
#include "mdmcalifornium-usb.dtsi"
|
|
|
|
&pmdcalifornium_pon {
|
|
interrupts = <0x0 0x8 0x0>;
|
|
interrupt-names = "kpdpwr";
|
|
qcom,system-reset;
|
|
|
|
qcom,pon_1 {
|
|
qcom,pon-type = <0>;
|
|
qcom,pull-up = <1>;
|
|
linux,code = <116>;
|
|
};
|
|
};
|