1206 lines
30 KiB
Plaintext
1206 lines
30 KiB
Plaintext
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/msm-clocks-9640.h>
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#include <dt-bindings/clock/msm-clocks-a7.h>
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#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
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/ {
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model = "Qualcomm Technologies, Inc. MSM 9640";
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compatible = "qcom,mdm9640";
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qcom,msm-id = <234 0x10000>, <235 0x10000>, <236 0x10000>,
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<237 0x10000>, <238 0x10000>;
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interrupt-parent = <&intc>;
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aliases {
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smd7 = &smdtty_data1;
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smd8 = &smdtty_data4;
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smd11 = &smdtty_data11;
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smd21 = &smdtty_data21;
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smd36 = &smdtty_loopback;
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qpic_nand1 = &qnand_1;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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peripheral1_mem: peripheral1_region@0x81c00000 {
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compatible = "removed-dma-pool";
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reg = <0x81C00000 0x5F00000>;
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no-map;
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label = "peripheral1_mem";
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};
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peripheral2_mem: peripheral2_region@0x87d00000 {
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compatible = "removed-dma-pool";
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no-map;
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reg = <0x87d00000 0x300000>;
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label = "peripheral2_mem";
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};
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audio_mem: audio_region@0 {
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compatible = "shared-dma-pool";
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reusable;
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size = <0 0x400000>;
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};
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};
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cpus {
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#size-cells = <0>;
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#address-cells = <1>;
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x0>;
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};
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};
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soc: soc { };
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};
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#include "mdm9640-smp2p.dtsi"
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#include "mdm9640-ipcrouter.dtsi"
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#include "msm-gdsc.dtsi"
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#include "mdm9640-bus.dtsi"
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#include "mdm9640-ion.dtsi"
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#include "mdm9640-cc.dtsi"
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#include "mdm9640-pm.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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intc: interrupt-controller@b000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x0b000000 0x1000>,
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<0x0b002000 0x1000>;
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};
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qcom,mpm2-sleep-counter@4a3000 {
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compatible = "qcom,mpm2-sleep-counter";
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reg = <0x4a3000 0x1000>;
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clock-frequency = <32768>;
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};
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qcom,msm-imem@8600000 {
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compatible = "qcom,msm-imem";
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reg = <0x8600000 0x1000>; /* Address and size of IMEM */
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ranges = <0x0 0x8600000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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mem_dump_table@10 {
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compatible = "qcom,msm-imem-mem_dump_table";
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reg = <0x10 8>;
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};
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restart_reason@65c {
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compatible = "qcom,msm-imem-restart_reason";
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reg = <0x65c 4>;
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};
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boot_stats@6b0 {
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compatible = "qcom,msm-imem-boot_stats";
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reg = <0x6b0 32>;
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};
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pil@94c {
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compatible = "qcom,msm-imem-pil";
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reg = <0x94c 200>;
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};
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};
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restart@4ab000 {
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compatible = "qcom,pshold";
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reg = <0x4ab000 0x4>;
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};
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timer@b020000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0xb020000 0x1000>;
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clock-frequency = <19200000>;
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frame@b021000 {
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frame-number = <0>;
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interrupts = <0 7 0x4>,
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<0 6 0x4>;
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reg = <0xb021000 0x1000>,
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<0xb022000 0x1000>;
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};
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frame@b023000 {
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frame-number = <1>;
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interrupts = <0 8 0x4>;
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reg = <0xb023000 0x1000>;
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status = "disabled";
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};
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frame@b024000 {
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frame-number = <2>;
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interrupts = <0 9 0x4>;
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reg = <0xb024000 0x1000>;
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status = "disabled";
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};
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frame@b025000 {
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frame-number = <3>;
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interrupts = <0 10 0x4>;
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reg = <0xb025000 0x1000>;
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status = "disabled";
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};
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frame@b026000 {
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frame-number = <4>;
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interrupts = <0 11 0x4>;
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reg = <0xb026000 0x1000>;
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status = "disabled";
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};
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frame@b027000 {
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frame-number = <5>;
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interrupts = <0 12 0x4>;
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reg = <0xb027000 0x1000>;
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status = "disabled";
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};
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frame@b028000 {
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frame-number = <6>;
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interrupts = <0 13 0x4>;
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reg = <0xb028000 0x1000>;
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status = "disabled";
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};
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frame@b029000 {
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frame-number = <7>;
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interrupts = <0 14 0x4>;
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reg = <0xb029000 0x1000>;
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status = "disabled";
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};
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};
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blsp1_uart1: serial@78af000 {
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compatible = "qcom,msm-lsuart-v14";
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reg = <0x78af000 0x200>;
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interrupts = <0 107 0>;
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clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,
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<&clock_gcc clk_gcc_blsp1_ahb_clk>;
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clock-names = "core_clk", "iface_clk";
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status = "disabled";
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};
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blsp1_uart3: serial@78b1000 {
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compatible = "qcom,msm-lsuart-v14";
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reg = <0x78b1000 0x200>;
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interrupts = <0 109 0>;
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clocks = <&clock_gcc clk_gcc_blsp1_uart3_apps_clk>,
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<&clock_gcc clk_gcc_blsp1_ahb_clk>;
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clock-names = "core_clk", "iface_clk";
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status = "disabled";
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};
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blsp1_uart2: uart@0x78b0000 { /* BLSP1 UART2 */
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compatible = "qcom,msm-hsuart-v14";
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reg = <0x78b0000 0x200>,
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<0x7884000 0x23000>;
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reg-names = "core_mem", "bam_mem";
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interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
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#address-cells = <0>;
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interrupt-parent = <&blsp1_uart2>;
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interrupts = <0 1 2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xffffffff>;
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interrupt-map = <0 &intc 0 108 0
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1 &intc 0 238 0>;
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qcom,inject-rx-on-wakeup;
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qcom,rx-char-to-inject = <0xFD>;
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qcom,bam-tx-ep-pipe-index = <2>;
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qcom,bam-rx-ep-pipe-index = <3>;
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qcom,master-id = <86>;
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clock-names = "core_clk", "iface_clk";
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clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
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<&clock_gcc clk_gcc_blsp1_ahb_clk>;
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qcom,msm-bus,name = "buart2";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<86 512 0 0>,
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<86 512 500 800>;
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status = "disabled";
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};
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bt_qca6174 {
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compatible = "qca,qca6174";
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qca,bt-reset-gpio = <&pmd9635_gpios 6 0>; /* BT_EN */
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qca,bt-vdd-pa-supply = <&wlan_vreg>;
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};
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qcom,sps {
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compatible = "qcom,msm_sps_4k";
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qcom,device-type = <3>;
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qcom,pipe-attr-ee;
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};
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ipa_hw: qcom,ipa@07900000 {
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compatible = "qcom,ipa";
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reg = <0x07900000 0x4EFFC>,
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<0x07904000 0x26934>;
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reg-names = "ipa-base", "bam-base";
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interrupts = <0 31 0>,
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<0 34 0>;
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interrupt-names = "ipa-irq", "bam-irq";
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qcom,ipa-hw-ver = <5>; /* IPA core version = IPAv2.5 */
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qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */
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qcom,ee = <0>;
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qcom,use-ipa-tethering-bridge;
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qcom,ipa-bam-remote-mode;
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qcom,modem-cfg-emb-pipe-flt;
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clock-names = "core_clk";
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clocks = <&clock_gcc clk_ipa_clk>;
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qcom,msm-bus,name = "ipa";
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qcom,msm-bus,num-cases = <3>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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<90 512 0 0>, <90 585 0 0>, /* No vote */
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<90 512 80000 640000>, <90 585 80000 640000>, /* SVS */
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<90 512 206000 960000>, <90 585 206000 960000>; /* PERF */
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qcom,bus-vector-names = "MIN", "SVS", "PERF";
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};
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qcom,rmnet-ipa {
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compatible = "qcom,rmnet-ipa";
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};
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clock_cpu: qcom,clock-a7@0b010008 {
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compatible = "qcom,clock-a7-9640";
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reg = <0x0B010008 0x8>;
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reg-names = "rcg-base";
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clock-names = "clk-1", "clk-5";
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clocks = <&clock_gcc clk_gpll0_ao>,
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<&clock_a7pll clk_a7pll_clk>;
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qcom,speed0-bin-v0 =
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< 0 RPM_SMD_REGULATOR_LEVEL_NONE>,
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< 400000000 RPM_SMD_REGULATOR_LEVEL_SVS>,
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< 787200000 RPM_SMD_REGULATOR_LEVEL_NOM>,
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<1190400000 RPM_SMD_REGULATOR_LEVEL_TURBO>;
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cpu-vdd-supply = <&pmd9635_s5_level_ao>;
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#clock-cells = <1>;
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};
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cpubw: qcom,cpubw {
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compatible = "qcom,devbw";
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governor = "cpufreq";
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qcom,src-dst-ports = <1 512>;
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qcom,active-only;
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qcom,bw-tbl =
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< 916 /* 120 MHz */ >,
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< 3082 /* 404 MHz */ >,
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< 3952 /* 518 MHz */ >;
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};
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devfreq-cpufreq {
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cpubw-cpufreq {
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target-dev = <&cpubw>;
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cpu-to-dev-map =
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< 600000 916 >,
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< 787200 3082 >,
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< 1190400 3952 >;
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};
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};
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qcom,msm-cpufreq {
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reg = <0 4>;
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compatible = "qcom,msm-cpufreq";
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clocks = <&clock_cpu clk_a7ssmux>,
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<&clock_cpu clk_a7ssmux>,
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<&clock_cpu clk_a7ssmux>,
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<&clock_cpu clk_a7ssmux>;
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clock-names = "cpu0_clk", "cpu1_clk",
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"cpu2_clk", "cpu3_clk";
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qcom,cpufreq-table =
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< 300000 >,
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< 384000 >,
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< 600000 >,
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< 787200 >,
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< 998400 >,
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< 1190400 >;
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};
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dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
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#dma-cells = <4>;
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compatible = "qcom,sps-dma";
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reg = <0x7884000 0x23000>;
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interrupts = <0 238 0>;
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qcom,summing-threshold = <10>;
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};
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spmi_bus: qcom,spmi@200f000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x200f000 0x1000>,
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<0x2400000 0x400000>,
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<0x2c00000 0x400000>,
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<0x3800000 0x200000>,
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<0x200a000 0x2100>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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interrupts = <0 190 0>;
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qcom,pmic-arb-channel = <0>;
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qcom,pmic-arb-ee = <0>;
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#interrupt-cells = <3>;
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interrupt-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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qcom,not-wakeup; /* Needed until MPM is fully configured. */
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};
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qcom,ipc-spinlock@1905000 {
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compatible = "qcom,ipc-spinlock-sfpb";
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reg = <0x1905000 0x8000>;
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qcom,num-locks = <8>;
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};
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qcom,smem@87e80000 {
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compatible = "qcom,smem";
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reg = <0x87e80000 0xc0000>,
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<0xb011008 0x4>,
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<0x60000 0x8000>,
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<0x193D000 0x8>;
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reg-names = "smem", "irq-reg-base", "aux-mem1",
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"smem_targ_info_reg";
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qcom,mpu-enabled;
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qcom,smd-modem {
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compatible = "qcom,smd";
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qcom,smd-edge = <0>;
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qcom,smd-irq-offset = <0x0>;
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qcom,smd-irq-bitmask = <0x1000>;
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interrupts = <0 25 1>;
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label = "modem";
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};
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qcom,smsm-modem {
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compatible = "qcom,smsm";
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qcom,smsm-edge = <0>;
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qcom,smsm-irq-offset = <0x0>;
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qcom,smsm-irq-bitmask = <0x2000>;
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interrupts = <0 26 1>;
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};
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qcom,smd-rpm {
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compatible = "qcom,smd";
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qcom,smd-edge = <15>;
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qcom,smd-irq-offset = <0x0>;
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qcom,smd-irq-bitmask = <0x1>;
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interrupts = <0 168 1>;
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label = "rpm";
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qcom,irq-no-suspend;
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qcom,not-loadable;
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};
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};
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rpm_bus: qcom,rpm-smd {
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compatible = "qcom,rpm-smd";
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rpm-channel-name = "rpm_requests";
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rpm-channel-type = <15>; /* SMD_APPS_RPM */
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};
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qcom,smdpkt {
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compatible = "qcom,smdpkt";
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qcom,smdpkt-data5-cntl {
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qcom,smdpkt-remote = "modem";
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qcom,smdpkt-port-name = "DATA5_CNTL";
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qcom,smdpkt-dev-name = "smdcntl0";
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};
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qcom,smdpkt-data22 {
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qcom,smdpkt-remote = "modem";
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qcom,smdpkt-port-name = "DATA22";
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qcom,smdpkt-dev-name = "smd22";
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};
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qcom,smdpkt-data40-cntl {
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qcom,smdpkt-remote = "modem";
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qcom,smdpkt-port-name = "DATA40_CNTL";
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qcom,smdpkt-dev-name = "smdcntl8";
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};
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qcom,smdpkt-apr-apps2 {
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qcom,smdpkt-remote = "modem";
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qcom,smdpkt-port-name = "apr_apps2";
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qcom,smdpkt-dev-name = "apr_apps2";
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};
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qcom,smdpkt-loopback {
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qcom,smdpkt-remote = "modem";
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qcom,smdpkt-port-name = "LOOPBACK";
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qcom,smdpkt-dev-name = "smd_pkt_loopback";
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};
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};
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qcom,smdtty {
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compatible = "qcom,smdtty";
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smdtty_data1: qcom,smdtty-data1 {
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qcom,smdtty-remote = "modem";
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qcom,smdtty-port-name = "DATA1";
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};
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smdtty_data4: qcom,smdtty-data4 {
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qcom,smdtty-remote = "modem";
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qcom,smdtty-port-name = "DATA4";
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};
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smdtty_data11: qcom,smdtty-data11 {
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qcom,smdtty-remote = "modem";
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qcom,smdtty-port-name = "DATA11";
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};
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smdtty_data21: qcom,smdtty-data21 {
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qcom,smdtty-remote = "modem";
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qcom,smdtty-port-name = "DATA21";
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};
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smdtty_loopback: smdtty-loopback {
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qcom,smdtty-remote = "modem";
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qcom,smdtty-port-name = "LOOPBACK";
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qcom,smdtty-dev-name = "LOOPBACK_TTY";
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};
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};
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qcom,msm-thermal {
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compatible = "qcom,msm-thermal";
|
|
qcom,sensor-id = <0>;
|
|
qcom,poll-ms = <250>;
|
|
qcom,limit-temp = <60>;
|
|
qcom,temp-hysteresis = <10>;
|
|
qcom,freq-step = <2>;
|
|
qcom,mx-restriction-temp = <5>;
|
|
qcom,mx-restriction-temp-hysteresis = <5>;
|
|
qcom,mx-retention-min =
|
|
<RPM_SMD_REGULATOR_LEVEL_RETENTION_PLUS>;
|
|
vdd-mx-supply = <&pmd9635_l9_level>;
|
|
qcom,cx-retention-min =
|
|
<RPM_SMD_REGULATOR_LEVEL_RETENTION_PLUS>;
|
|
vdd-cx-supply = <&pmd9635_s5_level>;
|
|
qcom,vdd-restriction-temp = <5>;
|
|
qcom,vdd-restriction-temp-hysteresis = <10>;
|
|
vdd-dig-supply = <&pmd9635_s5_floor_level>;
|
|
qcom,cpr-temp-band-enable;
|
|
|
|
qcom,vdd-dig-rstr{
|
|
qcom,vdd-rstr-reg = "vdd-dig";
|
|
qcom,levels = <RPM_SMD_REGULATOR_LEVEL_NOM
|
|
RPM_SMD_REGULATOR_LEVEL_TURBO
|
|
RPM_SMD_REGULATOR_LEVEL_TURBO>;
|
|
qcom,min-level = <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
|
|
};
|
|
};
|
|
|
|
qcom,sensor-information {
|
|
compatible = "qcom,sensor-information";
|
|
sensor_information0: qcom,sensor-information-0 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor0";
|
|
};
|
|
|
|
sensor_information1: qcom,sensor-information-1 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor1";
|
|
qcom,alias-name = "cpu0";
|
|
};
|
|
|
|
sensor_information2: qcom,sensor-information-2 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor2";
|
|
};
|
|
|
|
sensor_information3: qcom,sensor-information-3 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor4";
|
|
};
|
|
|
|
sensor_information4: qcom,sensor-information-4 {
|
|
qcom,sensor-type = "tsens";
|
|
qcom,sensor-name = "tsens_tz_sensor5";
|
|
};
|
|
|
|
sensor_information5: qcom,sensor-information-5 {
|
|
qcom,sensor-type = "adc";
|
|
qcom,sensor-name = "pa_therm0";
|
|
};
|
|
};
|
|
|
|
qcom,wdt@b017000 {
|
|
compatible = "qcom,msm-watchdog";
|
|
reg = <0xb017000 0x1000>;
|
|
reg-names = "wdt-base";
|
|
interrupts = <1 3 0>, <1 2 0>;
|
|
qcom,bark-time = <11000>;
|
|
qcom,pet-time = <10000>;
|
|
};
|
|
|
|
qcom,msm-rtb {
|
|
compatible = "qcom,msm-rtb";
|
|
qcom,rtb-size = <0x100000>;
|
|
};
|
|
|
|
jtag_fuse: jtagfuse@5e01c {
|
|
compatible = "qcom,jtag-fuse";
|
|
reg = <0x5e01c 0x8>;
|
|
reg-names = "fuse-base";
|
|
};
|
|
|
|
jtag_mm0: jtagmm@842000 {
|
|
compatible = "qcom,jtag-mm";
|
|
reg = <0x842000 0x1000>,
|
|
<0x840000 0x1000>;
|
|
reg-names = "etm-base","debug-base";
|
|
|
|
qcom,coresight-jtagmm-cpu = <&CPU0>;
|
|
|
|
clocks = <&clock_gcc clk_qdss_clk>,
|
|
<&clock_gcc clk_qdss_a_clk>;
|
|
clock-names = "core_clk", "core_a_clk";
|
|
};
|
|
|
|
qnand_1: nand@7980000 {
|
|
compatible = "qcom,msm-nand";
|
|
reg = <0x07980000 0x1000>,
|
|
<0x07984000 0x1a000>;
|
|
reg-names = "nand_phys",
|
|
"bam_phys";
|
|
interrupts = <0 247 0>;
|
|
interrupt-names = "bam_irq";
|
|
|
|
qcom,msm-bus,name = "qpic_nand";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
|
|
qcom,msm-bus,vectors-KBps =
|
|
<91 512 0 0>,
|
|
/* Voting for max b/w on PNOC bus for now */
|
|
<91 512 400000 800000>;
|
|
|
|
clock-names = "core_clk";
|
|
clocks = <&clock_gcc clk_qpic_clk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb3: ssusb@8a00000{
|
|
compatible = "qcom,dwc-usb3-msm";
|
|
reg = <0x08a00000 0xfc000>,
|
|
<0x0007e000 0x400>;
|
|
reg-names = "core_base", "ahb2phy_base";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
interrupt-parent = <&usb3>;
|
|
interrupts = <0 1 2>;
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0x0 0xffffffff>;
|
|
interrupt-map = <0x0 0 &intc 0 202 0
|
|
0x0 1 &intc 0 180 0
|
|
0x0 2 &spmi_bus 0x0 0x0 0xc3 0x0>;
|
|
interrupt-names = "hs_phy_irq", "pwr_event_irq",
|
|
"pmic_id_irq";
|
|
USB3_GDSC-supply = <&gdsc_usb30>;
|
|
vdda33-supply = <&pmd9635_l10>;
|
|
qcom,usb-dbm = <&dbm_1p5>;
|
|
|
|
qcom,msm-bus,name = "usb3";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<61 512 0 0>,
|
|
<61 512 0 640000>;
|
|
qcom,lpm-to-suspend-delay-ms = <2000>;
|
|
|
|
clocks = <&clock_gcc clk_gcc_usb30_master_clk>,
|
|
<&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>,
|
|
<&clock_gcc clk_gcc_usb30_mock_utmi_clk>,
|
|
<&clock_gcc clk_gcc_usb30_sleep_clk>,
|
|
<&clock_gcc clk_cxo_dwc3_clk>,
|
|
<&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>;
|
|
|
|
clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk",
|
|
"xo", "cfg_ahb_clk";
|
|
|
|
dwc3@8a00000 {
|
|
compatible = "synopsys,dwc3";
|
|
reg = <0x08a00000 0xf8000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <0 131 0>;
|
|
usb-phy = <&qusb_phy>, <&ssphy>;
|
|
snps,nominal-elastic-buffer;
|
|
snps,hsphy-auto-suspend-disable;
|
|
snps,ssphy-auto-suspend-disable;
|
|
snps,has-lpm-erratum;
|
|
snps,lpm-nyet-threshold = /bits/ 8 <0x8>;
|
|
snps,hird-threshold = /bits/ 8 <0x7>;
|
|
snps,bus-suspend-enable;
|
|
snps,usb3-u1u2-disable;
|
|
};
|
|
|
|
qcom,usbbam@8b04000 {
|
|
compatible = "qcom,usb-bam-msm";
|
|
reg = <0x08b04000 0x1b000>;
|
|
interrupts = <0 132 0>;
|
|
|
|
qcom,bam-type = <0>;
|
|
qcom,usb-bam-fifo-baseaddr = <0x08601000>;
|
|
qcom,usb-bam-num-pipes = <16>;
|
|
qcom,ignore-core-reset-ack;
|
|
qcom,disable-clk-gating;
|
|
qcom,usb-bam-override-threshold = <0x4001>;
|
|
qcom,usb-bam-max-mbps-highspeed = <400>;
|
|
qcom,usb-bam-max-mbps-superspeed = <3600>;
|
|
qcom,reset-bam-on-connect;
|
|
|
|
qcom,pipe0 {
|
|
label = "ssusb-ipa-out-0";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <0>;
|
|
qcom,pipe-num = <0>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,src-bam-pipe-index = <1>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe1 {
|
|
label = "ssusb-ipa-in-0";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <0>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,dst-bam-pipe-index = <0>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe2 {
|
|
label = "ssusb-qdss-in-0";
|
|
qcom,usb-bam-mem-type = <2>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <0>;
|
|
qcom,peer-bam = <0>;
|
|
qcom,peer-bam-physical-address = <0x00884000>;
|
|
qcom,src-bam-pipe-index = <0>;
|
|
qcom,dst-bam-pipe-index = <2>;
|
|
qcom,data-fifo-offset = <0x0>;
|
|
qcom,data-fifo-size = <0xC00>;
|
|
qcom,descriptor-fifo-offset = <0xC00>;
|
|
qcom,descriptor-fifo-size = <0x400>;
|
|
};
|
|
qcom,pipe3 {
|
|
label = "ssusb-ipa-out-1";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <0>;
|
|
qcom,pipe-num = <1>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,src-bam-pipe-index = <3>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe4 {
|
|
label = "ssusb-ipa-in-1";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <1>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,dst-bam-pipe-index = <2>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe5 {
|
|
label = "ssusb-ipa-out-2";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <0>;
|
|
qcom,pipe-num = <2>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,src-bam-pipe-index = <5>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe6 {
|
|
label = "ssusb-ipa-in-2";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <2>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,dst-bam-pipe-index = <4>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe7 {
|
|
label = "ssusb-ipa-out-3";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <0>;
|
|
qcom,pipe-num = <3>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,src-bam-pipe-index = <6>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
qcom,pipe8 {
|
|
label = "ssusb-ipa-in-3";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <3>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,dst-bam-pipe-index = <7>;
|
|
qcom,data-fifo-size = <0x8000>;
|
|
qcom,descriptor-fifo-size = <0x2000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
android_usb@86000c8 {
|
|
reg = <0x086000c8 0xc8>;
|
|
compatible = "qcom,android-usb";
|
|
qcom,pm-qos-latency = <101 2001 30001>;
|
|
};
|
|
|
|
qusb_phy: qusb@79000 {
|
|
compatible = "qcom,qusb2phy";
|
|
reg = <0x00079000 0x180>,
|
|
<0x08af8800 0x400>;
|
|
reg-names = "qusb_phy_base",
|
|
"qscratch_base";
|
|
vdd-supply = <&pmd9635_l4>;
|
|
vdda18-supply = <&pmd9635_l8>;
|
|
vdda33-supply = <&pmd9635_l10>;
|
|
qcom,vdd-voltage-level = <0 1000000 1000000>;
|
|
qcom,qusb-tune = <0xa06393d5>;
|
|
phy_type = "utmi";
|
|
|
|
clocks = <&clock_gcc clk_ln_bb_clk>,
|
|
<&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,
|
|
<&clock_gcc clk_gcc_qusb2a_phy_reset>;
|
|
|
|
clock-names = "ref_clk_src", "cfg_ahb_clk", "phy_reset";
|
|
};
|
|
|
|
ssphy: ssphy@78000 {
|
|
compatible = "qcom,usb-ssphy-qmp-v1";
|
|
reg = <0x00078000 0x45c>,
|
|
<0x01947244 0x4>;
|
|
reg-names = "qmp_phy_base",
|
|
"vls_clamp_reg";
|
|
vdd-supply = <&pmd9635_l4>;
|
|
vdda18-supply = <&pmd9635_l8>;
|
|
qcom,vdd-voltage-level = <0 1000000 1000000>;
|
|
qcom,vbus-valid-override;
|
|
qcom,ext-vbus-id;
|
|
qcom,override-pll-calibration;
|
|
|
|
clocks = <&clock_gcc clk_gcc_usb3_aux_clk>,
|
|
<&clock_gcc clk_gcc_usb3_pipe_clk>,
|
|
<&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,
|
|
<&clock_gcc clk_gcc_usb3_phy_reset>,
|
|
<&clock_gcc clk_gcc_usb3phy_phy_reset>,
|
|
<&clock_gcc clk_usb_ss_ldo>;
|
|
|
|
clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk",
|
|
"phy_reset", "phy_phy_reset", "ldo_clk";
|
|
};
|
|
|
|
dbm_1p5: dbm@8af8000 {
|
|
compatible = "qcom,usb-dbm-1p5";
|
|
reg = <0x08af8000 0x400>;
|
|
qcom,reset-ep-after-lpm-resume;
|
|
};
|
|
|
|
tsens: tsens@4a8000 {
|
|
compatible = "qcom,mdm9640-tsens";
|
|
reg = <0x4a8000 0x2000>,
|
|
<0x5c000 0x1000>;
|
|
reg-names = "tsens_physical", "tsens_eeprom_physical";
|
|
interrupts = <0 184 0>;
|
|
interrupt-names = "tsens-upper-lower";
|
|
qcom,sensors = <5>;
|
|
qcom,slope = <2901 2846 3200 3200 3200>;
|
|
qcom,sensor-id = <0 1 2 4 5>;
|
|
};
|
|
|
|
wcd9xxx_intc: wcd9xxx-irq {
|
|
compatible = "qcom,wcd9xxx-irq";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
interrupts = <94 0>;
|
|
interrupt-names = "cdc-int";
|
|
};
|
|
|
|
sound {
|
|
compatible = "qcom,mdm9640-audio-tomtom";
|
|
qcom,model = "mdm9640-tomtom-i2s-snd-card";
|
|
|
|
qcom,audio-routing =
|
|
"RX_BIAS", "MCLK",
|
|
"LDO_H", "MCLK",
|
|
"AMIC1", "MIC BIAS1 External",
|
|
"MIC BIAS1 External", "Handset Mic",
|
|
"AMIC2", "MIC BIAS2 External",
|
|
"MIC BIAS2 External", "Headset Mic",
|
|
"AMIC3", "MIC BIAS2 External",
|
|
"MIC BIAS2 External", "ANCRight Headset Mic",
|
|
"AMIC4", "MIC BIAS2 External",
|
|
"MIC BIAS2 External", "ANCLeft Headset Mic",
|
|
"DMIC1", "MIC BIAS1 External",
|
|
"MIC BIAS1 External", "Digital Mic1",
|
|
"DMIC3", "MIC BIAS3 External",
|
|
"MIC BIAS3 External", "Digital Mic3";
|
|
|
|
qcom,tomtom-mclk-clk-freq = <12288000>;
|
|
asoc-platform = <&pcm0>, <&pcm1>, <&voip>, <&voice>,
|
|
<&loopback>, <&hostless>, <&afe>, <&routing>,
|
|
<&pcm_dtmf>, <&host_pcm>;
|
|
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
|
|
"msm-voip-dsp", "msm-pcm-voice", "msm-pcm-loopback",
|
|
"msm-pcm-hostless", "msm-pcm-afe",
|
|
"msm-pcm-routing", "msm-pcm-dtmf", "msm-voice-host-pcm";
|
|
asoc-cpu = <&dai_pri_auxpcm>, <&mi2s_prim>, <&dtmf_tx>,
|
|
<&rx_capture_tx>, <&rx_playback_rx>,
|
|
<&tx_capture_tx>, <&tx_playback_rx>,
|
|
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
|
|
<&afe_proxy_tx>, <&incall_record_rx>,
|
|
<&incall_record_tx>, <&incall_music_rx>;
|
|
asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.0",
|
|
"msm-dai-stub-dev.4", "msm-dai-stub-dev.5",
|
|
"msm-dai-stub-dev.6", "msm-dai-stub-dev.7",
|
|
"msm-dai-stub-dev.8", "msm-dai-q6-dev.224",
|
|
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
|
|
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
|
|
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773";
|
|
asoc-codec = <&stub_codec>;
|
|
asoc-codec-names = "msm-stub-codec.1";
|
|
};
|
|
|
|
qcom,msm-adsp-loader {
|
|
compatible = "qcom,adsp-loader";
|
|
qcom,adsp-state = <0>;
|
|
qcom,proc-img-to-load = "modem";
|
|
};
|
|
|
|
qcom,msm-audio-ion {
|
|
compatible = "qcom,msm-audio-ion";
|
|
};
|
|
|
|
pcm0: qcom,msm-pcm {
|
|
compatible = "qcom,msm-pcm-dsp";
|
|
qcom,msm-pcm-dsp-id = <0>;
|
|
};
|
|
|
|
routing: qcom,msm-pcm-routing {
|
|
compatible = "qcom,msm-pcm-routing";
|
|
};
|
|
|
|
pcm1: qcom,msm-pcm-low-latency {
|
|
compatible = "qcom,msm-pcm-dsp";
|
|
qcom,msm-pcm-dsp-id = <1>;
|
|
qcom,msm-pcm-low-latency;
|
|
qcom,latency-level = "ultra";
|
|
};
|
|
|
|
qcom,msm-compr-dsp {
|
|
compatible = "qcom,msm-compr-dsp";
|
|
};
|
|
|
|
voip: qcom,msm-voip-dsp {
|
|
compatible = "qcom,msm-voip-dsp";
|
|
};
|
|
|
|
voice: qcom,msm-pcm-voice {
|
|
compatible = "qcom,msm-pcm-voice";
|
|
qcom,destroy-cvd;
|
|
};
|
|
|
|
stub_codec: qcom,msm-stub-codec {
|
|
compatible = "qcom,msm-stub-codec";
|
|
};
|
|
|
|
qcom,msm-dai-fe {
|
|
compatible = "qcom,msm-dai-fe";
|
|
};
|
|
|
|
afe: qcom,msm-pcm-afe {
|
|
compatible = "qcom,msm-pcm-afe";
|
|
};
|
|
|
|
hostless: qcom,msm-pcm-hostless {
|
|
compatible = "qcom,msm-pcm-hostless";
|
|
};
|
|
|
|
host_pcm: qcom,msm-voice-host-pcm {
|
|
compatible = "qcom,msm-voice-host-pcm";
|
|
};
|
|
|
|
loopback: qcom,msm-pcm-loopback {
|
|
compatible = "qcom,msm-pcm-loopback";
|
|
};
|
|
|
|
qcom,msm-dai-stub {
|
|
compatible = "qcom,msm-dai-stub";
|
|
dtmf_tx: qcom,msm-dai-stub-dtmf-tx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <4>;
|
|
};
|
|
|
|
rx_capture_tx: qcom,msm-dai-stub-host-rx-capture-tx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <5>;
|
|
};
|
|
|
|
rx_playback_rx: qcom,msm-dai-stub-host-rx-playback-rx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <6>;
|
|
};
|
|
|
|
tx_capture_tx: qcom,msm-dai-stub-host-tx-capture-tx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <7>;
|
|
};
|
|
|
|
tx_playback_rx: qcom,msm-dai-stub-host-tx-playback-rx {
|
|
compatible = "qcom,msm-dai-stub-dev";
|
|
qcom,msm-dai-stub-dev-id = <8>;
|
|
};
|
|
};
|
|
|
|
qcom,msm-dai-q6 {
|
|
compatible = "qcom,msm-dai-q6";
|
|
afe_pcm_rx: qcom,msm-dai-q6-be-afe-pcm-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <224>;
|
|
};
|
|
|
|
afe_pcm_tx: qcom,msm-dai-q6-be-afe-pcm-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <225>;
|
|
};
|
|
|
|
afe_proxy_rx: qcom,msm-dai-q6-afe-proxy-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <241>;
|
|
};
|
|
|
|
afe_proxy_tx: qcom,msm-dai-q6-afe-proxy-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <240>;
|
|
};
|
|
|
|
incall_record_rx: qcom,msm-dai-q6-incall-record-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32771>;
|
|
};
|
|
|
|
incall_record_tx: qcom,msm-dai-q6-incall-record-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32772>;
|
|
};
|
|
|
|
incall_music_rx: qcom,msm-dai-q6-incall-music-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32773>;
|
|
};
|
|
};
|
|
|
|
pcm_dtmf: qcom,msm-pcm-dtmf {
|
|
compatible = "qcom,msm-pcm-dtmf";
|
|
};
|
|
|
|
dai_pri_auxpcm: qcom,msm-pri-auxpcm {
|
|
compatible = "qcom,msm-auxpcm-dev";
|
|
qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
|
|
qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
|
|
qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
|
|
qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-data = <0>, <0>;
|
|
qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
|
|
qcom,msm-auxpcm-interface = "primary";
|
|
};
|
|
|
|
qcom,msm-dai-mi2s {
|
|
compatible = "qcom,msm-dai-mi2s";
|
|
mi2s_prim: qcom,msm-dai-q6-mi2s-prim {
|
|
compatible = "qcom,msm-dai-q6-mi2s";
|
|
qcom,msm-dai-q6-mi2s-dev-id = <0>;
|
|
qcom,msm-mi2s-rx-lines = <2>;
|
|
qcom,msm-mi2s-tx-lines = <1>;
|
|
};
|
|
};
|
|
|
|
qrng: rng@0x22000 {
|
|
compatible = "qcom,msm-rng";
|
|
reg = <0x22000 0x140>;
|
|
qcom,msm-rng-iface-clk;
|
|
qcom,msm-bus,name = "msm-rng-noc";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<1 618 0 0>,
|
|
<1 618 0 800>;
|
|
clocks = <&clock_gcc clk_gcc_prng_ahb_clk>;
|
|
clock-names = "iface_clk";
|
|
};
|
|
|
|
qcom,qcedev@720000 {
|
|
compatible = "qcom,qcedev";
|
|
reg = <0x720000 0x20000>,
|
|
<0x704000 0x20000>;
|
|
reg-names = "crypto-base","crypto-bam-base";
|
|
interrupts = <0 207 0>;
|
|
qcom,bam-pipe-pair = <2>;
|
|
qcom,ce-hw-instance = <0>;
|
|
qcom,ce-device = <0>;
|
|
qcom,ce-hw-shared;
|
|
qcom,msm-bus,name = "qcedev-noc";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<47 512 0 0>,
|
|
<47 512 3936000 393600>;
|
|
clocks =
|
|
<&clock_gcc clk_qcedev_ce_clk>,
|
|
<&clock_gcc clk_qcedev_ce_clk>,
|
|
<&clock_gcc clk_qcedev_ce_clk>,
|
|
<&clock_gcc clk_qcedev_ce_clk>;
|
|
clock-names = "core_clk", "iface_clk",
|
|
"bus_clk","core_clk_src";
|
|
};
|
|
|
|
qcom,qcrypto@720000 {
|
|
compatible = "qcom,qcrypto";
|
|
reg = <0x720000 0x20000>,
|
|
<0x704000 0x20000>;
|
|
reg-names = "crypto-base","crypto-bam-base";
|
|
interrupts = <0 207 0>;
|
|
qcom,bam-pipe-pair = <3>;
|
|
qcom,ce-hw-instance = <0>;
|
|
qcom,ce-device = <0>;
|
|
qcom,ce-hw-shared;
|
|
qcom,msm-bus,name = "qcrypto-noc";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<47 512 0 0>,
|
|
<47 512 3936000 393600>;
|
|
clocks =
|
|
<&clock_gcc clk_qcedev_ce_clk>,
|
|
<&clock_gcc clk_qcedev_ce_clk>,
|
|
<&clock_gcc clk_qcedev_ce_clk>,
|
|
<&clock_gcc clk_qcedev_ce_clk>;
|
|
clock-names = "core_clk", "iface_clk",
|
|
"bus_clk","core_clk_src";
|
|
};
|
|
|
|
qcom,mss@4080000{
|
|
compatible = "qcom,pil-q6v55-mss";
|
|
reg = <0x4080000 0x100>,
|
|
<0x194e000 0x400>,
|
|
<0x4180000 0x040>,
|
|
<0x1810000 0x004>;
|
|
reg-names = "qdsp6_base", "halt_base", "rmb_base",
|
|
"restart_reg";
|
|
|
|
clocks = <&clock_gcc clk_xo>,
|
|
<&clock_gcc clk_gcc_mss_cfg_ahb_clk>,
|
|
<&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>,
|
|
<&clock_gcc clk_gcc_boot_rom_ahb_clk>,
|
|
<&clock_gcc clk_gpll0_out_msscc>;
|
|
clock-names = "xo", "iface_clk", "bus_clk", "mem_clk",
|
|
"gpll0_mss_clk";
|
|
qcom,proxy-clock-names = "xo";
|
|
qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk",
|
|
"gpll0_mss_clk";
|
|
|
|
interrupts = <0 24 1>;
|
|
vdd_cx-supply = <&pmd9635_s5_level>;
|
|
vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
|
|
vdd_mx-supply = <&pmd9635_l9_level>;
|
|
vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
|
|
vdd_pll-supply = <&pmd9635_l7>;
|
|
qcom,vdd_pll = <1800000>;
|
|
qcom,firmware-name = "modem";
|
|
qcom,pil-self-auth;
|
|
qcom,sysmon-id = <0>;
|
|
qcom,ssctl-instance-id = <0x12>;
|
|
qcom,override-acc;
|
|
qcom,qdsp6v56-1-3;
|
|
|
|
/* GPIO inputs from mss */
|
|
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
|
|
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
|
|
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
|
|
qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
|
|
|
|
/* GPIO output to mss */
|
|
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
|
|
memory-region = <&peripheral1_mem>;
|
|
};
|
|
|
|
};
|
|
|
|
&gdsc_usb30 {
|
|
reg = <0x185e078 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_pcie {
|
|
reg = <0x0185D044 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
#include "msm-pmd9635-rpm-regulator.dtsi"
|
|
#include "msm-pmd9635.dtsi"
|
|
#include "mdm9640-regulator.dtsi"
|
|
|
|
&pmd9635_pon {
|
|
interrupts = <0x0 0x8 0x2>;
|
|
interrupt-names = "cblpwr";
|
|
qcom,system-reset;
|
|
|
|
qcom,pon_1 {
|
|
qcom,pon-type = <2>;
|
|
qcom,pull-up = <1>;
|
|
linux,code = <116>;
|
|
};
|
|
};
|
|
|
|
&pmd9635_vadc {
|
|
hkadc_ldo-supply = <&pmd9635_l7>;
|
|
hkadc_ok-supply = <&pmd9635_l3>;
|
|
};
|
|
|
|
&pmd9635_adc_tm {
|
|
hkadc_ldo-supply = <&pmd9635_l7>;
|
|
hkadc_ok-supply = <&pmd9635_l3>;
|
|
};
|