547 lines
20 KiB
Plaintext
547 lines
20 KiB
Plaintext
Qualcomm Technologies, Inc. CPR3 Regulator - HMSS Specific Bindings
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HMSS CPR3 controllers each support two CPR threads that monitor the voltage of
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a pair of application processor (HMSS) clusters that are powered by a shared
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regulator supply. These controllers have a hardware aggregator to combine the
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UP/DOWN requests from each CPR thread into a single unified request. They also
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have a hardware channel to use these requests to directly change the supply
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voltage at the PMIC via the SPM without software intervention.
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HMSS CPR3 controllers also have to take into account the state of the memory
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array power mux (APM) when scaling voltage to ensure that memory always receives
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a sufficiently high voltage.
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Both CPR open-loop voltages and CPR target quotients are stored in hardware
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fuses for HMSS CPR3 controllers.
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This document describes the HMSS specific CPR3 bindings.
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=======================
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Required Node Structure
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=======================
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CPR3 regulators must be described in three levels of devices nodes. The first
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level describes the CPR3 controller. The second level describes one or more
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hardware threads managed by the controller. The third level describes one or
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more logical regulators handled by each CPR thread.
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All platform independent cpr3-regulator binding guidelines defined in
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cpr3-regulator.txt also apply to cpr3-hmss-regulator devices.
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====================================
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First Level Nodes - CPR3 Controllers
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====================================
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HMSS specific properties:
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- compatible
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Usage: required
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Value type: <string>
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Definition: should be one of the following:
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"qcom,cpr3-msm8996-v1-hmss-regulator",
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"qcom,cpr3-msm8996-v2-hmss-regulator",
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"qcom,cpr3-msm8996-v3-hmss-regulator",
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"qcom,cpr3-msm8996-hmss-regulator".
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If the SoC revision is not specified, then it is assumed to
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be the most recent revision, i.e. v3.
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- interrupts
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Usage: required
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Value type: <prop-encoded-array>
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Definition: CPR interrupt specifier and a hardware closed-loop ceiling
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interrupt specifier.
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- interrupt-names
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Usage: required
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Value type: <stringlist>
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Definition: Interrupt names. This list must match up 1-to-1 with the
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interrupts specified in the 'interrupts' property. "cpr"
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and "ceiling" must be specified.
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- qcom,apm-ctrl
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Usage: required on systems that need APM management
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Value type: <phandle>
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Definition: phandle of memory array power mux (APM) controller device
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node for the APM that is used by the HMSS VDD supply
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- qcom,apm-threshold-voltage
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Usage: required if qcom,apm-ctrl is specified
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Value type: <u32>
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Definition: Specifies the APM threshold voltage in microvolts. If the
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vdd-supply voltage is greater than or equal to this level,
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then the APM is switched to use the vdd-supply. If the
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vdd-supply voltage is below this level, then the APM is
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switched to use the system-supply.
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- qcom,apm-hysteresis-voltage
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Usage: optional
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Value type: <u32>
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Definition: Specifies the voltage delta in microvolts between the APM
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threshold voltage and the highest corner open-loop voltage
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which may be used as the ceiling for the corner. If this
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property is not specified, then a value of 0 is assumed.
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- qcom,system-supply-max-voltage
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Usage: required if qcom,vdd-threadN-ldo-supply is specified for any
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CPR3 regulator managed by any CPR3 thread of this controller.
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Value type: <u32>
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Definition: Maximum voltage setpoint for the system-supply regulator.
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- qcom,mem-acc-supply-threshold-voltage
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Usage: required if mem-acc-supply or mem-acc-threadN-supply is
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specified and the CPR3 controller or any of the CPR3 regulators
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it controls needs to manage mem-acc settings.
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Value type: <u32>
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Definition: Specifies the mem-acc-supply threshold voltage in microvolts.
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If the vdd-supply voltage is greater than or equal to this
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level, then the mem-acc-supply regulator is switched to the
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high voltage corner setting. Conversely, if the vdd-supply
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voltage is below this level, then the mem-acc-supply regulator
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is switched to the low voltage corner setting.
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- qcom,mem-acc-supply-corner-map
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Usage: required if mem-acc-supply or mem-acc-threadN-supply is
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specified and the CPR3 controller or any of the CPR3 regulators
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it controls needs to manage mem-acc settings.
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Value type: <prop-encoded-array>
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Definition: A tuple containing two integers which defines the mem-acc-supply
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corner to use for low and high vdd-supply voltages, respectively.
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- qcom,cpr-up-down-delay-time
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Usage: required
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Value type: <u32>
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Definition: The time to delay in nanoseconds between consecutive CPR
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measurements when the last measurement recommended
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increasing or decreasing the vdd-supply voltage.
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- qcom,cpr-hw-closed-loop
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates that the HMSS CPR3 controller
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should operate in hardware closed-loop mode as opposed to
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software closed-loop mode.
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- vdd-limit-supply
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Usage: required
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Value type: <phandle>
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Definition: phandle of the VDD supply limit regulator which controls the
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CPR ceiling and floor voltages when operating in hardware
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closed-loop mode.
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- qcom,cpr-clock-throttling
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Usage: optional
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Value type: <u32>
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Definition: Specifies the power domains for which CPR processor clock
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throttling should be enabled. This feature reduces the
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processor's clock frequency when it is resuming from a low
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power mode until CPR is able to raise the supply voltage to
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a final settled value. The following bits may be set:
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BIT(0) - Power cluster L2 cache
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BIT(1) - Power cluster core 1
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BIT(2) - Power cluster core 0
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BIT(5) - Performance cluster L2 cache
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BIT(6) - Performance cluster core 1
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BIT(7) - Performance cluster core 0
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- mem-acc-threadN-supply
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Usage: optional
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Value type: <phandle>
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Definition: phandle of the regulator device which manages mem-acc
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configuration for the clusters per CPR thread. 'N' must
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match with the hardware thread ID of the thread it controls.
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- vdd-threadN-ldo-supply
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Usage: optional
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Value type: <phandle>
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Definition: phandle of the regulator device which manages LDO and BHS
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modes for the clusters per CPR thread. 'N' must match with
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the hardware thread ID of the thread it controls.
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- vdd-threadN-ldo-ret-supply
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Usage: required if vdd-threadN-ldo-supply is specified for
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this CPR thread.
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Value type: <phandle>
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Definition: phandle of the regulator device which manages LDO retention
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modes for the clusters per CPR thread. 'N' must match with
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the hardware thread ID of the thread it controls.
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=================================================
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Second Level Nodes - CPR Threads for a Controller
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=================================================
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HMSS specific properties:
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N/A
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===============================================
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Third Level Nodes - CPR Regulators for a Thread
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===============================================
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HMSS specific properties:
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- qcom,cpr-fuse-corners
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Usage: required
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Value type: <u32>
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Definition: Specifies the number of fuse corners. This value must be 5
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for HMSS. These fuse corners are: MinSVS, LowSVS, SVS,
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Nominal, and Turbo. Note that a specific fused target
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quotient is available for the LowSVS corner but a fused
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open-loop voltage is not available. The LowSVS open-loop
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voltage is calculated using linear interpolation between
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the MinSVS and SVS values.
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- qcom,cpr-fuse-combos
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Usage: required
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Value type: <u32>
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Definition: Specifies the number of fuse combinations being supported by
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the device. This value is utilized by several other
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properties. Supported values are 1 up to the maximum
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possible for a given regulator type. For HMSS the maximum
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supported value is 16. The first 8 fuse combos correspond
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to speed bin fuse value 0 along with CPR revision fuse
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values 0 to 7. The last 8 fuse combos correspond to speed
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bin fuse value 1 along with CPR revision fuse values 0 to 7.
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- qcom,cpr-speed-bins
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Usage: optional
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Value type: <u32>
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Definition: Specifies the number of speed bins being supported by the
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device. This value is utilized by several other properties.
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Supported values are 1 up to the maximum possible for a
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given regulator type. For HMSS the maximum supported value
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is 2.
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- qcom,ldo-min-headroom-voltage
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Usage: required if vdd-threadN-ldo-supply is specified for the
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CPR3 thread containing this CPR3 regulator and this CPR3
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regulator needs to manage the cluster LDO state.
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Value type: <u32>
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Definition: Voltage in microvolts required between the VDD_APCC voltage
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and the LDO output in order for the LDO to be operational.
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- qcom,ldo-max-headroom-voltage
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Usage: required if vdd-threadN-ldo-supply is specified for the
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CPR3 thread containing this CPR3 regulator and this CPR3
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regulator needs to manage the cluster LDO state.
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Value type: <u32>
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Definition: Maximum voltage difference in microvolts between the vdd-supply
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voltage and the LDO output voltage in order for active LDO mode
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to be operational.
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- qcom,ldo-adjust-voltage
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Usage: optional
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Value type: <u32>
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Definition: Voltage in microvolts used to offset margins between PMIC
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output and CPU.
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- qcom,ldo-max-voltage
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Usage: required if qcom,ldo-min-headroom-voltage is specified for this
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CPR3 regulator.
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Value type: <u32>
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Definition: Voltage in microvolts which represents the maximum
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physically supported voltage output of the LDO hardware.
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- qcom,uses-mem-acc
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Usage: required if mem-acc-threadN-supply is specified for the
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CPR3 thread containing this CPR3 regulator and this CPR3
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regulator needs to manage mem-acc settings.
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Value type: <empty>
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Definition: Boolean flag which indicates that this CPR3 regulator must
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manage mem-acc.
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- qcom,ldo-disable
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates that LDO mode usage is
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disallowed. If this flag is present, then the
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vdd-threadN-ldo-supply mode will not be modified.
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- qcom,allow-quotient-interpolation
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates that it is acceptable to use
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interpolated CPR target quotient values. These values are
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interpolated between the target quotient Fmax fuse values.
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- qcom,cpr-pd-bypass-mask
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Usage: required
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Value type: <u32>
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Definition: Specifies the power domains associated with this CPR3
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regulator. The following bits may be set:
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BIT(0) - Power cluster L2 cache
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BIT(1) - Power cluster core 1
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BIT(2) - Power cluster core 0
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BIT(3) - CBF
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BIT(4) - L3 cache
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BIT(5) - Performance cluster L2 cache
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BIT(6) - Performance cluster core 1
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BIT(7) - Performance cluster core 0
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- qcom,cpr-dynamic-floor-corner
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: A list of integers which defines for each fuse combination
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the CPR corner whose closed-loop voltage should be used as
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a CPR floor voltage whenever the power domains for this CPR3
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regulator are bypassed. Supported values are 0 and 1 to N.
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A value of 0 means that no dynamic floor is needed. N is
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the number of corners defined for this fuse combination in
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the qcom,cpr-corners property.
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The list must contain qcom,cpr-fuse-combos number of
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elements in which case the elements are matched to fuse
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combinations 1-to-1 or qcom,cpr-speed-bins number of
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elements in which case the elements are matched to
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speed bins 1-to-1 or exactly 1 element which is used
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regardless of the fuse combination and speed bin found
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on a given chip.
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=======
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Example
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=======
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apcc_cpr: cpr3-ctrl@99e8000 {
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compatible = "qcom,cpr3-msm8996-hmss-regulator";
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reg = <0x099e8000 0x4000>, <0x00074000 0x1000>;
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reg-names = "cpr_ctrl", "fuse_base";
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clocks = <&clock_gcc clk_gcc_hmss_rbcpr_clk>;
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clock-names = "core_clk";
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interrupts = <0 48 0>, <0 47 0>;
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interrupt-names = "cpr", "ceiling";
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qcom,cpr-ctrl-name = "apcc";
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qcom,cpr-sensor-time = <1000>;
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qcom,cpr-loop-time = <5000000>;
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qcom,cpr-idle-cycles = <15>;
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qcom,cpr-up-down-delay-time = <3000>;
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qcom,cpr-step-quot-init-min = <13>;
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qcom,cpr-step-quot-init-max = <13>;
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qcom,cpr-count-mode = <2>;
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qcom,apm-ctrl = <&apc_apm>;
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qcom,apm-threshold-voltage = <850000>;
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qcom,apm-hysteresis-voltage = <5000>;
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qcom,system-supply-max-voltage = <1015000>;
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qcom,mem-acc-supply-threshold-voltage = <700000>;
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qcom,mem-acc-supply-corner-map = <1 2>;
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vdd-supply = <&pm8994_s11>;
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qcom,voltage-step = <5000>;
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vdd-limit-supply = <&pm8994_s11_limit>;
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mem-acc-thread0-supply = <&apc0_pwrcl_mem_acc_vreg>;
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mem-acc-thread1-supply = <&apc1_perfcl_mem_acc_vreg>;
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mem-acc-supply = <&apcc_l3_mem_acc_vreg>;
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vdd-thread0-ldo-supply = <&kryo0_vreg>;
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vdd-thread1-ldo-supply = <&kryo1_vreg>;
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vdd-thread0-ldo-ret-supply = <&kryo0_retention_vreg>;
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vdd-thread1-ldo-ret-supply = <&kryo1_retention_vreg>;
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qcom,cpr-enable;
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qcom,cpr-hw-closed-loop;
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qcom,cpr-clock-throttling = <0x20>;
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qcom,cpr-aging-ref-voltage = <905000>;
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thread@0 {
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qcom,cpr-thread-id = <0>;
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qcom,cpr-consecutive-up = <0>;
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qcom,cpr-consecutive-down = <2>;
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qcom,cpr-up-threshold = <0>;
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qcom,cpr-down-threshold = <2>;
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apc0_pwrcl_vreg: regulator-pwrcl {
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regulator-name = "apc0_pwrcl_corner";
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <19>;
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qcom,cpr-pd-bypass-mask = <0x07>;
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qcom,cpr-fuse-corners = <5>;
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qcom,cpr-fuse-combos = <1>;
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qcom,cpr-corners = <19>;
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qcom,ldo-min-headroom-voltage = <150000>;
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qcom,ldo-max-headroom-voltage = <470000>;
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qcom,ldo-max-voltage = <805000>;
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qcom,uses-mem-acc;
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qcom,cpr-corner-fmax-map = <1 2 6 11 19>;
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qcom,cpr-voltage-ceiling =
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<670000 670000 745000 745000 745000
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745000 905000 905000 905000 905000
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905000 1015000 1015000 1015000 1015000
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1015000 1015000 1015000 1015000>;
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qcom,cpr-voltage-floor =
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<520000 550000 555000 565000 585000
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615000 635000 655000 690000 720000
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740000 750000 760000 770000 780000
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790000 815000 840000 850000>;
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qcom,corner-frequencies =
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<192000000 268800000 307200000
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345600000 403200000 480000000
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576000000 633600000 729600000
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806400000 883200000 960000000
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1017600000 1113600000 1190400000
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1267200000 1344000000 1420800000
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1459200000>;
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qcom,cpr-ro-scaling-factor =
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< 0 0 0 0 2222 2275 2506 2491
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2649 2640 2886 2866 0 0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491
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2649 2640 2886 2866 0 0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491
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2649 2640 2886 2866 0 0 0 0>,
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< 0 0 0 0 2147 2226 2310 2312
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2450 2447 2603 2600 0 0 0 0>,
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< 0 0 0 0 1989 2079 2066 2083
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2193 2201 2283 2296 0 0 0 0>;
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qcom,cpr-open-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>;
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qcom,cpr-closed-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>;
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qcom,allow-voltage-interpolation;
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qcom,allow-quotient-interpolation;
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qcom,cpr-scaled-open-loop-voltage-as-ceiling;
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qcom,cpr-aging-max-voltage-adjustment = <25000>;
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qcom,cpr-aging-ref-corner = <11>;
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qcom,cpr-aging-ro-scaling-factor = <3200>;
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qcom,cpr-aging-derate =
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<1000 1000 1000 1000 1000 1000 1000 1000
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1000 1000 1000 1000 1000 1000 1000 1000
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1000 1000 1000>;
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qcom,allow-aging-voltage-adjustment = <1>;
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};
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apc0_cbf_vreg: regulator-cbf {
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regulator-name = "apc0_cbf_corner";
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <10>;
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qcom,cpr-pd-bypass-mask = <0x18>;
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qcom,cpr-fuse-corners = <5>;
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qcom,cpr-fuse-combos = <1>;
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qcom,cpr-corners = <10>;
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qcom,cpr-corner-fmax-map = <1 2 5 9 10>;
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qcom,cpr-voltage-ceiling =
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<605000 670000 745000 745000 745000
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905000 905000 905000 905000 1015000>;
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qcom,cpr-voltage-floor =
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<520000 545000 565000 595000 635000
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660000 690000 730000 750000 850000>;
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qcom,corner-frequencies =
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<150000000 307200000 384000000
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499200000 595200000 691200000
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787200000 883200000 960000000
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1036800000>;
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qcom,cpr-ro-scaling-factor =
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< 0 0 0 0 2222 2275 2506 2491
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2649 2640 2886 2866 0 0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491
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2649 2640 2886 2866 0 0 0 0>,
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< 0 0 0 0 2222 2275 2506 2491
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2649 2640 2886 2866 0 0 0 0>,
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< 0 0 0 0 2147 2226 2310 2312
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2450 2447 2603 2600 0 0 0 0>,
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< 0 0 0 0 1989 2079 2066 2083
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2193 2201 2283 2296 0 0 0 0>;
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qcom,cpr-open-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>;
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qcom,cpr-closed-loop-voltage-fuse-adjustment =
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<0 0 0 0 0>;
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qcom,allow-voltage-interpolation;
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qcom,allow-quotient-interpolation;
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qcom,cpr-scaled-open-loop-voltage-as-ceiling;
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qcom,cpr-aging-max-voltage-adjustment = <25000>;
|
|
qcom,cpr-aging-ref-corner = <9>;
|
|
qcom,cpr-aging-ro-scaling-factor = <3200>;
|
|
qcom,cpr-aging-derate =
|
|
<1000 1000 1000 1000 1000 1000 1000 1000
|
|
1000 1000>;
|
|
qcom,allow-aging-voltage-adjustment = <1>;
|
|
};
|
|
};
|
|
|
|
thread@1 {
|
|
qcom,cpr-thread-id = <1>;
|
|
qcom,cpr-consecutive-up = <0>;
|
|
qcom,cpr-consecutive-down = <2>;
|
|
qcom,cpr-up-threshold = <0>;
|
|
qcom,cpr-down-threshold = <2>;
|
|
|
|
apc1_vreg: regulator {
|
|
regulator-name = "apc1_corner";
|
|
regulator-min-microvolt = <1>;
|
|
regulator-max-microvolt = <18>;
|
|
|
|
qcom,cpr-pd-bypass-mask = <0xe0>;
|
|
qcom,cpr-fuse-corners = <5>;
|
|
qcom,cpr-fuse-combos = <1>;
|
|
qcom,cpr-corners = <18>;
|
|
|
|
qcom,ldo-min-headroom-voltage = <150000>;
|
|
qcom,ldo-max-headroom-voltage = <470000>;
|
|
qcom,ldo-max-voltage = <805000>;
|
|
qcom,uses-mem-acc;
|
|
|
|
qcom,cpr-corner-fmax-map = <1 3 5 11 18>;
|
|
|
|
qcom,cpr-voltage-ceiling =
|
|
<670000 670000 670000 745000 745000
|
|
905000 905000 905000 905000 905000
|
|
905000 1015000 1015000 1015000 1015000
|
|
1015000 1015000 1015000>;
|
|
qcom,cpr-voltage-floor =
|
|
<520000 530000 545000 590000 620000
|
|
635000 660000 685000 700000 730000
|
|
740000 750000 765000 790000 805000
|
|
815000 830000 850000>;
|
|
|
|
qcom,corner-frequencies =
|
|
<307200000 345600000 403200000
|
|
480000000 576000000 633600000
|
|
729600000 806400000 883200000
|
|
960000000 1017600000 1113600000
|
|
1190400000 1267200000 1344000000
|
|
1420800000 1497600000 1593600000>;
|
|
|
|
qcom,cpr-ro-scaling-factor =
|
|
< 0 0 0 0 2212 2273 2517 2506
|
|
2663 2650 2908 2891 0 0 0 0>,
|
|
< 0 0 0 0 2212 2273 2517 2506
|
|
2663 2650 2908 2891 0 0 0 0>,
|
|
< 0 0 0 0 2212 2273 2517 2506
|
|
2663 2650 2908 2891 0 0 0 0>,
|
|
< 0 0 0 0 2152 2237 2321 2337
|
|
2475 2469 2636 2612 0 0 0 0>,
|
|
< 0 0 0 0 2001 2102 2092 2090
|
|
2203 2210 2297 2297 0 0 0 0>;
|
|
|
|
qcom,cpr-open-loop-voltage-fuse-adjustment =
|
|
<0 0 0 5000 0>;
|
|
qcom,cpr-closed-loop-voltage-fuse-adjustment =
|
|
<0 0 0 20000 0>;
|
|
|
|
qcom,allow-voltage-interpolation;
|
|
qcom,allow-quotient-interpolation;
|
|
qcom,cpr-scaled-open-loop-voltage-as-ceiling;
|
|
|
|
qcom,cpr-aging-max-voltage-adjustment = <25000>;
|
|
qcom,cpr-aging-ref-corner = <11>;
|
|
qcom,cpr-aging-ro-scaling-factor = <3200>;
|
|
qcom,cpr-aging-derate =
|
|
<1000 1000 1000 1000 1000 1000 1000 1000
|
|
1000 1000 1000 1000 1000 1000 1000 1000
|
|
1000 1000>;
|
|
qcom,allow-aging-voltage-adjustment = <1>;
|
|
};
|
|
};
|
|
};
|