78 lines
2.8 KiB
Plaintext
78 lines
2.8 KiB
Plaintext
* MSM Sleep Power Manager (mpm-v2)
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The MPM acts a sleep power manager to shutdown the clock source and put the
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device into a retention mode to save power. The MPM is also responsible for
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waking up and bringing up the resources from sleep. The MPM driver configures
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interrupts monitored by the MPM hardware before entering sleep through a
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RPM interface.
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The required nodes for the MPM driver are:
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- compatible: "qcom, mpm-v2"
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- reg: Specifies the base physical address(s) and the size of the MPM
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registers. The MPM driver access two memory regions for confifure the
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virtual MPM driver on the RPM. The first region is the memory space
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shared with the virtual MPM driver. The second region is the address
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to the register that triggers a interrupt to the RPM.
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- reg-names: "vmpm" - string to identify the shared memory space region
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"ipc" - string to identify the register that triggers a interrupt
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- clocks: clock identifers used by clock driver while looking up mpm clocks.
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- clock-names: name of the clock used by mpm driver.
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- qcom,ipc-bit-offset: The bit to set in the ipc register that triggers a interrupt
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to the RPM
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- qcom,gic-parent: phandle to the gic interrupt controller
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- qcom,gic-map: Provides a mapping of how a GIC interrupt is connect to a MPM. The
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mapping is presented in tuples. Each tuple represents a MPM pin and
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which GIC interrupt is routed to it. Since MPM monitors interrupts
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only during system wide low power mode, system interrupts originating
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from other processors can be ignored and assigned an MPM pin mapping
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of 0xff.
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- qcom,gpio-parent: phandle to the GPIO interrupt controller
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- qcom,gpio-map: Provides a mapping of how a GPIO interrupt is connect to a MPM. The
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mapping is presented in tuples. Each tuple represents a MPM pin and
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which GIC interrupt is routed to it. Since MPM monitors interrupts
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only during system wide low power mode, system interrupts originating
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from other processors can be ignored and assigned an MPM pin mapping
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of 0xff.
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Optional Properties:
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- qcom,num-mpm-irqs : Specifies the number of mpm interrupts supported on a
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target. If the property isn't present, 64 interrupts are
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considered for the target by default.
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Example:
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qcom,mpm@fc4281d0 {
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compatible = "qcom,mpm-v2";
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reg = <0xfc4281d0 0x1000>, /* MSM_RPM_MPM_BASE 4K*/
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<0xfa006000 0x1000>; /* MSM_APCS_GCC_BASE 4K*/
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reg-names = "vmpm", "ipc"
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interrupts = <0 171 1>;
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clocks = <&clock_rpm clk_xo_lpm_clk>;
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clock-names = "xo";
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qcom,ipc-bit-offset = <0>;
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qcom,gic-parent = <&intc>;
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qcom,gic-map = <25 132>,
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<27 111>,
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<0xff 48>,
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<0xff 51>,
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<0xff 52>,
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<0xff 53>,
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<0xff 54>,
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<0xff 55>;
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qcom,gpio-parent = <&msmgpio>;
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qcom,gpio-map = <1 46>,
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<2 150>,
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<4 103>,
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<5 104>,
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<6 105>,
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<7 106>,
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<8 107>,
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<53 37>,
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<54 24>,
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<55 14>;
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};
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