516 lines
14 KiB
C
516 lines
14 KiB
C
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <debug.h>
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#include <string.h>
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#include <smem.h>
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#include <err.h>
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#include <msm_panel.h>
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#include <mipi_dsi.h>
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#include <pm8x41.h>
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#include <pm8x41_wled.h>
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#include <qpnp_wled.h>
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#include <board.h>
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#include <mdp5.h>
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#include <endian.h>
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#include <regulator.h>
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#include <qtimer.h>
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#include <arch/defines.h>
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#include <platform/gpio.h>
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#include <platform/clock.h>
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#include <platform/iomap.h>
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#include <target/display.h>
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#include <mipi_dsi_autopll_thulium.h>
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#include "include/panel.h"
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#include "include/display_resource.h"
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#include "gcdb_display.h"
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#define GPIO_STATE_LOW 0
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#define GPIO_STATE_HIGH 2
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#define RESET_GPIO_SEQ_LEN 3
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#define PWM_DUTY_US 13
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#define PWM_PERIOD_US 27
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#define PMIC_WLED_SLAVE_ID 3
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#define PMIC_MPP_SLAVE_ID 2
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#define MAX_POLL_READS 15
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#define POLL_TIMEOUT_US 1000
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#define STRENGTH_SIZE_IN_BYTES_8996 10
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#define REGULATOR_SIZE_IN_BYTES_8996 5
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#define LANE_SIZE_IN_BYTES_8996 20
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/*---------------------------------------------------------------------------*/
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/* GPIO configuration */
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/*---------------------------------------------------------------------------*/
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static struct gpio_pin reset_gpio = {
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"msmgpio", 8, 3, 1, 0, 1
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};
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static struct gpio_pin lcd_reg_en = { /* boost regulator */
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"pmi8994_gpios", 8, 3, 1, 0, 1
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};
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static struct gpio_pin bklt_gpio = { /* lcd_bklt_reg_en */
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"pm8994_gpios", 14, 3, 1, 0, 1
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};
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static uint32_t thulium_dsi_pll_lock_status(uint32_t pll_base, uint32_t off,
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uint32_t bit)
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{
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uint32_t cnt, status;
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/* check pll lock first */
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for (cnt = 0; cnt < MAX_POLL_READS; cnt++) {
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status = readl(pll_base + off);
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dprintf(SPEW, "%s: pll_base=%x cnt=%d status=%x\n",
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__func__, pll_base, cnt, status);
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status &= BIT(bit); /* bit 5 */
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if (status)
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break;
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udelay(POLL_TIMEOUT_US);
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}
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return status;
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}
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static uint32_t thulium_dsi_pll_enable_seq(uint32_t phy_base, uint32_t pll_base)
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{
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uint32_t pll_locked;
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writel(0x01, phy_base + 0x48);
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dmb();
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pll_locked = thulium_dsi_pll_lock_status(pll_base, 0xcc, 5);
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if (pll_locked)
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pll_locked = thulium_dsi_pll_lock_status(pll_base, 0xcc, 0);
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if (!pll_locked)
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dprintf(ERROR, "%s: DSI PLL lock failed\n", __func__);
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else
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dprintf(SPEW, "%s: DSI PLL lock Success\n", __func__);
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return pll_locked;
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}
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static int thulium_wled_backlight_ctrl(uint8_t enable)
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{
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qpnp_wled_enable_backlight(enable);
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return NO_ERROR;
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}
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static int thulium_pwm_backlight_ctrl(uint8_t enable)
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{
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uint8_t slave_id = 3; /* lpg at pmi */
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if (enable) {
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/* lpg channel 4 */
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/* LPG_ENABLE_CONTROL */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x46, 0x0);
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mdelay(100);
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/* LPG_VALUE_LSB, duty cycle = 0x80/0x200 = 1/4 */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x44, 0x80);
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/* LPG_VALUE_MSB */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x45, 0x00);
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/* LPG_PWM_SYNC */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x47, 0x01);
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/* LPG_PWM_SIZE_CLK, */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x41, 0x13);
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/* LPG_PWM_FREQ_PREDIV */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x42, 0x02);
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/* LPG_PWM_TYPE_CONFIG */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x43, 0x20);
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/* LPG_ENABLE_CONTROL */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x46, 0x04);
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/* SEC_ACCESS */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0xD0, 0xA5);
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/* DTEST4, OUT_HI */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0xE5, 0x01);
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/* LPG_ENABLE_CONTROL */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x46, 0xA4);
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} else {
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/* LPG_ENABLE_CONTROL */
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pm8x41_lpg_write_sid(slave_id, PWM_BL_LPG_CHAN_ID, 0x46, 0x0);
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}
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return NO_ERROR;
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}
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static void lcd_reg_enable(void)
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{
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uint8_t slave_id = 2; /* gpio at pmi */
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struct pm8x41_gpio gpio = {
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.direction = PM_GPIO_DIR_OUT,
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.function = PM_GPIO_FUNC_HIGH,
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.vin_sel = 2, /* VIN_2 */
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.output_buffer = PM_GPIO_OUT_CMOS,
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.out_strength = PM_GPIO_OUT_DRIVE_MED,
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};
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pm8x41_gpio_config_sid(slave_id, lcd_reg_en.pin_id, &gpio);
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pm8x41_gpio_set_sid(slave_id, lcd_reg_en.pin_id, 1);
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}
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static void lcd_reg_disable(void)
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{
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uint8_t slave_id = 2; /* gpio at pmi */
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pm8x41_gpio_set_sid(slave_id, lcd_reg_en.pin_id, 0);
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}
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static void lcd_bklt_reg_enable(void)
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{
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struct pm8x41_gpio gpio = {
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.direction = PM_GPIO_DIR_OUT,
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.function = PM_GPIO_FUNC_HIGH,
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.vin_sel = 2, /* VIN_2 */
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.output_buffer = PM_GPIO_OUT_CMOS,
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.out_strength = PM_GPIO_OUT_DRIVE_LOW,
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};
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pm8x41_gpio_config(bklt_gpio.pin_id, &gpio);
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pm8x41_gpio_set(bklt_gpio.pin_id, 1);
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}
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static void lcd_bklt_reg_disable(void)
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{
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pm8x41_gpio_set(bklt_gpio.pin_id, 0);
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}
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int target_backlight_ctrl(struct backlight *bl, uint8_t enable)
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{
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uint32_t ret = NO_ERROR;
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struct pm8x41_mpp mpp;
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int rc;
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if (!bl) {
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dprintf(CRITICAL, "backlight structure is not available\n");
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return ERR_INVALID_ARGS;
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}
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switch (bl->bl_interface_type) {
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case BL_WLED:
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/* Enable MPP4 */
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pmi8994_config_mpp_slave_id(PMIC_MPP_SLAVE_ID);
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mpp.base = PM8x41_MMP4_BASE;
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mpp.vin = MPP_VIN2;
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if (enable) {
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pm_pwm_enable(false);
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rc = pm_pwm_config(PWM_DUTY_US, PWM_PERIOD_US);
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if (rc < 0) {
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mpp.mode = MPP_HIGH;
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} else {
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mpp.mode = MPP_DTEST1;
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pm_pwm_enable(true);
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}
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pm8x41_config_output_mpp(&mpp);
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pm8x41_enable_mpp(&mpp, MPP_ENABLE);
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} else {
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pm_pwm_enable(false);
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pm8x41_enable_mpp(&mpp, MPP_DISABLE);
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}
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/* Enable WLED backlight control */
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ret = thulium_wled_backlight_ctrl(enable);
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break;
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case BL_PWM:
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/* Enable MPP1 */
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pmi8994_config_mpp_slave_id(PMIC_MPP_SLAVE_ID);
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mpp.base = PM8x41_MMP1_BASE;
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mpp.vin = MPP_VIN2;
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mpp.mode = MPP_DTEST4;
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if (enable) {
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pm8x41_config_output_mpp(&mpp);
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pm8x41_enable_mpp(&mpp, MPP_ENABLE);
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} else {
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pm8x41_enable_mpp(&mpp, MPP_DISABLE);
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}
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ret = thulium_pwm_backlight_ctrl(enable);
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break;
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default:
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dprintf(CRITICAL, "backlight type:%d not supported\n",
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bl->bl_interface_type);
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return ERR_NOT_SUPPORTED;
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}
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return ret;
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}
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int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
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{
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uint32_t flags, dsi_phy_pll_out;
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uint32_t ret = NO_ERROR;
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uint32_t board_version = board_soc_version();
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if (pinfo->dest == DISPLAY_2) {
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flags = MMSS_DSI_CLKS_FLAG_DSI1;
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if (pinfo->mipi.dual_dsi)
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flags |= MMSS_DSI_CLKS_FLAG_DSI0;
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} else {
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flags = MMSS_DSI_CLKS_FLAG_DSI0;
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if (pinfo->mipi.dual_dsi)
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flags |= MMSS_DSI_CLKS_FLAG_DSI1;
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}
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if (!enable) {
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/* stop pll */
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writel(0x0, pinfo->mipi.phy_base + 0x48);
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dmb();
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mmss_dsi_clock_disable(flags);
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goto clks_disable;
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}
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if (board_version == 0x20000 || board_version == 0x20001)
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video_gdsc_enable();
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mmss_gdsc_enable();
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mmss_bus_clock_enable();
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mdp_clock_enable();
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mdss_dsi_auto_pll_thulium_config(pinfo);
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if (!thulium_dsi_pll_enable_seq(pinfo->mipi.phy_base,
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pinfo->mipi.pll_base)) {
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ret = ERROR;
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dprintf(CRITICAL, "PLL failed to lock!\n");
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goto clks_disable;
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}
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if (pinfo->mipi.use_dsi1_pll)
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dsi_phy_pll_out = DSI1_PHY_PLL_OUT;
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else
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dsi_phy_pll_out = DSI0_PHY_PLL_OUT;
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mmss_dsi_clock_enable(dsi_phy_pll_out, flags);
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return NO_ERROR;
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clks_disable:
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mdp_clock_disable();
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mmss_bus_clock_disable();
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mmss_gdsc_disable();
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if (board_version == 0x20000 || board_version == 0x20001)
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video_gdsc_disable();
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return ret;
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}
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int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq,
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struct msm_panel_info *pinfo)
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{
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uint32_t i = 0;
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if (enable) {
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gpio_tlmm_config(reset_gpio.pin_id, 0,
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reset_gpio.pin_direction, reset_gpio.pin_pull,
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reset_gpio.pin_strength, reset_gpio.pin_state);
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/* reset */
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for (i = 0; i < RESET_GPIO_SEQ_LEN; i++) {
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if (resetseq->pin_state[i] == GPIO_STATE_LOW)
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gpio_set(reset_gpio.pin_id, GPIO_STATE_LOW);
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else
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gpio_set(reset_gpio.pin_id, GPIO_STATE_HIGH);
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mdelay(resetseq->sleep[i]);
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}
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lcd_bklt_reg_enable();
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} else {
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lcd_bklt_reg_disable();
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gpio_set(reset_gpio.pin_id, 0);
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}
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return NO_ERROR;
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}
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static void wled_init(struct msm_panel_info *pinfo)
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{
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struct qpnp_wled_config_data config = {0};
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struct labibb_desc *labibb;
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int display_type = 0;
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labibb = pinfo->labibb;
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if (labibb)
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display_type = labibb->amoled_panel;
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config.display_type = display_type;
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config.lab_init_volt = 4600000; /* fixed, see pmi register */
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config.ibb_init_volt = 1400000; /* fixed, see pmi register */
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if (labibb && labibb->force_config) {
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config.lab_min_volt = labibb->lab_min_volt;
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config.lab_max_volt = labibb->lab_max_volt;
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config.ibb_min_volt = labibb->ibb_min_volt;
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config.ibb_max_volt = labibb->ibb_max_volt;
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config.pwr_up_delay = labibb->pwr_up_delay;
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config.pwr_down_delay = labibb->pwr_down_delay;
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config.ibb_discharge_en = labibb->ibb_discharge_en;
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} else {
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/* default */
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config.pwr_up_delay = 3;
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config.pwr_down_delay = 3;
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config.ibb_discharge_en = 1;
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if (display_type) { /* amoled */
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config.lab_min_volt = 4600000;
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config.lab_max_volt = 4600000;
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config.ibb_min_volt = 4000000;
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config.ibb_max_volt = 4000000;
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} else { /* lcd */
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config.lab_min_volt = 5500000;
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config.lab_max_volt = 5500000;
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config.ibb_min_volt = 5500000;
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config.ibb_max_volt = 5500000;
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}
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}
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dprintf(SPEW, "%s: %d %d %d %d %d %d %d %d %d %d\n", __func__,
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config.display_type,
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config.lab_min_volt, config.lab_max_volt,
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config.ibb_min_volt, config.ibb_max_volt,
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config.lab_init_volt, config.ibb_init_volt,
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config.pwr_up_delay, config.pwr_down_delay,
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config.ibb_discharge_en);
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/* QPNP WLED init for display backlight */
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pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID);
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qpnp_wled_init(&config);
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}
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int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo)
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{
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uint32_t val = BIT(1) | BIT(13) | BIT(27);
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if (enable) {
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regulator_enable(val);
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mdelay(10);
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wled_init(pinfo);
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qpnp_ibb_enable(true); /* +5V and -5V */
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mdelay(20);
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if (pinfo->lcd_reg_en)
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lcd_reg_enable();
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} else {
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if (pinfo->lcd_reg_en)
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lcd_reg_disable();
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regulator_disable(val);
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}
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return NO_ERROR;
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}
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int target_display_pre_on()
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{
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writel(0xC0000CCC, MDP_CLK_CTRL0);
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writel(0xC0000CCC, MDP_CLK_CTRL1);
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writel(0x00CCCCCC, MDP_CLK_CTRL2);
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writel(0x000000CC, MDP_CLK_CTRL6);
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writel(0x0CCCC0C0, MDP_CLK_CTRL3);
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writel(0xCCCCC0C0, MDP_CLK_CTRL4);
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writel(0xCCCCC0C0, MDP_CLK_CTRL5);
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writel(0x00CCC000, MDP_CLK_CTRL7);
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return NO_ERROR;
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}
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int target_dsi_phy_config(struct mdss_dsi_phy_ctrl *phy_db)
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{
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memcpy(phy_db->strength, panel_strength_ctrl, STRENGTH_SIZE_IN_BYTES_8996 *
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sizeof(uint32_t));
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memcpy(phy_db->regulator, panel_regulator_settings,
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REGULATOR_SIZE_IN_BYTES_8996 * sizeof(uint32_t));
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memcpy(phy_db->laneCfg, panel_lane_config, LANE_SIZE_IN_BYTES_8996);
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return NO_ERROR;
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}
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bool target_display_panel_node(char *pbuf, uint16_t buf_size)
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{
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int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
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bool ret = true;
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struct oem_panel_data oem = mdss_dsi_get_oem_data();
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if (!strcmp(oem.panel, HDMI_PANEL_NAME)) {
|
|
if (buf_size < (prefix_string_len + LK_OVERRIDE_PANEL_LEN +
|
|
strlen(HDMI_CONTROLLER_STRING))) {
|
|
dprintf(CRITICAL, "command line argument is greater than buffer size\n");
|
|
return false;
|
|
}
|
|
|
|
strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size);
|
|
buf_size -= prefix_string_len;
|
|
strlcat(pbuf, LK_OVERRIDE_PANEL, buf_size);
|
|
buf_size -= LK_OVERRIDE_PANEL_LEN;
|
|
strlcat(pbuf, HDMI_CONTROLLER_STRING, buf_size);
|
|
} else {
|
|
ret = gcdb_display_cmdline_arg(pbuf, buf_size);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void target_display_init(const char *panel_name)
|
|
{
|
|
struct oem_panel_data oem;
|
|
|
|
set_panel_cmd_string(panel_name);
|
|
oem = mdss_dsi_get_oem_data();
|
|
if (!strcmp(oem.panel, NO_PANEL_CONFIG)
|
|
|| !strcmp(oem.panel, SIM_VIDEO_PANEL)
|
|
|| !strcmp(oem.panel, SIM_DUALDSI_VIDEO_PANEL)
|
|
|| !strcmp(oem.panel, SIM_CMD_PANEL)
|
|
|| !strcmp(oem.panel, SIM_DUALDSI_CMD_PANEL)
|
|
|| oem.skip) {
|
|
dprintf(INFO, "Selected panel: %s\nSkip panel configuration\n",
|
|
oem.panel);
|
|
return;
|
|
} else if (!strcmp(oem.panel, HDMI_PANEL_NAME)) {
|
|
return;
|
|
}
|
|
|
|
if (gcdb_display_init(oem.panel, MDP_REV_50, (void *)MIPI_FB_ADDR)) {
|
|
target_force_cont_splash_disable(true);
|
|
msm_display_off();
|
|
}
|
|
|
|
if (!oem.cont_splash) {
|
|
dprintf(INFO, "Forcing continuous splash disable\n");
|
|
target_force_cont_splash_disable(true);
|
|
}
|
|
}
|
|
|
|
void target_display_shutdown(void)
|
|
{
|
|
gcdb_display_shutdown();
|
|
}
|