299 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			299 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 and
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 * only version 2 as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 */
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#ifndef __EXTERNAL_COMMON_H__
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#define __EXTERNAL_COMMON_H__
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#include <linux/switch.h>
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#ifdef DEBUG
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#ifndef DEV_DBG_PREFIX
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#define DEV_DBG_PREFIX "EXT_INTERFACE: "
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#endif
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#define DEV_DBG(args...)	pr_debug(DEV_DBG_PREFIX args)
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#else
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#define DEV_DBG(args...)	(void)0
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#endif /* DEBUG */
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#define DEV_INFO(args...)	dev_info(external_common_state->dev, args)
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#define DEV_WARN(args...)	dev_warn(external_common_state->dev, args)
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#define DEV_ERR(args...)	dev_err(external_common_state->dev, args)
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#ifdef CONFIG_FB_MSM_TVOUT
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#define TVOUT_VFRMT_NTSC_M_720x480i		0
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#define TVOUT_VFRMT_NTSC_J_720x480i		1
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#define TVOUT_VFRMT_PAL_BDGHIN_720x576i		2
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#define TVOUT_VFRMT_PAL_M_720x480i		3
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#define TVOUT_VFRMT_PAL_N_720x480i		4
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#elif defined(CONFIG_FB_MSM_HDMI_COMMON)
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/* all video formats defined by EIA CEA 861D */
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#define HDMI_VFRMT_640x480p60_4_3	0
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#define HDMI_VFRMT_720x480p60_4_3	1
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#define HDMI_VFRMT_720x480p60_16_9	2
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#define HDMI_VFRMT_1280x720p60_16_9	3
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#define HDMI_VFRMT_1920x1080i60_16_9	4
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#define HDMI_VFRMT_720x480i60_4_3	5
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#define HDMI_VFRMT_1440x480i60_4_3	HDMI_VFRMT_720x480i60_4_3
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#define HDMI_VFRMT_720x480i60_16_9	6
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#define HDMI_VFRMT_1440x480i60_16_9	HDMI_VFRMT_720x480i60_16_9
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#define HDMI_VFRMT_720x240p60_4_3	7
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#define HDMI_VFRMT_1440x240p60_4_3	HDMI_VFRMT_720x240p60_4_3
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#define HDMI_VFRMT_720x240p60_16_9	8
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#define HDMI_VFRMT_1440x240p60_16_9	HDMI_VFRMT_720x240p60_16_9
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#define HDMI_VFRMT_2880x480i60_4_3	9
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#define HDMI_VFRMT_2880x480i60_16_9	10
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#define HDMI_VFRMT_2880x240p60_4_3	11
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#define HDMI_VFRMT_2880x240p60_16_9	12
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#define HDMI_VFRMT_1440x480p60_4_3	13
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#define HDMI_VFRMT_1440x480p60_16_9	14
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#define HDMI_VFRMT_1920x1080p60_16_9	15
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#define HDMI_VFRMT_720x576p50_4_3	16
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#define HDMI_VFRMT_720x576p50_16_9	17
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#define HDMI_VFRMT_1280x720p50_16_9	18
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#define HDMI_VFRMT_1920x1080i50_16_9	19
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#define HDMI_VFRMT_720x576i50_4_3	20
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#define HDMI_VFRMT_1440x576i50_4_3	HDMI_VFRMT_720x576i50_4_3
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#define HDMI_VFRMT_720x576i50_16_9	21
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#define HDMI_VFRMT_1440x576i50_16_9	HDMI_VFRMT_720x576i50_16_9
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#define HDMI_VFRMT_720x288p50_4_3	22
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#define HDMI_VFRMT_1440x288p50_4_3	HDMI_VFRMT_720x288p50_4_3
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#define HDMI_VFRMT_720x288p50_16_9	23
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#define HDMI_VFRMT_1440x288p50_16_9	HDMI_VFRMT_720x288p50_16_9
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#define HDMI_VFRMT_2880x576i50_4_3	24
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#define HDMI_VFRMT_2880x576i50_16_9	25
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#define HDMI_VFRMT_2880x288p50_4_3	26
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#define HDMI_VFRMT_2880x288p50_16_9	27
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#define HDMI_VFRMT_1440x576p50_4_3	28
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#define HDMI_VFRMT_1440x576p50_16_9	29
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#define HDMI_VFRMT_1920x1080p50_16_9	30
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#define HDMI_VFRMT_1920x1080p24_16_9	31
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#define HDMI_VFRMT_1920x1080p25_16_9	32
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#define HDMI_VFRMT_1920x1080p30_16_9	33
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#define HDMI_VFRMT_2880x480p60_4_3	34
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#define HDMI_VFRMT_2880x480p60_16_9	35
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#define HDMI_VFRMT_2880x576p50_4_3	36
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#define HDMI_VFRMT_2880x576p50_16_9	37
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#define HDMI_VFRMT_1920x1250i50_16_9	38
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#define HDMI_VFRMT_1920x1080i100_16_9	39
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#define HDMI_VFRMT_1280x720p100_16_9	40
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#define HDMI_VFRMT_720x576p100_4_3	41
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#define HDMI_VFRMT_720x576p100_16_9	42
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#define HDMI_VFRMT_720x576i100_4_3	43
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#define HDMI_VFRMT_1440x576i100_4_3	HDMI_VFRMT_720x576i100_4_3
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#define HDMI_VFRMT_720x576i100_16_9	44
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#define HDMI_VFRMT_1440x576i100_16_9	HDMI_VFRMT_720x576i100_16_9
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#define HDMI_VFRMT_1920x1080i120_16_9	45
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#define HDMI_VFRMT_1280x720p120_16_9	46
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#define HDMI_VFRMT_720x480p120_4_3	47
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#define HDMI_VFRMT_720x480p120_16_9	48
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#define HDMI_VFRMT_720x480i120_4_3	49
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#define HDMI_VFRMT_1440x480i120_4_3	HDMI_VFRMT_720x480i120_4_3
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#define HDMI_VFRMT_720x480i120_16_9	50
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#define HDMI_VFRMT_1440x480i120_16_9	HDMI_VFRMT_720x480i120_16_9
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#define HDMI_VFRMT_720x576p200_4_3	51
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#define HDMI_VFRMT_720x576p200_16_9	52
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#define HDMI_VFRMT_720x576i200_4_3	53
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#define HDMI_VFRMT_1440x576i200_4_3	HDMI_VFRMT_720x576i200_4_3
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#define HDMI_VFRMT_720x576i200_16_9	54
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#define HDMI_VFRMT_1440x576i200_16_9	HDMI_VFRMT_720x576i200_16_9
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#define HDMI_VFRMT_720x480p240_4_3	55
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#define HDMI_VFRMT_720x480p240_16_9	56
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#define HDMI_VFRMT_720x480i240_4_3	57
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#define HDMI_VFRMT_1440x480i240_4_3	HDMI_VFRMT_720x480i240_4_3
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#define HDMI_VFRMT_720x480i240_16_9	58
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#define HDMI_VFRMT_1440x480i240_16_9	HDMI_VFRMT_720x480i240_16_9
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#define HDMI_VFRMT_FORCE_32BIT		0x7FFFFFFF
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/* Video Identification Codes from 65-127 are reserved for the future */
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#define HDMI_VFRMT_END			127
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/* VESA DMT TIMINGS */
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/* DMT ID: 23h, STD code: (81h, 80h), also a part of Established Timing III */
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#define HDMI_VFRMT_1280x1024p60_5_4	(HDMI_VFRMT_END + 1)
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#define DMT_VFRMT_END                   HDMI_VFRMT_1280x1024p60_5_4
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#define HDMI_VFRMT_MAX	                (DMT_VFRMT_END + 1)
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extern int ext_resolution;
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struct hdmi_disp_mode_timing_type {
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	uint32	video_format;
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	uint32	active_h;
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	uint32	front_porch_h;
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	uint32	pulse_width_h;
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	uint32	back_porch_h;
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	boolean	active_low_h;
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	uint32	active_v;
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	uint32	front_porch_v;
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	uint32	pulse_width_v;
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	uint32	back_porch_v;
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	boolean	active_low_v;
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	/* Must divide by 1000 to get the actual frequency in MHZ */
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	uint32	pixel_freq;
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	/* Must divide by 1000 to get the actual frequency in HZ */
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	uint32	refresh_rate;
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	boolean	interlaced;
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	boolean	supported;
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};
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#define HDMI_SETTINGS_640x480p60_4_3					\
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	{HDMI_VFRMT_640x480p60_4_3,      640,  16,  96,  48,  TRUE,	\
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	 480, 10, 2, 33, TRUE, 25200, 60000, FALSE, TRUE}
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#define HDMI_SETTINGS_720x480p60_4_3					\
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	{HDMI_VFRMT_720x480p60_4_3,      720,  16,  62,  60,  TRUE,	\
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	 480, 9, 6, 30,  TRUE, 27030, 60000, FALSE, TRUE}
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#define HDMI_SETTINGS_720x480p60_16_9					\
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	{HDMI_VFRMT_720x480p60_16_9,     720,  16,  62,  60,  TRUE,	\
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	 480, 9, 6, 30,  TRUE, 27030, 60000, FALSE, TRUE}
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#define HDMI_SETTINGS_1280x720p60_16_9					\
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	{HDMI_VFRMT_1280x720p60_16_9,    1280, 110, 40,  220, FALSE,	\
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	 720, 5, 5, 20, FALSE, 74250, 60000, FALSE, TRUE}
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#define HDMI_SETTINGS_1920x1080i60_16_9					\
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	{HDMI_VFRMT_1920x1080i60_16_9,   1920, 88,  44,  148, FALSE,	\
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	 540, 2, 5, 5, FALSE, 74250, 60000, FALSE, TRUE}
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#define HDMI_SETTINGS_1440x480i60_4_3					\
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	{HDMI_VFRMT_1440x480i60_4_3,     1440, 38,  124, 114, TRUE,	\
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	 240, 4, 3, 15, TRUE, 27000, 60000, TRUE, TRUE}
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#define HDMI_SETTINGS_1440x480i60_16_9					\
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	{HDMI_VFRMT_1440x480i60_16_9,    1440, 38,  124, 114, TRUE,	\
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	 240, 4, 3, 15, TRUE, 27000, 60000, TRUE, TRUE}
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#define HDMI_SETTINGS_1920x1080p60_16_9					\
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	{HDMI_VFRMT_1920x1080p60_16_9,   1920, 88,  44,  148,  FALSE,	\
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	 1080, 4, 5, 36, FALSE, 148500, 60000, FALSE, TRUE}
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#define HDMI_SETTINGS_720x576p50_4_3					\
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	{HDMI_VFRMT_720x576p50_4_3,      720,  12,  64,  68,   TRUE,	\
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	 576,  5, 5, 39, TRUE, 27000, 50000, FALSE, TRUE}
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#define HDMI_SETTINGS_720x576p50_16_9					\
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	{HDMI_VFRMT_720x576p50_16_9,     720,  12,  64,  68,   TRUE,	\
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	 576,  5, 5, 39, TRUE, 27000, 50000, FALSE, TRUE}
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#define HDMI_SETTINGS_1280x720p50_16_9					\
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	{HDMI_VFRMT_1280x720p50_16_9,    1280, 440, 40,  220,  FALSE,	\
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	 720,  5, 5, 20, FALSE, 74250, 50000, FALSE, TRUE}
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#define HDMI_SETTINGS_1440x576i50_4_3					\
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	{HDMI_VFRMT_1440x576i50_4_3,     1440, 24,  126, 138,  TRUE,	\
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	 288,  2, 3, 19, TRUE, 27000, 50000, TRUE, TRUE}
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#define HDMI_SETTINGS_1440x576i50_16_9					\
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	{HDMI_VFRMT_1440x576i50_16_9,    1440, 24,  126, 138,  TRUE,	\
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	 288,  2, 3, 19, TRUE, 27000, 50000, TRUE, TRUE}
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#define HDMI_SETTINGS_1920x1080p50_16_9					\
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	{HDMI_VFRMT_1920x1080p50_16_9,   1920,  528,  44,  148,  FALSE,	\
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	 1080, 4, 5, 36, FALSE, 148500, 50000, FALSE, TRUE}
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#define HDMI_SETTINGS_1920x1080p24_16_9					\
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	{HDMI_VFRMT_1920x1080p24_16_9,   1920,  638,  44,  148,  FALSE,	\
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	 1080, 4, 5, 36, FALSE, 74250, 24000, FALSE, TRUE}
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#define HDMI_SETTINGS_1920x1080p25_16_9					\
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	{HDMI_VFRMT_1920x1080p25_16_9,   1920,  528,  44,  148,  FALSE,	\
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	 1080, 4, 5, 36, FALSE, 74250, 25000, FALSE, TRUE}
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#define HDMI_SETTINGS_1920x1080p30_16_9					\
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	{HDMI_VFRMT_1920x1080p30_16_9,   1920,  88,   44,  148,  FALSE,	\
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	 1080, 4, 5, 36, FALSE, 74250, 30000, FALSE, TRUE}
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#define HDMI_SETTINGS_1280x1024p60_5_4					\
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	{HDMI_VFRMT_1280x1024p60_5_4,   1280,  48,  112,  248,  FALSE, \
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	 1024, 1, 3, 38, FALSE, 108000, 60000, FALSE, TRUE}
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/* A lookup table for all the supported display modes by the HDMI
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 * hardware and driver.  Use HDMI_SETUP_LUT in the module init to
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 * setup the LUT with the supported modes. */
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extern struct hdmi_disp_mode_timing_type
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	hdmi_common_supported_video_mode_lut[HDMI_VFRMT_MAX];
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/* Structure that encapsulates all the supported display modes by the HDMI sink
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 * device */
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struct hdmi_disp_mode_list_type {
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	uint32	disp_mode_list[HDMI_VFRMT_MAX];
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#define TOP_AND_BOTTOM		0x10
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#define FRAME_PACKING		0x20
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#define SIDE_BY_SIDE_HALF	0x40
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	uint32	disp_3d_mode_list[HDMI_VFRMT_MAX];
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	uint32	disp_multi_3d_mode_list[16];
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	uint32	disp_multi_3d_mode_list_cnt;
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	uint32	num_of_elements;
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};
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#endif
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/*
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 * As per the CEA-861E spec, there can be a total of 10 short audio
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 * descriptors with each SAD being 3 bytes long.
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 * Thus, the maximum length of the audio data block would be 30 bytes
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 */
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#define MAX_AUDIO_DATA_BLOCK_SIZE	30
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#define MAX_SPKR_ALLOC_DATA_BLOCK_SIZE	3
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struct external_common_state_type {
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	boolean hpd_state;
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	struct kobject *uevent_kobj;
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	uint32 video_resolution;
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	boolean default_res_supported;
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	struct device *dev;
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	struct switch_dev sdev;
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	struct switch_dev audio_sdev;
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#ifdef CONFIG_FB_MSM_HDMI_3D
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	boolean format_3d;
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	void (*switch_3d)(boolean on);
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#endif
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#ifdef CONFIG_FB_MSM_HDMI_COMMON
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	boolean hdcp_active;
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	boolean hpd_feature_on;
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	boolean hdmi_sink;
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	struct hdmi_disp_mode_list_type disp_mode_list;
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	uint16 video_latency, audio_latency;
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	uint16 physical_address;
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	uint32 preferred_video_format;
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	uint8 pt_scan_info;
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	uint8 it_scan_info;
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	uint8 ce_scan_info;
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	uint8 spd_vendor_name[8];
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	uint8 spd_product_description[16];
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	boolean present_3d;
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	boolean present_hdcp;
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	uint8 audio_data_block[MAX_AUDIO_DATA_BLOCK_SIZE];
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	int adb_size;
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	uint8 spkr_alloc_data_block[MAX_SPKR_ALLOC_DATA_BLOCK_SIZE];
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	int sadb_size;
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	int (*read_edid_block)(int block, uint8 *edid_buf);
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	int (*hpd_feature)(int on);
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#endif
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};
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/* The external interface driver needs to initialize the common state. */
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extern struct external_common_state_type *external_common_state;
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extern struct mutex external_common_state_hpd_mutex;
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extern struct mutex hdmi_msm_state_mutex;
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#ifdef CONFIG_FB_MSM_HDMI_COMMON
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#define VFRMT_NOT_SUPPORTED(VFRMT) \
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	{VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FALSE}
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#define HDMI_SETUP_LUT(MODE) do {					\
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		struct hdmi_disp_mode_timing_type mode			\
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			= HDMI_SETTINGS_ ## MODE;			\
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		hdmi_common_supported_video_mode_lut[mode.video_format]	\
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			= mode;						\
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	} while (0)
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int hdmi_common_read_edid(void);
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const char *video_format_2string(uint32 format);
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bool hdmi_common_get_video_format_from_drv_data(struct msm_fb_data_type *mfd);
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const struct hdmi_disp_mode_timing_type *hdmi_common_get_mode(uint32 mode);
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const struct hdmi_disp_mode_timing_type *hdmi_common_get_supported_mode(
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	uint32 mode);
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const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_mode(uint32 mode);
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const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_supported_mode(
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	uint32 mode);
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void hdmi_common_init_panel_info(struct msm_panel_info *pinfo);
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ssize_t video_3d_format_2string(uint32 format, char *buf);
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#endif
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int external_common_state_create(struct platform_device *pdev);
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void external_common_state_remove(void);
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#endif /* __EXTERNAL_COMMON_H__ */
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