175 lines
4.9 KiB
C
175 lines
4.9 KiB
C
/* Copyright (c) 2011, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef MT9E013_H
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#define MT9E013_H
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#include <linux/types.h>
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#include <mach/board.h>
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extern struct mt9e013_reg mt9e013_regs;
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struct reg_struct_init {
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uint8_t reg_0x0112; /* 0x0112*/
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uint8_t reg_0x0113; /* 0x0113*/
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uint8_t vt_pix_clk_div; /* 0x0301*/
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uint8_t pre_pll_clk_div; /* 0x0305*/
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uint8_t pll_multiplier; /* 0x0307*/
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uint8_t op_pix_clk_div; /* 0x0309*/
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uint8_t reg_0x3030; /*0x3030*/
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uint8_t reg_0x0111; /*0x0111*/
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uint8_t reg_0x0b00; /*0x0b00*/
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uint8_t reg_0x3001; /*0x3001*/
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uint8_t reg_0x3004; /*0x3004*/
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uint8_t reg_0x3007; /*0x3007*/
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uint8_t reg_0x3016; /*0x3016*/
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uint8_t reg_0x301d; /*0x301d*/
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uint8_t reg_0x317e; /*0x317E*/
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uint8_t reg_0x317f; /*0x317F*/
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uint8_t reg_0x3400; /*0x3400*/
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uint8_t reg_0x0b06; /*0x0b06*/
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uint8_t reg_0x0b07; /*0x0b07*/
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uint8_t reg_0x0b08; /*0x0b08*/
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uint8_t reg_0x0b09; /*0x0b09*/
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uint8_t reg_0x0136;
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uint8_t reg_0x0137;
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/* Edof */
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uint8_t reg_0x0b83; /*0x0b83*/
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uint8_t reg_0x0b84; /*0x0b84*/
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uint8_t reg_0x0b85; /*0x0b85*/
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uint8_t reg_0x0b88; /*0x0b88*/
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uint8_t reg_0x0b89; /*0x0b89*/
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uint8_t reg_0x0b8a; /*0x0b8a*/
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};
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struct reg_struct {
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uint8_t coarse_integration_time_hi; /*REG_COARSE_INTEGRATION_TIME_HI*/
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uint8_t coarse_integration_time_lo; /*REG_COARSE_INTEGRATION_TIME_LO*/
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uint8_t analogue_gain_code_global;
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uint8_t frame_length_lines_hi; /* 0x0340*/
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uint8_t frame_length_lines_lo; /* 0x0341*/
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uint8_t line_length_pck_hi; /* 0x0342*/
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uint8_t line_length_pck_lo; /* 0x0343*/
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uint8_t reg_0x3005; /* 0x3005*/
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uint8_t reg_0x3010; /* 0x3010*/
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uint8_t reg_0x3011; /* 0x3011*/
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uint8_t reg_0x301a; /* 0x301a*/
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uint8_t reg_0x3035; /* 0x3035*/
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uint8_t reg_0x3036; /* 0x3036*/
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uint8_t reg_0x3041; /*0x3041*/
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uint8_t reg_0x3042; /*0x3042*/
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uint8_t reg_0x3045; /*0x3045*/
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uint8_t reg_0x0b80; /* 0x0b80*/
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uint8_t reg_0x0900; /*0x0900*/
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uint8_t reg_0x0901; /* 0x0901*/
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uint8_t reg_0x0902; /*0x0902*/
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uint8_t reg_0x0383; /*0x0383*/
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uint8_t reg_0x0387; /* 0x0387*/
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uint8_t reg_0x034c; /* 0x034c*/
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uint8_t reg_0x034d; /*0x034d*/
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uint8_t reg_0x034e; /* 0x034e*/
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uint8_t reg_0x034f; /* 0x034f*/
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uint8_t reg_0x1716; /*0x1716*/
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uint8_t reg_0x1717; /*0x1717*/
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uint8_t reg_0x1718; /*0x1718*/
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uint8_t reg_0x1719; /*0x1719*/
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uint8_t reg_0x3210;/*0x3210*/
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uint8_t reg_0x111; /*0x111*/
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uint8_t reg_0x3410; /*0x3410*/
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uint8_t reg_0x3098;
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uint8_t reg_0x309D;
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uint8_t reg_0x0200;
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uint8_t reg_0x0201;
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};
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struct mt9e013_i2c_reg_conf {
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unsigned short waddr;
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unsigned short wdata;
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};
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enum mt9e013_test_mode_t {
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TEST_OFF,
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TEST_1,
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TEST_2,
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TEST_3
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};
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enum mt9e013_resolution_t {
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QTR_SIZE,
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FULL_SIZE,
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HFR_60FPS,
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HFR_90FPS,
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HFR_120FPS,
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INVALID_SIZE
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};
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enum mt9e013_setting {
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RES_PREVIEW,
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RES_CAPTURE
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};
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enum mt9e013_reg_update {
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/* Sensor egisters that need to be updated during initialization */
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REG_INIT,
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/* Sensor egisters that needs periodic I2C writes */
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UPDATE_PERIODIC,
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/* All the sensor Registers will be updated */
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UPDATE_ALL,
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/* Not valid update */
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UPDATE_INVALID
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};
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enum mt9e013_reg_pll {
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E013_VT_PIX_CLK_DIV,
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E013_VT_SYS_CLK_DIV,
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E013_PRE_PLL_CLK_DIV,
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E013_PLL_MULTIPLIER,
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E013_OP_PIX_CLK_DIV,
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E013_OP_SYS_CLK_DIV
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};
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enum mt9e013_reg_mode {
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E013_X_ADDR_START,
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E013_X_ADDR_END,
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E013_Y_ADDR_START,
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E013_Y_ADDR_END,
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E013_X_OUTPUT_SIZE,
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E013_Y_OUTPUT_SIZE,
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E013_DATAPATH_SELECT,
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E013_READ_MODE,
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E013_ANALOG_CONTROL5,
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E013_DAC_LD_4_5,
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E013_SCALING_MODE,
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E013_SCALE_M,
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E013_LINE_LENGTH_PCK,
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E013_FRAME_LENGTH_LINES,
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E013_COARSE_INTEGRATION_TIME,
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E013_FINE_INTEGRATION_TIME,
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E013_FINE_CORRECTION
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};
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struct mt9e013_reg {
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const struct mt9e013_i2c_reg_conf *reg_mipi;
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const unsigned short reg_mipi_size;
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const struct mt9e013_i2c_reg_conf *rec_settings;
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const unsigned short rec_size;
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const struct mt9e013_i2c_reg_conf *reg_pll;
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const unsigned short reg_pll_size;
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const struct mt9e013_i2c_reg_conf *reg_pll_60fps;
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const unsigned short reg_pll_60fps_size;
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const struct mt9e013_i2c_reg_conf *reg_pll_120fps;
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const unsigned short reg_pll_120fps_size;
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const struct mt9e013_i2c_reg_conf *reg_prev;
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const unsigned short reg_prev_size;
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const struct mt9e013_i2c_reg_conf *reg_snap;
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const unsigned short reg_snap_size;
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const struct mt9e013_i2c_reg_conf *reg_60fps;
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const unsigned short reg_60fps_size;
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const struct mt9e013_i2c_reg_conf *reg_120fps;
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const unsigned short reg_120fps_size;
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};
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#endif /* MT9E013_H */
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