1381 lines
36 KiB
C
1381 lines
36 KiB
C
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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#include <linux/memory_alloc.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_coresight.h>
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#include <linux/coresight.h>
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#include <linux/coresight-cti.h>
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#include <linux/usb/usb_qdss.h>
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#include <mach/memory.h>
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#include <mach/sps.h>
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#include <mach/usb_bam.h>
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#include <mach/msm_memory_dump.h>
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#include "coresight-priv.h"
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#define tmc_writel(drvdata, val, off) __raw_writel((val), drvdata->base + off)
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#define tmc_readl(drvdata, off) __raw_readl(drvdata->base + off)
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#define TMC_LOCK(drvdata) \
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do { \
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mb(); \
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tmc_writel(drvdata, 0x0, CORESIGHT_LAR); \
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} while (0)
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#define TMC_UNLOCK(drvdata) \
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do { \
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tmc_writel(drvdata, CORESIGHT_UNLOCK, CORESIGHT_LAR); \
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mb(); \
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} while (0)
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#define TMC_RSZ (0x004)
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#define TMC_STS (0x00C)
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#define TMC_RRD (0x010)
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#define TMC_RRP (0x014)
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#define TMC_RWP (0x018)
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#define TMC_TRG (0x01C)
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#define TMC_CTL (0x020)
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#define TMC_RWD (0x024)
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#define TMC_MODE (0x028)
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#define TMC_LBUFLEVEL (0x02C)
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#define TMC_CBUFLEVEL (0x030)
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#define TMC_BUFWM (0x034)
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#define TMC_RRPHI (0x038)
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#define TMC_RWPHI (0x03C)
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#define TMC_AXICTL (0x110)
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#define TMC_DBALO (0x118)
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#define TMC_DBAHI (0x11C)
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#define TMC_FFSR (0x300)
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#define TMC_FFCR (0x304)
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#define TMC_PSCR (0x308)
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#define TMC_ITMISCOP0 (0xEE0)
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#define TMC_ITTRFLIN (0xEE8)
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#define TMC_ITATBDATA0 (0xEEC)
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#define TMC_ITATBCTR2 (0xEF0)
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#define TMC_ITATBCTR1 (0xEF4)
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#define TMC_ITATBCTR0 (0xEF8)
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#define BYTES_PER_WORD 4
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#define TMC_ETR_BAM_PIPE_INDEX 0
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#define TMC_ETR_BAM_NR_PIPES 2
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#define TMC_ETFETB_DUMP_MAGIC_OFF (0)
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#define TMC_ETFETB_DUMP_MAGIC (0x5D1DB1BF)
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#define TMC_ETFETB_DUMP_VER_OFF (4)
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#define TMC_ETFETB_DUMP_VER (1)
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#define TMC_REG_DUMP_MAGIC_OFF (0)
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#define TMC_REG_DUMP_MAGIC (0x5D1DB1BF)
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#define TMC_REG_DUMP_VER_OFF (4)
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#define TMC_REG_DUMP_VER (1)
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enum tmc_config_type {
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TMC_CONFIG_TYPE_ETB,
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TMC_CONFIG_TYPE_ETR,
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TMC_CONFIG_TYPE_ETF,
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};
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enum tmc_mode {
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TMC_MODE_CIRCULAR_BUFFER,
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TMC_MODE_SOFTWARE_FIFO,
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TMC_MODE_HARDWARE_FIFO,
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};
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enum tmc_etr_out_mode {
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TMC_ETR_OUT_MODE_NONE,
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TMC_ETR_OUT_MODE_MEM,
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TMC_ETR_OUT_MODE_USB,
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};
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enum tmc_mem_intf_width {
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TMC_MEM_INTF_WIDTH_32BITS = 0x2,
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TMC_MEM_INTF_WIDTH_64BITS = 0x3,
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TMC_MEM_INTF_WIDTH_128BITS = 0x4,
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TMC_MEM_INTF_WIDTH_256BITS = 0x5,
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};
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struct tmc_etr_bam_data {
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struct sps_bam_props props;
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uint32_t handle;
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struct sps_pipe *pipe;
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struct sps_connect connect;
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uint32_t src_pipe_idx;
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uint32_t dest;
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uint32_t dest_pipe_idx;
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struct sps_mem_buffer desc_fifo;
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struct sps_mem_buffer data_fifo;
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bool enable;
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};
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struct tmc_drvdata {
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void __iomem *base;
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struct device *dev;
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struct coresight_device *csdev;
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struct miscdevice miscdev;
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struct clk *clk;
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spinlock_t spinlock;
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bool reset_flush_race;
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struct coresight_cti *cti_flush;
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struct coresight_cti *cti_reset;
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struct mutex read_lock;
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int read_count;
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bool reading;
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bool aborting;
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char *reg_buf;
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char *buf;
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unsigned long paddr;
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void __iomem *vaddr;
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uint32_t size;
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struct mutex usb_lock;
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struct usb_qdss_ch *usbch;
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struct tmc_etr_bam_data *bamdata;
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enum tmc_etr_out_mode out_mode;
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bool enable_to_bam;
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bool enable;
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enum tmc_config_type config_type;
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uint32_t trigger_cntr;
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};
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static void tmc_wait_for_flush(struct tmc_drvdata *drvdata)
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{
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int count;
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/* Ensure no flush is in progress */
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for (count = TIMEOUT_US; BVAL(tmc_readl(drvdata, TMC_FFSR), 0) != 0
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&& count > 0; count--)
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udelay(1);
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WARN(count == 0, "timeout while waiting for TMC flush, TMC_FFSR: %#x\n",
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tmc_readl(drvdata, TMC_FFSR));
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}
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static void tmc_wait_for_ready(struct tmc_drvdata *drvdata)
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{
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int count;
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/* Ensure formatter, unformatter and hardware fifo are empty */
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for (count = TIMEOUT_US; BVAL(tmc_readl(drvdata, TMC_STS), 2) != 1
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&& count > 0; count--)
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udelay(1);
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WARN(count == 0, "timeout while waiting for TMC ready, TMC_STS: %#x\n",
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tmc_readl(drvdata, TMC_STS));
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}
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static void tmc_flush_and_stop(struct tmc_drvdata *drvdata)
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{
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int count;
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uint32_t ffcr;
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ffcr = tmc_readl(drvdata, TMC_FFCR);
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ffcr |= BIT(12);
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tmc_writel(drvdata, ffcr, TMC_FFCR);
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ffcr |= BIT(6);
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tmc_writel(drvdata, ffcr, TMC_FFCR);
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/* Ensure flush completes */
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for (count = TIMEOUT_US; BVAL(tmc_readl(drvdata, TMC_FFCR), 6) != 0
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&& count > 0; count--)
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udelay(1);
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WARN(count == 0, "timeout while flushing TMC, TMC_FFCR: %#x\n",
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tmc_readl(drvdata, TMC_FFCR));
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tmc_wait_for_ready(drvdata);
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}
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static void __tmc_enable(struct tmc_drvdata *drvdata)
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{
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tmc_writel(drvdata, 0x1, TMC_CTL);
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}
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static void __tmc_disable(struct tmc_drvdata *drvdata)
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{
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tmc_writel(drvdata, 0x0, TMC_CTL);
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}
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static void tmc_etr_fill_usb_bam_data(struct tmc_drvdata *drvdata)
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{
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struct tmc_etr_bam_data *bamdata = drvdata->bamdata;
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get_bam2bam_connection_info(usb_bam_get_qdss_idx(0),
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&bamdata->dest,
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&bamdata->dest_pipe_idx,
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&bamdata->src_pipe_idx,
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&bamdata->desc_fifo,
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&bamdata->data_fifo);
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}
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static void __tmc_etr_enable_to_bam(struct tmc_drvdata *drvdata)
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{
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struct tmc_etr_bam_data *bamdata = drvdata->bamdata;
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uint32_t axictl;
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if (drvdata->enable_to_bam)
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return;
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/* Configure and enable required CSR registers */
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msm_qdss_csr_enable_bam_to_usb();
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/* Configure and enable ETR for usb bam output */
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TMC_UNLOCK(drvdata);
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tmc_writel(drvdata, bamdata->data_fifo.size / BYTES_PER_WORD,
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TMC_RSZ);
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tmc_writel(drvdata, TMC_MODE_CIRCULAR_BUFFER, TMC_MODE);
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axictl = tmc_readl(drvdata, TMC_AXICTL);
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axictl |= (0xF << 8);
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tmc_writel(drvdata, axictl, TMC_AXICTL);
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axictl &= ~(0x1 << 7);
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tmc_writel(drvdata, axictl, TMC_AXICTL);
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axictl = (axictl & ~0x3) | 0x2;
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tmc_writel(drvdata, axictl, TMC_AXICTL);
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tmc_writel(drvdata, bamdata->data_fifo.phys_base, TMC_DBALO);
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tmc_writel(drvdata, 0x0, TMC_DBAHI);
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tmc_writel(drvdata, 0x103, TMC_FFCR);
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tmc_writel(drvdata, drvdata->trigger_cntr, TMC_TRG);
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__tmc_enable(drvdata);
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TMC_LOCK(drvdata);
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drvdata->enable_to_bam = true;
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}
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static int tmc_etr_bam_enable(struct tmc_drvdata *drvdata)
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{
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struct tmc_etr_bam_data *bamdata = drvdata->bamdata;
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int ret;
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if (bamdata->enable)
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return 0;
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/* Reset bam to start with */
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ret = sps_device_reset(bamdata->handle);
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if (ret)
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goto err0;
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/* Now configure and enable bam */
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bamdata->pipe = sps_alloc_endpoint();
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if (!bamdata->pipe)
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return -ENOMEM;
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ret = sps_get_config(bamdata->pipe, &bamdata->connect);
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if (ret)
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goto err1;
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bamdata->connect.mode = SPS_MODE_SRC;
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bamdata->connect.source = bamdata->handle;
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bamdata->connect.event_thresh = 0x4;
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bamdata->connect.src_pipe_index = TMC_ETR_BAM_PIPE_INDEX;
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bamdata->connect.options = SPS_O_AUTO_ENABLE;
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bamdata->connect.destination = bamdata->dest;
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bamdata->connect.dest_pipe_index = bamdata->dest_pipe_idx;
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bamdata->connect.desc = bamdata->desc_fifo;
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bamdata->connect.data = bamdata->data_fifo;
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ret = sps_connect(bamdata->pipe, &bamdata->connect);
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if (ret)
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goto err1;
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bamdata->enable = true;
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return 0;
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err1:
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sps_free_endpoint(bamdata->pipe);
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err0:
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return ret;
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}
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static void __tmc_etr_disable_to_bam(struct tmc_drvdata *drvdata)
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{
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if (!drvdata->enable_to_bam)
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return;
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/* Ensure periodic flush is disabled in CSR block */
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msm_qdss_csr_disable_flush();
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TMC_UNLOCK(drvdata);
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tmc_wait_for_flush(drvdata);
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tmc_flush_and_stop(drvdata);
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__tmc_disable(drvdata);
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TMC_LOCK(drvdata);
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/* Disable CSR configuration */
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msm_qdss_csr_disable_bam_to_usb();
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drvdata->enable_to_bam = false;
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}
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static void tmc_etr_bam_disable(struct tmc_drvdata *drvdata)
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{
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struct tmc_etr_bam_data *bamdata = drvdata->bamdata;
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if (!bamdata->enable)
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return;
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sps_disconnect(bamdata->pipe);
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sps_free_endpoint(bamdata->pipe);
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bamdata->enable = false;
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}
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static void usb_notifier(void *priv, unsigned int event,
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struct qdss_request *d_req, struct usb_qdss_ch *ch)
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{
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struct tmc_drvdata *drvdata = priv;
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unsigned long flags;
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int ret = 0;
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mutex_lock(&drvdata->usb_lock);
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if (event == USB_QDSS_CONNECT) {
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tmc_etr_fill_usb_bam_data(drvdata);
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ret = tmc_etr_bam_enable(drvdata);
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if (ret)
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dev_err(drvdata->dev, "ETR BAM enable failed\n");
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spin_lock_irqsave(&drvdata->spinlock, flags);
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__tmc_etr_enable_to_bam(drvdata);
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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} else if (event == USB_QDSS_DISCONNECT) {
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spin_lock_irqsave(&drvdata->spinlock, flags);
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__tmc_etr_disable_to_bam(drvdata);
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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tmc_etr_bam_disable(drvdata);
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}
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mutex_unlock(&drvdata->usb_lock);
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}
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static void __tmc_etb_enable(struct tmc_drvdata *drvdata)
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{
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/* Zero out the memory to help with debug */
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memset(drvdata->buf, 0, drvdata->size);
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TMC_UNLOCK(drvdata);
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tmc_writel(drvdata, TMC_MODE_CIRCULAR_BUFFER, TMC_MODE);
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tmc_writel(drvdata, 0x1133, TMC_FFCR);
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tmc_writel(drvdata, drvdata->trigger_cntr, TMC_TRG);
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__tmc_enable(drvdata);
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TMC_LOCK(drvdata);
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}
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static void __tmc_etr_enable_to_mem(struct tmc_drvdata *drvdata)
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{
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uint32_t axictl;
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/* Zero out the memory to help with debug */
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memset(drvdata->vaddr, 0, drvdata->size);
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TMC_UNLOCK(drvdata);
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tmc_writel(drvdata, drvdata->size / BYTES_PER_WORD, TMC_RSZ);
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tmc_writel(drvdata, TMC_MODE_CIRCULAR_BUFFER, TMC_MODE);
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axictl = tmc_readl(drvdata, TMC_AXICTL);
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axictl |= (0xF << 8);
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tmc_writel(drvdata, axictl, TMC_AXICTL);
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axictl &= ~(0x1 << 7);
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tmc_writel(drvdata, axictl, TMC_AXICTL);
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axictl = (axictl & ~0x3) | 0x2;
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tmc_writel(drvdata, axictl, TMC_AXICTL);
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tmc_writel(drvdata, drvdata->paddr, TMC_DBALO);
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tmc_writel(drvdata, 0x0, TMC_DBAHI);
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tmc_writel(drvdata, 0x1133, TMC_FFCR);
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tmc_writel(drvdata, drvdata->trigger_cntr, TMC_TRG);
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__tmc_enable(drvdata);
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TMC_LOCK(drvdata);
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}
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static void __tmc_etf_enable(struct tmc_drvdata *drvdata)
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{
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TMC_UNLOCK(drvdata);
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tmc_writel(drvdata, TMC_MODE_HARDWARE_FIFO, TMC_MODE);
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tmc_writel(drvdata, 0x3, TMC_FFCR);
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tmc_writel(drvdata, 0x0, TMC_BUFWM);
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__tmc_enable(drvdata);
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TMC_LOCK(drvdata);
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}
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static int tmc_enable(struct tmc_drvdata *drvdata, enum tmc_mode mode)
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{
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int ret;
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unsigned long flags;
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ret = clk_prepare_enable(drvdata->clk);
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if (ret)
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return ret;
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mutex_lock(&drvdata->usb_lock);
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if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
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coresight_cti_map_trigout(drvdata->cti_flush, 1, 0);
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coresight_cti_map_trigin(drvdata->cti_reset, 0, 0);
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} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
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if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM &&
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!drvdata->reset_flush_race) {
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coresight_cti_map_trigout(drvdata->cti_flush, 3, 0);
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coresight_cti_map_trigin(drvdata->cti_reset, 2, 0);
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} else if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB) {
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drvdata->usbch = usb_qdss_open("qdss", drvdata,
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usb_notifier);
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if (IS_ERR(drvdata->usbch)) {
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dev_err(drvdata->dev, "usb_qdss_open failed\n");
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ret = PTR_ERR(drvdata->usbch);
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goto err0;
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}
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}
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} else {
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if (mode == TMC_MODE_CIRCULAR_BUFFER) {
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coresight_cti_map_trigout(drvdata->cti_flush, 1, 0);
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coresight_cti_map_trigin(drvdata->cti_reset, 0, 0);
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}
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}
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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ret = -EBUSY;
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goto err1;
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}
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|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
__tmc_etb_enable(drvdata);
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM)
|
|
__tmc_etr_enable_to_mem(drvdata);
|
|
} else {
|
|
if (mode == TMC_MODE_CIRCULAR_BUFFER)
|
|
__tmc_etb_enable(drvdata);
|
|
else
|
|
__tmc_etf_enable(drvdata);
|
|
}
|
|
drvdata->enable = true;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
mutex_unlock(&drvdata->usb_lock);
|
|
|
|
dev_info(drvdata->dev, "TMC enabled\n");
|
|
return 0;
|
|
err1:
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETR)
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB)
|
|
usb_qdss_close(drvdata->usbch);
|
|
err0:
|
|
mutex_unlock(&drvdata->usb_lock);
|
|
clk_disable_unprepare(drvdata->clk);
|
|
return ret;
|
|
}
|
|
|
|
static int tmc_enable_sink(struct coresight_device *csdev)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
|
|
|
|
return tmc_enable(drvdata, TMC_MODE_CIRCULAR_BUFFER);
|
|
}
|
|
|
|
static int tmc_enable_link(struct coresight_device *csdev, int inport,
|
|
int outport)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
|
|
|
|
return tmc_enable(drvdata, TMC_MODE_HARDWARE_FIFO);
|
|
}
|
|
|
|
static void __tmc_reg_dump(struct tmc_drvdata *drvdata)
|
|
{
|
|
char *reg_hdr;
|
|
uint32_t *reg_buf;
|
|
|
|
if (!drvdata->reg_buf || !drvdata->aborting)
|
|
return;
|
|
|
|
reg_hdr = drvdata->reg_buf - PAGE_SIZE;
|
|
reg_buf = (uint32_t *)drvdata->reg_buf;
|
|
|
|
reg_buf[1] = tmc_readl(drvdata, TMC_RSZ);
|
|
reg_buf[3] = tmc_readl(drvdata, TMC_STS);
|
|
reg_buf[5] = tmc_readl(drvdata, TMC_RRP);
|
|
reg_buf[6] = tmc_readl(drvdata, TMC_RWP);
|
|
reg_buf[7] = tmc_readl(drvdata, TMC_TRG);
|
|
reg_buf[8] = tmc_readl(drvdata, TMC_CTL);
|
|
reg_buf[10] = tmc_readl(drvdata, TMC_MODE);
|
|
reg_buf[11] = tmc_readl(drvdata, TMC_LBUFLEVEL);
|
|
reg_buf[12] = tmc_readl(drvdata, TMC_CBUFLEVEL);
|
|
reg_buf[13] = tmc_readl(drvdata, TMC_BUFWM);
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
reg_buf[14] = tmc_readl(drvdata, TMC_RRPHI);
|
|
reg_buf[15] = tmc_readl(drvdata, TMC_RWPHI);
|
|
reg_buf[68] = tmc_readl(drvdata, TMC_AXICTL);
|
|
reg_buf[70] = tmc_readl(drvdata, TMC_DBALO);
|
|
reg_buf[71] = tmc_readl(drvdata, TMC_DBAHI);
|
|
}
|
|
reg_buf[192] = tmc_readl(drvdata, TMC_FFSR);
|
|
reg_buf[193] = tmc_readl(drvdata, TMC_FFCR);
|
|
reg_buf[194] = tmc_readl(drvdata, TMC_PSCR);
|
|
reg_buf[1000] = tmc_readl(drvdata, CORESIGHT_CLAIMSET);
|
|
reg_buf[1001] = tmc_readl(drvdata, CORESIGHT_CLAIMCLR);
|
|
reg_buf[1005] = tmc_readl(drvdata, CORESIGHT_LSR);
|
|
reg_buf[1006] = tmc_readl(drvdata, CORESIGHT_AUTHSTATUS);
|
|
reg_buf[1010] = tmc_readl(drvdata, CORESIGHT_DEVID);
|
|
reg_buf[1011] = tmc_readl(drvdata, CORESIGHT_DEVTYPE);
|
|
reg_buf[1012] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR4);
|
|
reg_buf[1013] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR5);
|
|
reg_buf[1014] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR6);
|
|
reg_buf[1015] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR7);
|
|
reg_buf[1016] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR0);
|
|
reg_buf[1017] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR1);
|
|
reg_buf[1018] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR2);
|
|
reg_buf[1019] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR3);
|
|
reg_buf[1020] = tmc_readl(drvdata, CORESIGHT_COMPIDR0);
|
|
reg_buf[1021] = tmc_readl(drvdata, CORESIGHT_COMPIDR1);
|
|
reg_buf[1022] = tmc_readl(drvdata, CORESIGHT_COMPIDR2);
|
|
reg_buf[1023] = tmc_readl(drvdata, CORESIGHT_COMPIDR3);
|
|
|
|
*(uint32_t *)(reg_hdr + TMC_REG_DUMP_MAGIC_OFF) = TMC_REG_DUMP_MAGIC;
|
|
}
|
|
|
|
static void __tmc_etb_dump(struct tmc_drvdata *drvdata)
|
|
{
|
|
enum tmc_mem_intf_width memwidth;
|
|
uint8_t memwords;
|
|
char *hdr;
|
|
char *bufp;
|
|
uint32_t read_data;
|
|
int i;
|
|
|
|
memwidth = BMVAL(tmc_readl(drvdata, CORESIGHT_DEVID), 8, 10);
|
|
if (memwidth == TMC_MEM_INTF_WIDTH_32BITS)
|
|
memwords = 1;
|
|
else if (memwidth == TMC_MEM_INTF_WIDTH_64BITS)
|
|
memwords = 2;
|
|
else if (memwidth == TMC_MEM_INTF_WIDTH_128BITS)
|
|
memwords = 4;
|
|
else
|
|
memwords = 8;
|
|
|
|
bufp = drvdata->buf;
|
|
while (1) {
|
|
for (i = 0; i < memwords; i++) {
|
|
read_data = tmc_readl(drvdata, TMC_RRD);
|
|
if (read_data == 0xFFFFFFFF)
|
|
goto out;
|
|
memcpy(bufp, &read_data, BYTES_PER_WORD);
|
|
bufp += BYTES_PER_WORD;
|
|
}
|
|
}
|
|
|
|
out:
|
|
if (drvdata->aborting) {
|
|
hdr = drvdata->buf - PAGE_SIZE;
|
|
*(uint32_t *)(hdr + TMC_ETFETB_DUMP_MAGIC_OFF) =
|
|
TMC_ETFETB_DUMP_MAGIC;
|
|
}
|
|
}
|
|
|
|
static void __tmc_etb_disable(struct tmc_drvdata *drvdata)
|
|
{
|
|
TMC_UNLOCK(drvdata);
|
|
|
|
tmc_flush_and_stop(drvdata);
|
|
__tmc_etb_dump(drvdata);
|
|
__tmc_reg_dump(drvdata);
|
|
__tmc_disable(drvdata);
|
|
|
|
TMC_LOCK(drvdata);
|
|
}
|
|
|
|
static void __tmc_etr_dump(struct tmc_drvdata *drvdata)
|
|
{
|
|
uint32_t rwp, rwphi;
|
|
|
|
rwp = tmc_readl(drvdata, TMC_RWP);
|
|
rwphi = tmc_readl(drvdata, TMC_RWPHI);
|
|
|
|
if (BVAL(tmc_readl(drvdata, TMC_STS), 0))
|
|
drvdata->buf = drvdata->vaddr + rwp - drvdata->paddr;
|
|
else
|
|
drvdata->buf = drvdata->vaddr;
|
|
}
|
|
|
|
static void __tmc_etr_disable_to_mem(struct tmc_drvdata *drvdata)
|
|
{
|
|
TMC_UNLOCK(drvdata);
|
|
|
|
tmc_flush_and_stop(drvdata);
|
|
__tmc_etr_dump(drvdata);
|
|
__tmc_reg_dump(drvdata);
|
|
__tmc_disable(drvdata);
|
|
|
|
TMC_LOCK(drvdata);
|
|
}
|
|
|
|
static void __tmc_etf_disable(struct tmc_drvdata *drvdata)
|
|
{
|
|
TMC_UNLOCK(drvdata);
|
|
|
|
tmc_flush_and_stop(drvdata);
|
|
__tmc_disable(drvdata);
|
|
|
|
TMC_LOCK(drvdata);
|
|
}
|
|
|
|
static void tmc_disable(struct tmc_drvdata *drvdata, enum tmc_mode mode)
|
|
{
|
|
unsigned long flags;
|
|
|
|
mutex_lock(&drvdata->usb_lock);
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (drvdata->reading)
|
|
goto out;
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
__tmc_etb_disable(drvdata);
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM)
|
|
__tmc_etr_disable_to_mem(drvdata);
|
|
else if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB)
|
|
__tmc_etr_disable_to_bam(drvdata);
|
|
} else {
|
|
if (mode == TMC_MODE_CIRCULAR_BUFFER)
|
|
__tmc_etb_disable(drvdata);
|
|
else
|
|
__tmc_etf_disable(drvdata);
|
|
}
|
|
drvdata->enable = false;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
coresight_cti_unmap_trigin(drvdata->cti_reset, 0, 0);
|
|
coresight_cti_unmap_trigout(drvdata->cti_flush, 1, 0);
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM &&
|
|
!drvdata->reset_flush_race) {
|
|
coresight_cti_unmap_trigin(drvdata->cti_reset, 2, 0);
|
|
coresight_cti_unmap_trigout(drvdata->cti_flush, 3, 0);
|
|
} else if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB) {
|
|
tmc_etr_bam_disable(drvdata);
|
|
usb_qdss_close(drvdata->usbch);
|
|
}
|
|
} else {
|
|
if (mode == TMC_MODE_CIRCULAR_BUFFER) {
|
|
coresight_cti_unmap_trigin(drvdata->cti_reset, 0, 0);
|
|
coresight_cti_unmap_trigout(drvdata->cti_flush, 1, 0);
|
|
}
|
|
}
|
|
mutex_unlock(&drvdata->usb_lock);
|
|
|
|
clk_disable_unprepare(drvdata->clk);
|
|
|
|
dev_info(drvdata->dev, "TMC disabled\n");
|
|
return;
|
|
out:
|
|
drvdata->enable = false;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
mutex_unlock(&drvdata->usb_lock);
|
|
|
|
clk_disable_unprepare(drvdata->clk);
|
|
|
|
dev_info(drvdata->dev, "TMC disabled\n");
|
|
}
|
|
|
|
static void tmc_disable_sink(struct coresight_device *csdev)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
|
|
|
|
tmc_disable(drvdata, TMC_MODE_CIRCULAR_BUFFER);
|
|
}
|
|
|
|
static void tmc_disable_link(struct coresight_device *csdev, int inport,
|
|
int outport)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
|
|
|
|
tmc_disable(drvdata, TMC_MODE_HARDWARE_FIFO);
|
|
}
|
|
|
|
static void tmc_abort(struct coresight_device *csdev)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
|
|
unsigned long flags;
|
|
enum tmc_mode mode;
|
|
|
|
drvdata->aborting = true;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (drvdata->reading)
|
|
goto out0;
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
__tmc_etb_disable(drvdata);
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM)
|
|
__tmc_etr_disable_to_mem(drvdata);
|
|
else if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB)
|
|
__tmc_etr_disable_to_bam(drvdata);
|
|
} else {
|
|
mode = tmc_readl(drvdata, TMC_MODE);
|
|
if (mode == TMC_MODE_CIRCULAR_BUFFER)
|
|
__tmc_etb_disable(drvdata);
|
|
else
|
|
goto out1;
|
|
}
|
|
out0:
|
|
drvdata->enable = false;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
dev_info(drvdata->dev, "TMC aborted\n");
|
|
return;
|
|
out1:
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
}
|
|
|
|
static const struct coresight_ops_sink tmc_sink_ops = {
|
|
.enable = tmc_enable_sink,
|
|
.disable = tmc_disable_sink,
|
|
.abort = tmc_abort,
|
|
};
|
|
|
|
static const struct coresight_ops_link tmc_link_ops = {
|
|
.enable = tmc_enable_link,
|
|
.disable = tmc_disable_link,
|
|
};
|
|
|
|
static const struct coresight_ops tmc_etb_cs_ops = {
|
|
.sink_ops = &tmc_sink_ops,
|
|
};
|
|
|
|
static const struct coresight_ops tmc_etr_cs_ops = {
|
|
.sink_ops = &tmc_sink_ops,
|
|
};
|
|
|
|
static const struct coresight_ops tmc_etf_cs_ops = {
|
|
.sink_ops = &tmc_sink_ops,
|
|
.link_ops = &tmc_link_ops,
|
|
};
|
|
|
|
static int tmc_read_prepare(struct tmc_drvdata *drvdata)
|
|
{
|
|
int ret;
|
|
unsigned long flags;
|
|
enum tmc_mode mode;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (!drvdata->enable)
|
|
goto out;
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
__tmc_etb_disable(drvdata);
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM) {
|
|
__tmc_etr_disable_to_mem(drvdata);
|
|
} else {
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
} else {
|
|
mode = tmc_readl(drvdata, TMC_MODE);
|
|
if (mode == TMC_MODE_CIRCULAR_BUFFER) {
|
|
__tmc_etb_disable(drvdata);
|
|
} else {
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
}
|
|
out:
|
|
drvdata->reading = true;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
dev_info(drvdata->dev, "TMC read start\n");
|
|
return 0;
|
|
err:
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
return ret;
|
|
}
|
|
|
|
static void tmc_read_unprepare(struct tmc_drvdata *drvdata)
|
|
{
|
|
unsigned long flags;
|
|
enum tmc_mode mode;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (!drvdata->enable)
|
|
goto out;
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
__tmc_etb_enable(drvdata);
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM)
|
|
__tmc_etr_enable_to_mem(drvdata);
|
|
} else {
|
|
mode = tmc_readl(drvdata, TMC_MODE);
|
|
if (mode == TMC_MODE_CIRCULAR_BUFFER)
|
|
__tmc_etb_enable(drvdata);
|
|
}
|
|
out:
|
|
drvdata->reading = false;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
dev_info(drvdata->dev, "TMC read end\n");
|
|
}
|
|
|
|
static int tmc_open(struct inode *inode, struct file *file)
|
|
{
|
|
struct tmc_drvdata *drvdata = container_of(file->private_data,
|
|
struct tmc_drvdata, miscdev);
|
|
int ret = 0;
|
|
|
|
mutex_lock(&drvdata->read_lock);
|
|
if (drvdata->read_count++)
|
|
goto out;
|
|
|
|
ret = tmc_read_prepare(drvdata);
|
|
if (ret)
|
|
goto err;
|
|
out:
|
|
mutex_unlock(&drvdata->read_lock);
|
|
nonseekable_open(inode, file);
|
|
|
|
dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
|
|
return 0;
|
|
err:
|
|
drvdata->read_count--;
|
|
mutex_unlock(&drvdata->read_lock);
|
|
return ret;
|
|
}
|
|
|
|
static ssize_t tmc_read(struct file *file, char __user *data, size_t len,
|
|
loff_t *ppos)
|
|
{
|
|
struct tmc_drvdata *drvdata = container_of(file->private_data,
|
|
struct tmc_drvdata, miscdev);
|
|
char *bufp = drvdata->buf + *ppos;
|
|
|
|
if (*ppos + len > drvdata->size)
|
|
len = drvdata->size - *ppos;
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (bufp == (char *)(drvdata->vaddr + drvdata->size))
|
|
bufp = drvdata->vaddr;
|
|
else if (bufp > (char *)(drvdata->vaddr + drvdata->size))
|
|
bufp -= drvdata->size;
|
|
if ((bufp + len) > (char *)(drvdata->vaddr + drvdata->size))
|
|
len = (char *)(drvdata->vaddr + drvdata->size) - bufp;
|
|
}
|
|
|
|
if (copy_to_user(data, bufp, len)) {
|
|
dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
|
|
return -EFAULT;
|
|
}
|
|
|
|
*ppos += len;
|
|
|
|
dev_dbg(drvdata->dev, "%s: %d bytes copied, %d bytes left\n",
|
|
__func__, len, (int) (drvdata->size - *ppos));
|
|
return len;
|
|
}
|
|
|
|
static int tmc_release(struct inode *inode, struct file *file)
|
|
{
|
|
struct tmc_drvdata *drvdata = container_of(file->private_data,
|
|
struct tmc_drvdata, miscdev);
|
|
|
|
mutex_lock(&drvdata->read_lock);
|
|
if (--drvdata->read_count) {
|
|
if (drvdata->read_count < 0) {
|
|
WARN_ONCE(1, "mismatched close\n");
|
|
drvdata->read_count = 0;
|
|
}
|
|
goto out;
|
|
}
|
|
|
|
tmc_read_unprepare(drvdata);
|
|
out:
|
|
mutex_unlock(&drvdata->read_lock);
|
|
dev_dbg(drvdata->dev, "%s: released\n", __func__);
|
|
return 0;
|
|
}
|
|
|
|
static const struct file_operations tmc_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = tmc_open,
|
|
.read = tmc_read,
|
|
.release = tmc_release,
|
|
.llseek = no_llseek,
|
|
};
|
|
|
|
static ssize_t tmc_show_trigger_cntr(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
unsigned long val = drvdata->trigger_cntr;
|
|
|
|
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
|
|
}
|
|
|
|
static ssize_t tmc_store_trigger_cntr(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
unsigned long val;
|
|
|
|
if (sscanf(buf, "%lx", &val) != 1)
|
|
return -EINVAL;
|
|
|
|
drvdata->trigger_cntr = val;
|
|
return size;
|
|
}
|
|
static DEVICE_ATTR(trigger_cntr, S_IRUGO | S_IWUSR, tmc_show_trigger_cntr,
|
|
tmc_store_trigger_cntr);
|
|
|
|
static ssize_t tmc_etr_show_out_mode(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
|
|
return scnprintf(buf, PAGE_SIZE, "%s\n",
|
|
drvdata->out_mode == TMC_ETR_OUT_MODE_MEM ?
|
|
"mem" : "usb");
|
|
}
|
|
|
|
static ssize_t tmc_etr_store_out_mode(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t size)
|
|
{
|
|
struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
|
|
char str[10] = "";
|
|
unsigned long flags;
|
|
int ret;
|
|
|
|
if (strlen(buf) >= 10)
|
|
return -EINVAL;
|
|
if (sscanf(buf, "%s", str) != 1)
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&drvdata->usb_lock);
|
|
if (!strcmp(str, "mem")) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_MEM)
|
|
goto out;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (!drvdata->enable) {
|
|
drvdata->out_mode = TMC_ETR_OUT_MODE_MEM;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
goto out;
|
|
}
|
|
__tmc_etr_disable_to_bam(drvdata);
|
|
__tmc_etr_enable_to_mem(drvdata);
|
|
drvdata->out_mode = TMC_ETR_OUT_MODE_MEM;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
if (!drvdata->reset_flush_race) {
|
|
coresight_cti_map_trigout(drvdata->cti_flush, 3, 0);
|
|
coresight_cti_map_trigin(drvdata->cti_reset, 2, 0);
|
|
}
|
|
|
|
tmc_etr_bam_disable(drvdata);
|
|
usb_qdss_close(drvdata->usbch);
|
|
} else if (!strcmp(str, "usb")) {
|
|
if (drvdata->out_mode == TMC_ETR_OUT_MODE_USB)
|
|
goto out;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
if (!drvdata->enable) {
|
|
drvdata->out_mode = TMC_ETR_OUT_MODE_USB;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
goto out;
|
|
}
|
|
if (drvdata->reading) {
|
|
ret = -EBUSY;
|
|
goto err1;
|
|
}
|
|
__tmc_etr_disable_to_mem(drvdata);
|
|
drvdata->out_mode = TMC_ETR_OUT_MODE_USB;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
if (!drvdata->reset_flush_race) {
|
|
coresight_cti_unmap_trigin(drvdata->cti_reset, 2, 0);
|
|
coresight_cti_unmap_trigout(drvdata->cti_flush, 3, 0);
|
|
}
|
|
|
|
drvdata->usbch = usb_qdss_open("qdss", drvdata,
|
|
usb_notifier);
|
|
if (IS_ERR(drvdata->usbch)) {
|
|
dev_err(drvdata->dev, "usb_qdss_open failed\n");
|
|
ret = PTR_ERR(drvdata->usbch);
|
|
goto err0;
|
|
}
|
|
}
|
|
out:
|
|
mutex_unlock(&drvdata->usb_lock);
|
|
return size;
|
|
err1:
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
err0:
|
|
mutex_unlock(&drvdata->usb_lock);
|
|
return ret;
|
|
}
|
|
static DEVICE_ATTR(out_mode, S_IRUGO | S_IWUSR, tmc_etr_show_out_mode,
|
|
tmc_etr_store_out_mode);
|
|
|
|
static struct attribute *tmc_attrs[] = {
|
|
&dev_attr_trigger_cntr.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group tmc_attr_grp = {
|
|
.attrs = tmc_attrs,
|
|
};
|
|
|
|
static struct attribute *tmc_etr_attrs[] = {
|
|
&dev_attr_out_mode.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group tmc_etr_attr_grp = {
|
|
.attrs = tmc_etr_attrs,
|
|
};
|
|
|
|
static const struct attribute_group *tmc_etb_attr_grps[] = {
|
|
&tmc_attr_grp,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group *tmc_etr_attr_grps[] = {
|
|
&tmc_attr_grp,
|
|
&tmc_etr_attr_grp,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group *tmc_etf_attr_grps[] = {
|
|
&tmc_attr_grp,
|
|
NULL,
|
|
};
|
|
|
|
static int __devinit tmc_etr_bam_init(struct platform_device *pdev,
|
|
struct tmc_drvdata *drvdata)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct resource *res;
|
|
struct tmc_etr_bam_data *bamdata;
|
|
|
|
bamdata = devm_kzalloc(dev, sizeof(*bamdata), GFP_KERNEL);
|
|
if (!bamdata)
|
|
return -ENOMEM;
|
|
drvdata->bamdata = bamdata;
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bam-base");
|
|
if (!res)
|
|
return -ENODEV;
|
|
|
|
bamdata->props.phys_addr = res->start;
|
|
bamdata->props.virt_addr = devm_ioremap(dev, res->start,
|
|
resource_size(res));
|
|
if (!bamdata->props.virt_addr)
|
|
return -ENOMEM;
|
|
bamdata->props.virt_size = resource_size(res);
|
|
|
|
bamdata->props.event_threshold = 0x4; /* Pipe event threshold */
|
|
bamdata->props.summing_threshold = 0x10; /* BAM event threshold */
|
|
bamdata->props.irq = 0;
|
|
bamdata->props.num_pipes = TMC_ETR_BAM_NR_PIPES;
|
|
|
|
return sps_register_bam_device(&bamdata->props, &bamdata->handle);
|
|
}
|
|
|
|
static void tmc_etr_bam_exit(struct tmc_drvdata *drvdata)
|
|
{
|
|
struct tmc_etr_bam_data *bamdata = drvdata->bamdata;
|
|
|
|
if (!bamdata->handle)
|
|
return;
|
|
sps_deregister_bam_device(bamdata->handle);
|
|
}
|
|
|
|
static int __devinit tmc_probe(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
uint32_t devid;
|
|
struct device *dev = &pdev->dev;
|
|
struct coresight_platform_data *pdata;
|
|
struct tmc_drvdata *drvdata;
|
|
struct resource *res;
|
|
uint32_t reg_size;
|
|
static int etfetb_count;
|
|
static int count;
|
|
void *baddr;
|
|
struct msm_client_dump dump;
|
|
struct coresight_cti_data *ctidata;
|
|
struct coresight_desc *desc;
|
|
|
|
if (pdev->dev.of_node) {
|
|
pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
|
|
if (IS_ERR(pdata))
|
|
return PTR_ERR(pdata);
|
|
pdev->dev.platform_data = pdata;
|
|
}
|
|
|
|
drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
|
|
if (!drvdata)
|
|
return -ENOMEM;
|
|
drvdata->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, drvdata);
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tmc-base");
|
|
if (!res)
|
|
return -ENODEV;
|
|
reg_size = resource_size(res);
|
|
|
|
drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
|
|
if (!drvdata->base)
|
|
return -ENOMEM;
|
|
|
|
spin_lock_init(&drvdata->spinlock);
|
|
mutex_init(&drvdata->read_lock);
|
|
mutex_init(&drvdata->usb_lock);
|
|
|
|
drvdata->clk = devm_clk_get(dev, "core_clk");
|
|
if (IS_ERR(drvdata->clk))
|
|
return PTR_ERR(drvdata->clk);
|
|
|
|
ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_prepare_enable(drvdata->clk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
devid = tmc_readl(drvdata, CORESIGHT_DEVID);
|
|
drvdata->config_type = BMVAL(devid, 6, 7);
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
if (pdev->dev.of_node) {
|
|
ret = of_property_read_u32(pdev->dev.of_node,
|
|
"qcom,memory-reservation-size", &drvdata->size);
|
|
if (ret) {
|
|
clk_disable_unprepare(drvdata->clk);
|
|
return ret;
|
|
}
|
|
}
|
|
} else {
|
|
drvdata->size = tmc_readl(drvdata, TMC_RSZ) * BYTES_PER_WORD;
|
|
}
|
|
|
|
clk_disable_unprepare(drvdata->clk);
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
drvdata->paddr = allocate_contiguous_ebi_nomap(drvdata->size,
|
|
SZ_4K);
|
|
if (!drvdata->paddr)
|
|
return -ENOMEM;
|
|
drvdata->vaddr = devm_ioremap(dev, drvdata->paddr,
|
|
drvdata->size);
|
|
if (!drvdata->vaddr) {
|
|
ret = -ENOMEM;
|
|
goto err0;
|
|
}
|
|
memset(drvdata->vaddr, 0, drvdata->size);
|
|
drvdata->buf = drvdata->vaddr;
|
|
drvdata->out_mode = TMC_ETR_OUT_MODE_MEM;
|
|
|
|
ret = tmc_etr_bam_init(pdev, drvdata);
|
|
if (ret)
|
|
goto err0;
|
|
} else {
|
|
baddr = devm_kzalloc(dev, PAGE_SIZE + drvdata->size,
|
|
GFP_KERNEL);
|
|
if (!baddr)
|
|
return -ENOMEM;
|
|
drvdata->buf = baddr + PAGE_SIZE;
|
|
*(uint32_t *)(baddr + TMC_ETFETB_DUMP_VER_OFF) =
|
|
TMC_ETFETB_DUMP_VER;
|
|
dump.id = MSM_TMC_ETFETB + etfetb_count;
|
|
dump.start_addr = virt_to_phys(baddr);
|
|
dump.end_addr = dump.start_addr + PAGE_SIZE + drvdata->size;
|
|
ret = msm_dump_table_register(&dump);
|
|
/*
|
|
* Don't free the buffer in case of error since it can still
|
|
* be used to provide dump collection via the device node or
|
|
* as part of abort.
|
|
*/
|
|
if (ret)
|
|
dev_info(dev, "TMC ETF-ETB dump setup failed\n");
|
|
etfetb_count++;
|
|
}
|
|
|
|
baddr = devm_kzalloc(dev, PAGE_SIZE + reg_size, GFP_KERNEL);
|
|
if (baddr) {
|
|
drvdata->reg_buf = baddr + PAGE_SIZE;
|
|
*(uint32_t *)(baddr + TMC_REG_DUMP_VER_OFF) = TMC_REG_DUMP_VER;
|
|
dump.id = MSM_TMC0_REG + count;
|
|
dump.start_addr = virt_to_phys(baddr);
|
|
dump.end_addr = dump.start_addr + PAGE_SIZE + reg_size;
|
|
ret = msm_dump_table_register(&dump);
|
|
/*
|
|
* Don't free the buffer in case of error since it can still
|
|
* be used to dump registers as part of abort to aid post crash
|
|
* parsing.
|
|
*/
|
|
if (ret)
|
|
dev_info(dev, "TMC REG dump setup failed\n");
|
|
} else {
|
|
dev_info(dev, "TMC REG dump space allocation failed\n");
|
|
}
|
|
count++;
|
|
|
|
if (pdev->dev.of_node) {
|
|
drvdata->reset_flush_race = of_property_read_bool(
|
|
pdev->dev.of_node,
|
|
"qcom,reset-flush-race");
|
|
|
|
ctidata = of_get_coresight_cti_data(dev, pdev->dev.of_node);
|
|
if (IS_ERR(ctidata)) {
|
|
dev_err(dev, "invalid cti data\n");
|
|
} else if (ctidata && ctidata->nr_ctis == 2) {
|
|
drvdata->cti_flush = coresight_cti_get(
|
|
ctidata->names[0]);
|
|
if (IS_ERR(drvdata->cti_flush))
|
|
dev_err(dev, "failed to get flush cti\n");
|
|
|
|
drvdata->cti_reset = coresight_cti_get(
|
|
ctidata->names[1]);
|
|
if (IS_ERR(drvdata->cti_reset))
|
|
dev_err(dev, "failed to get reset cti\n");
|
|
}
|
|
}
|
|
|
|
desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
|
|
if (!desc) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
desc->type = CORESIGHT_DEV_TYPE_SINK;
|
|
desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
|
|
desc->ops = &tmc_etb_cs_ops;
|
|
desc->pdata = pdev->dev.platform_data;
|
|
desc->dev = &pdev->dev;
|
|
desc->groups = tmc_etb_attr_grps;
|
|
desc->owner = THIS_MODULE;
|
|
drvdata->csdev = coresight_register(desc);
|
|
if (IS_ERR(drvdata->csdev)) {
|
|
ret = PTR_ERR(drvdata->csdev);
|
|
goto err1;
|
|
}
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
desc->type = CORESIGHT_DEV_TYPE_SINK;
|
|
desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
|
|
desc->ops = &tmc_etr_cs_ops;
|
|
desc->pdata = pdev->dev.platform_data;
|
|
desc->dev = &pdev->dev;
|
|
desc->groups = tmc_etr_attr_grps;
|
|
desc->owner = THIS_MODULE;
|
|
drvdata->csdev = coresight_register(desc);
|
|
if (IS_ERR(drvdata->csdev)) {
|
|
ret = PTR_ERR(drvdata->csdev);
|
|
goto err1;
|
|
}
|
|
} else {
|
|
desc->type = CORESIGHT_DEV_TYPE_LINKSINK;
|
|
desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
|
|
desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
|
|
desc->ops = &tmc_etf_cs_ops;
|
|
desc->pdata = pdev->dev.platform_data;
|
|
desc->dev = &pdev->dev;
|
|
desc->groups = tmc_etf_attr_grps;
|
|
desc->owner = THIS_MODULE;
|
|
drvdata->csdev = coresight_register(desc);
|
|
if (IS_ERR(drvdata->csdev)) {
|
|
ret = PTR_ERR(drvdata->csdev);
|
|
goto err1;
|
|
}
|
|
}
|
|
|
|
drvdata->miscdev.name = ((struct coresight_platform_data *)
|
|
(pdev->dev.platform_data))->name;
|
|
drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
|
|
drvdata->miscdev.fops = &tmc_fops;
|
|
ret = misc_register(&drvdata->miscdev);
|
|
if (ret)
|
|
goto err2;
|
|
|
|
dev_info(dev, "TMC initialized\n");
|
|
return 0;
|
|
err2:
|
|
coresight_unregister(drvdata->csdev);
|
|
err1:
|
|
tmc_etr_bam_exit(drvdata);
|
|
err0:
|
|
free_contiguous_memory_by_paddr(drvdata->paddr);
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit tmc_remove(struct platform_device *pdev)
|
|
{
|
|
struct tmc_drvdata *drvdata = platform_get_drvdata(pdev);
|
|
|
|
misc_deregister(&drvdata->miscdev);
|
|
coresight_unregister(drvdata->csdev);
|
|
tmc_etr_bam_exit(drvdata);
|
|
free_contiguous_memory_by_paddr(drvdata->paddr);
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id tmc_match[] = {
|
|
{.compatible = "arm,coresight-tmc"},
|
|
{}
|
|
};
|
|
EXPORT_COMPAT("arm,coresight-tmc");
|
|
|
|
static struct platform_driver tmc_driver = {
|
|
.probe = tmc_probe,
|
|
.remove = __devexit_p(tmc_remove),
|
|
.driver = {
|
|
.name = "coresight-tmc",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = tmc_match,
|
|
},
|
|
};
|
|
|
|
static int __init tmc_init(void)
|
|
{
|
|
return platform_driver_register(&tmc_driver);
|
|
}
|
|
module_init(tmc_init);
|
|
|
|
static void __exit tmc_exit(void)
|
|
{
|
|
platform_driver_unregister(&tmc_driver);
|
|
}
|
|
module_exit(tmc_exit);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("CoreSight Trace Memory Controller driver");
|