33 lines
599 B
C
33 lines
599 B
C
#ifndef __ASM_CPU_SH4_DMA_H
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#define __ASM_CPU_SH4_DMA_H
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/* SH7751/7760/7780 DMA IRQ sources */
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#ifdef CONFIG_CPU_SH4A
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#include <cpu/dma-sh4a.h>
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#else /* CONFIG_CPU_SH4A */
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/*
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* SH7750/SH7751/SH7760
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*/
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#define DMTE0_IRQ 34
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#define DMTE4_IRQ 44
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#define DMTE6_IRQ 46
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#define DMAE0_IRQ 38
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#define SH_DMAC_BASE0 0xffa00000
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#define SH_DMAC_BASE1 0xffa00070
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/* Definitions for the SuperH DMAC */
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#define TM_BURST 0x00000080
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#define TS_8 0x00000010
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#define TS_16 0x00000020
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#define TS_32 0x00000030
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#define TS_64 0x00000000
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#define DMAOR_COD 0x00000008
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#endif
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#endif /* __ASM_CPU_SH4_DMA_H */
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