126 lines
3.4 KiB
C
126 lines
3.4 KiB
C
/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/platform_device.h>
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#include <asm/pmu.h>
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#include <mach/irqs.h>
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#include <mach/socinfo.h>
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static struct resource cpu_pmu_resource[] = {
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{
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.start = INT_ARMQC_PERFMON,
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.end = INT_ARMQC_PERFMON,
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.flags = IORESOURCE_IRQ,
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},
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};
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#ifdef CONFIG_CPU_HAS_L2_PMU
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static struct resource l2_pmu_resource[] = {
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{
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.start = SC_SICL2PERFMONIRPTREQ,
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.end = SC_SICL2PERFMONIRPTREQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device l2_pmu_device = {
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.name = "l2-pmu",
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.id = ARM_PMU_DEVICE_L2CC,
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.resource = l2_pmu_resource,
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.num_resources = ARRAY_SIZE(l2_pmu_resource),
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};
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#endif
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static struct platform_device cpu_pmu_device = {
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.name = "cpu-pmu",
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.id = ARM_PMU_DEVICE_CPU,
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.resource = cpu_pmu_resource,
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.num_resources = ARRAY_SIZE(cpu_pmu_resource),
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};
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/*
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* The 8625 is a special case. Due to the requirement of a single
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* kernel image for the 7x27a and 8625 (which share IRQ headers),
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* this target breaks the uniformity of IRQ names.
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* See the file - arch/arm/mach-msm/include/mach/irqs-8625.h
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*/
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#ifdef CONFIG_ARCH_MSM8625
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static struct resource msm8625_cpu_pmu_resource[] = {
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{
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.start = MSM8625_INT_ARMQC_PERFMON,
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.end = MSM8625_INT_ARMQC_PERFMON,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device msm8625_cpu_pmu_device = {
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.name = "cpu-pmu",
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.id = ARM_PMU_DEVICE_CPU,
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.resource = msm8625_cpu_pmu_resource,
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.num_resources = ARRAY_SIZE(msm8625_cpu_pmu_resource),
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};
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static struct resource msm8625_l2_pmu_resource[] = {
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{
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.start = MSM8625_INT_SC_SICL2PERFMONIRPTREQ,
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.end = MSM8625_INT_SC_SICL2PERFMONIRPTREQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device msm8625_l2_pmu_device = {
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.name = "l2-pmu",
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.id = ARM_PMU_DEVICE_L2CC,
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.resource = msm8625_l2_pmu_resource,
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.num_resources = ARRAY_SIZE(msm8625_l2_pmu_resource),
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};
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#endif
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static struct platform_device *pmu_devices[] = {
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&cpu_pmu_device,
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#ifdef CONFIG_CPU_HAS_L2_PMU
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&l2_pmu_device,
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#endif
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};
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static int __init msm_pmu_init(void)
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{
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/*
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* For the targets we know are multicore's set the request/free IRQ
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* handlers to call the percpu API.
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* Defaults to unicore API {request,free}_irq().
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* See arch/arm/kernel/perf_event.c
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*/
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#if defined(CONFIG_ARCH_MSM_KRAITMP) || defined(CONFIG_ARCH_MSM_SCORPIONMP) \
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|| (defined(CONFIG_ARCH_MSM_CORTEX_A5) && !defined(CONFIG_MSM_VIC))
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cpu_pmu_device.dev.platform_data = &multicore_data;
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#endif
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/*
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* The 7x27a and 8625 require a single kernel image.
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* So we need to check if we're on an 8625 at runtime
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* and point to the appropriate 'struct resource'.
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*/
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#ifdef CONFIG_ARCH_MSM8625
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if (cpu_is_msm8625() || cpu_is_msm8625q()) {
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pmu_devices[0] = &msm8625_cpu_pmu_device;
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pmu_devices[1] = &msm8625_l2_pmu_device;
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msm8625_cpu_pmu_device.dev.platform_data = &multicore_data;
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}
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#endif
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return platform_add_devices(pmu_devices, ARRAY_SIZE(pmu_devices));
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}
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arch_initcall(msm_pmu_init);
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