991 lines
24 KiB
C
991 lines
24 KiB
C
/*
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* Copyright (C) 2008 Google, Inc.
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* Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <asm/clkdev.h>
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#include <mach/irqs.h>
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#include <mach/msm_iomap.h>
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#include <mach/dma.h>
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#include <mach/board.h>
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#include "devices.h"
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#include "smd_private.h"
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#include <asm/mach/flash.h>
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#include <asm/mach/mmc.h>
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#include <mach/msm_hsusb.h>
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#include <mach/usbdiag.h>
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#include <mach/rpc_hsusb.h>
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#include "clock-pcom.h"
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static struct resource resources_uart1[] = {
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{
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.start = INT_UART1,
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.end = INT_UART1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = MSM_UART1_PHYS,
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.end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource resources_uart2[] = {
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{
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.start = INT_UART2,
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.end = INT_UART2,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = MSM_UART2_PHYS,
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.end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource resources_uart3[] = {
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{
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.start = INT_UART3,
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.end = INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = MSM_UART3_PHYS,
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.end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device msm_device_uart1 = {
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.name = "msm_serial",
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.id = 0,
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.num_resources = ARRAY_SIZE(resources_uart1),
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.resource = resources_uart1,
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};
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struct platform_device msm_device_uart2 = {
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.name = "msm_serial",
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.id = 1,
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.num_resources = ARRAY_SIZE(resources_uart2),
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.resource = resources_uart2,
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};
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struct platform_device msm_device_uart3 = {
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.name = "msm_serial",
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.id = 2,
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.num_resources = ARRAY_SIZE(resources_uart3),
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.resource = resources_uart3,
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};
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#define MSM_UART1DM_PHYS 0xA0200000
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#define MSM_UART2DM_PHYS 0xA0300000
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static struct resource msm_uart1_dm_resources[] = {
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{
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.start = MSM_UART1DM_PHYS,
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.end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_UART1DM_IRQ,
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.end = INT_UART1DM_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = INT_UART1DM_RX,
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.end = INT_UART1DM_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = DMOV_HSUART1_TX_CHAN,
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.end = DMOV_HSUART1_RX_CHAN,
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.name = "uartdm_channels",
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.flags = IORESOURCE_DMA,
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},
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{
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.start = DMOV_HSUART1_TX_CRCI,
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.end = DMOV_HSUART1_RX_CRCI,
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.name = "uartdm_crci",
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.flags = IORESOURCE_DMA,
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},
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};
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static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
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struct platform_device msm_device_uart_dm1 = {
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.name = "msm_serial_hs",
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.id = 0,
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.num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
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.resource = msm_uart1_dm_resources,
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.dev = {
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.dma_mask = &msm_uart_dm1_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static struct resource msm_uart2_dm_resources[] = {
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{
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.start = MSM_UART2DM_PHYS,
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.end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_UART2DM_IRQ,
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.end = INT_UART2DM_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = INT_UART2DM_RX,
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.end = INT_UART2DM_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = DMOV_HSUART2_TX_CHAN,
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.end = DMOV_HSUART2_RX_CHAN,
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.name = "uartdm_channels",
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.flags = IORESOURCE_DMA,
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},
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{
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.start = DMOV_HSUART2_TX_CRCI,
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.end = DMOV_HSUART2_RX_CRCI,
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.name = "uartdm_crci",
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.flags = IORESOURCE_DMA,
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},
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};
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static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
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struct platform_device msm_device_uart_dm2 = {
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.name = "msm_serial_hs",
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.id = 1,
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.num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
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.resource = msm_uart2_dm_resources,
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.dev = {
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.dma_mask = &msm_uart_dm2_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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#define MSM_I2C_SIZE SZ_4K
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#define MSM_I2C_PHYS 0xA9900000
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static struct resource resources_i2c[] = {
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{
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.start = MSM_I2C_PHYS,
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.end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_PWB_I2C,
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.end = INT_PWB_I2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_i2c = {
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.name = "msm_i2c",
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.id = 0,
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.num_resources = ARRAY_SIZE(resources_i2c),
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.resource = resources_i2c,
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};
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#define MSM_HSUSB_PHYS 0xA0800000
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static struct resource resources_hsusb_otg[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 dma_mask = 0xffffffffULL;
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struct platform_device msm_device_hsusb_otg = {
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.name = "msm_hsusb_otg",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_hsusb_otg),
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.resource = resources_hsusb_otg,
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.dev = {
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.dma_mask = &dma_mask,
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.coherent_dma_mask = 0xffffffffULL,
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},
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};
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static struct resource resources_hsusb_peripheral[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource resources_gadget_peripheral[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_hsusb_peripheral = {
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.name = "msm_hsusb_peripheral",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
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.resource = resources_hsusb_peripheral,
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.dev = {
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.dma_mask = &dma_mask,
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.coherent_dma_mask = 0xffffffffULL,
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},
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};
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struct platform_device msm_device_gadget_peripheral = {
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.name = "msm_hsusb",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_gadget_peripheral),
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.resource = resources_gadget_peripheral,
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.dev = {
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.dma_mask = &dma_mask,
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.coherent_dma_mask = 0xffffffffULL,
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},
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};
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static struct resource resources_hsusb_host[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_hsusb_host = {
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.name = "msm_hsusb_host",
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.id = 0,
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.num_resources = ARRAY_SIZE(resources_hsusb_host),
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.resource = resources_hsusb_host,
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.dev = {
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.dma_mask = &dma_mask,
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.coherent_dma_mask = 0xffffffffULL,
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},
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};
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static struct platform_device *msm_host_devices[] = {
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&msm_device_hsusb_host,
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};
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int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
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{
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struct platform_device *pdev;
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pdev = msm_host_devices[host];
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if (!pdev)
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return -ENODEV;
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pdev->dev.platform_data = plat;
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return platform_device_register(pdev);
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}
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#ifdef CONFIG_USB_ANDROID_DIAG
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struct usb_diag_platform_data usb_diag_pdata = {
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.ch_name = DIAG_LEGACY,
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.update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
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};
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struct platform_device usb_diag_device = {
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.name = "usb_diag",
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.id = -1,
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.dev = {
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.platform_data = &usb_diag_pdata,
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},
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};
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#endif
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#ifdef CONFIG_USB_F_SERIAL
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static struct usb_gadget_fserial_platform_data fserial_pdata = {
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.no_ports = 2,
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};
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struct platform_device usb_gadget_fserial_device = {
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.name = "usb_fserial",
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.id = -1,
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.dev = {
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.platform_data = &fserial_pdata,
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},
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};
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#endif
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#define MSM_NAND_PHYS 0xA0A00000
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static struct resource resources_nand[] = {
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[0] = {
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.name = "msm_nand_dmac",
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.start = DMOV_NAND_CHAN,
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.end = DMOV_NAND_CHAN,
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.flags = IORESOURCE_DMA,
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},
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[1] = {
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.name = "msm_nand_phys",
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.start = MSM_NAND_PHYS,
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.end = MSM_NAND_PHYS + 0x7FF,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource resources_otg[] = {
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{
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.start = MSM_HSUSB_PHYS,
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.end = MSM_HSUSB_PHYS + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HS,
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.end = INT_USB_HS,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device msm_device_otg = {
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.name = "msm_otg",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_otg),
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.resource = resources_otg,
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.dev = {
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.coherent_dma_mask = 0xffffffffULL,
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},
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};
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struct flash_platform_data msm_nand_data = {
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.parts = NULL,
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.nr_parts = 0,
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};
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struct platform_device msm_device_nand = {
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.name = "msm_nand",
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.id = -1,
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.num_resources = ARRAY_SIZE(resources_nand),
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.resource = resources_nand,
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.dev = {
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.platform_data = &msm_nand_data,
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},
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};
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struct platform_device msm_device_smd = {
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.name = "msm_smd",
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.id = -1,
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};
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static struct resource msm_dmov_resource[] = {
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{
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.start = INT_ADM_AARM,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = 0xA9700000,
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.end = 0xA9700000 + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct msm_dmov_pdata msm_dmov_pdata = {
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.sd = 3,
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.sd_size = 0x400,
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};
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struct platform_device msm_device_dmov = {
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.name = "msm_dmov",
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.id = -1,
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.resource = msm_dmov_resource,
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.num_resources = ARRAY_SIZE(msm_dmov_resource),
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.dev = {
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.platform_data = &msm_dmov_pdata,
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},
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};
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#define MSM_SDC1_BASE 0xA0400000
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#define MSM_SDC2_BASE 0xA0500000
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#define MSM_SDC3_BASE 0xA0600000
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#define MSM_SDC4_BASE 0xA0700000
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static struct resource resources_sdc1[] = {
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{
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.name = "core_mem",
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.start = MSM_SDC1_BASE,
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.end = MSM_SDC1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "core_irq",
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.start = INT_SDC1_0,
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.end = INT_SDC1_1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "dma_chnl",
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.start = DMOV_SDC1_CHAN,
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.end = DMOV_SDC1_CHAN,
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.flags = IORESOURCE_DMA,
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},
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{
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.name = "dma_crci",
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.start = DMOV_SDC1_CRCI,
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.end = DMOV_SDC1_CRCI,
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.flags = IORESOURCE_DMA,
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}
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};
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static struct resource resources_sdc2[] = {
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{
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.name = "core_mem",
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.start = MSM_SDC2_BASE,
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.end = MSM_SDC2_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "core_irq",
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.start = INT_SDC2_0,
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.end = INT_SDC2_1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "dma_chnl",
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.start = DMOV_SDC2_CHAN,
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.end = DMOV_SDC2_CHAN,
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.flags = IORESOURCE_DMA,
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},
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{
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.name = "dma_crci",
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.start = DMOV_SDC2_CRCI,
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.end = DMOV_SDC2_CRCI,
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.flags = IORESOURCE_DMA,
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}
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};
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static struct resource resources_sdc3[] = {
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{
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.name = "core_mem",
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.start = MSM_SDC3_BASE,
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.end = MSM_SDC3_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "core_irq",
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.start = INT_SDC3_0,
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.end = INT_SDC3_1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "dma_chnl",
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.start = DMOV_SDC3_CHAN,
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.end = DMOV_SDC3_CHAN,
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.flags = IORESOURCE_DMA,
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},
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{
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.name = "dma_crci",
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.start = DMOV_SDC3_CRCI,
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.end = DMOV_SDC3_CRCI,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct resource resources_sdc4[] = {
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{
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.name = "core_mem",
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.start = MSM_SDC4_BASE,
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.end = MSM_SDC4_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "core_irq",
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.start = INT_SDC4_0,
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.end = INT_SDC4_1,
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|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.name = "dma_chnl",
|
|
.start = DMOV_SDC4_CHAN,
|
|
.end = DMOV_SDC4_CHAN,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.name = "dma_crci",
|
|
.start = DMOV_SDC4_CRCI,
|
|
.end = DMOV_SDC4_CRCI,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device msm_device_sdc1 = {
|
|
.name = "msm_sdcc",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(resources_sdc1),
|
|
.resource = resources_sdc1,
|
|
.dev = {
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
};
|
|
|
|
struct platform_device msm_device_sdc2 = {
|
|
.name = "msm_sdcc",
|
|
.id = 2,
|
|
.num_resources = ARRAY_SIZE(resources_sdc2),
|
|
.resource = resources_sdc2,
|
|
.dev = {
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
};
|
|
|
|
struct platform_device msm_device_sdc3 = {
|
|
.name = "msm_sdcc",
|
|
.id = 3,
|
|
.num_resources = ARRAY_SIZE(resources_sdc3),
|
|
.resource = resources_sdc3,
|
|
.dev = {
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
};
|
|
|
|
struct platform_device msm_device_sdc4 = {
|
|
.name = "msm_sdcc",
|
|
.id = 4,
|
|
.num_resources = ARRAY_SIZE(resources_sdc4),
|
|
.resource = resources_sdc4,
|
|
.dev = {
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
};
|
|
|
|
static struct platform_device *msm_sdcc_devices[] __initdata = {
|
|
&msm_device_sdc1,
|
|
&msm_device_sdc2,
|
|
&msm_device_sdc3,
|
|
&msm_device_sdc4,
|
|
};
|
|
|
|
int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
|
|
{
|
|
struct platform_device *pdev;
|
|
|
|
if (controller < 1 || controller > 4)
|
|
return -EINVAL;
|
|
|
|
pdev = msm_sdcc_devices[controller-1];
|
|
pdev->dev.platform_data = plat;
|
|
return platform_device_register(pdev);
|
|
}
|
|
|
|
#define RAMFS_INFO_MAGICNUMBER 0x654D4D43
|
|
#define RAMFS_INFO_VERSION 0x00000001
|
|
#define RAMFS_MODEMSTORAGE_ID 0x4D454653
|
|
|
|
static struct resource rmt_storage_resources[] = {
|
|
{
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
static struct platform_device rmt_storage_device = {
|
|
.name = "rmt_storage",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(rmt_storage_resources),
|
|
.resource = rmt_storage_resources,
|
|
};
|
|
|
|
struct shared_ramfs_entry {
|
|
uint32_t client_id; /* Client id to uniquely identify a client */
|
|
uint32_t base_addr; /* Base address of shared RAMFS memory */
|
|
uint32_t size; /* Size of the shared RAMFS memory */
|
|
uint32_t reserved; /* Reserved attribute for future use */
|
|
};
|
|
struct shared_ramfs_table {
|
|
uint32_t magic_id; /* Identify RAMFS details in SMEM */
|
|
uint32_t version; /* Version of shared_ramfs_table */
|
|
uint32_t entries; /* Total number of valid entries */
|
|
struct shared_ramfs_entry ramfs_entry[3]; /* List all entries */
|
|
};
|
|
|
|
int __init rmt_storage_add_ramfs(void)
|
|
{
|
|
struct shared_ramfs_table *ramfs_table;
|
|
struct shared_ramfs_entry *ramfs_entry;
|
|
int index;
|
|
|
|
ramfs_table = smem_alloc(SMEM_SEFS_INFO,
|
|
sizeof(struct shared_ramfs_table));
|
|
|
|
if (!ramfs_table) {
|
|
printk(KERN_WARNING "%s: No RAMFS table in SMEM\n", __func__);
|
|
return -ENOENT;
|
|
}
|
|
|
|
if ((ramfs_table->magic_id != (u32) RAMFS_INFO_MAGICNUMBER) ||
|
|
(ramfs_table->version != (u32) RAMFS_INFO_VERSION)) {
|
|
printk(KERN_WARNING "%s: Magic / Version mismatch:, "
|
|
"magic_id=%#x, format_version=%#x\n", __func__,
|
|
ramfs_table->magic_id, ramfs_table->version);
|
|
return -ENOENT;
|
|
}
|
|
|
|
for (index = 0; index < ramfs_table->entries; index++) {
|
|
ramfs_entry = &ramfs_table->ramfs_entry[index];
|
|
|
|
/* Find a match for the Modem Storage RAMFS area */
|
|
if (ramfs_entry->client_id == (u32) RAMFS_MODEMSTORAGE_ID) {
|
|
printk(KERN_INFO "%s: RAMFS Info (from SMEM): "
|
|
"Baseaddr = 0x%08x, Size = 0x%08x\n", __func__,
|
|
ramfs_entry->base_addr, ramfs_entry->size);
|
|
|
|
rmt_storage_resources[0].start = ramfs_entry->base_addr;
|
|
rmt_storage_resources[0].end = ramfs_entry->base_addr +
|
|
ramfs_entry->size - 1;
|
|
platform_device_register(&rmt_storage_device);
|
|
return 0;
|
|
}
|
|
}
|
|
return -ENOENT;
|
|
}
|
|
|
|
#if defined(CONFIG_FB_MSM_MDP40)
|
|
#define MDP_BASE 0xA3F00000
|
|
#define PMDH_BASE 0xAD600000
|
|
#define EMDH_BASE 0xAD700000
|
|
#define TVENC_BASE 0xAD400000
|
|
#else
|
|
#define MDP_BASE 0xAA200000
|
|
#define PMDH_BASE 0xAA600000
|
|
#define EMDH_BASE 0xAA700000
|
|
#define TVENC_BASE 0xAA400000
|
|
#endif
|
|
|
|
static struct resource msm_mdp_resources[] = {
|
|
{
|
|
.name = "mdp",
|
|
.start = MDP_BASE,
|
|
.end = MDP_BASE + 0x000F0000 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = INT_MDP,
|
|
.end = INT_MDP,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct resource msm_mddi_resources[] = {
|
|
{
|
|
.name = "pmdh",
|
|
.start = PMDH_BASE,
|
|
.end = PMDH_BASE + PAGE_SIZE - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
}
|
|
};
|
|
|
|
static struct resource msm_mddi_ext_resources[] = {
|
|
{
|
|
.name = "emdh",
|
|
.start = EMDH_BASE,
|
|
.end = EMDH_BASE + PAGE_SIZE - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
}
|
|
};
|
|
|
|
static struct resource msm_ebi2_lcd_resources[] = {
|
|
{
|
|
.name = "base",
|
|
.start = 0xa0d00000,
|
|
.end = 0xa0d00000 + PAGE_SIZE - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "lcd01",
|
|
.start = 0x98000000,
|
|
.end = 0x98000000 + 0x80000 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.name = "lcd02",
|
|
.start = 0x9c000000,
|
|
.end = 0x9c000000 + 0x80000 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
static struct resource msm_tvenc_resources[] = {
|
|
{
|
|
.name = "tvenc",
|
|
.start = TVENC_BASE,
|
|
.end = TVENC_BASE + PAGE_SIZE - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
}
|
|
};
|
|
|
|
static struct platform_device msm_mdp_device = {
|
|
.name = "mdp",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(msm_mdp_resources),
|
|
.resource = msm_mdp_resources,
|
|
};
|
|
|
|
static struct platform_device msm_mddi_device = {
|
|
.name = "mddi",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(msm_mddi_resources),
|
|
.resource = msm_mddi_resources,
|
|
};
|
|
|
|
static struct platform_device msm_mddi_ext_device = {
|
|
.name = "mddi_ext",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
|
|
.resource = msm_mddi_ext_resources,
|
|
};
|
|
|
|
static struct platform_device msm_ebi2_lcd_device = {
|
|
.name = "ebi2_lcd",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
|
|
.resource = msm_ebi2_lcd_resources,
|
|
};
|
|
|
|
struct platform_device msm_lcdc_device = {
|
|
.name = "lcdc",
|
|
.id = 0,
|
|
};
|
|
|
|
static struct platform_device msm_tvenc_device = {
|
|
.name = "tvenc",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(msm_tvenc_resources),
|
|
.resource = msm_tvenc_resources,
|
|
};
|
|
|
|
/* TSIF begin */
|
|
#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
|
|
|
|
#define MSM_TSIF_PHYS (0xa0100000)
|
|
#define MSM_TSIF_SIZE (0x200)
|
|
|
|
static struct resource tsif_resources[] = {
|
|
[0] = {
|
|
.flags = IORESOURCE_IRQ,
|
|
.start = INT_TSIF_IRQ,
|
|
.end = INT_TSIF_IRQ,
|
|
},
|
|
[1] = {
|
|
.flags = IORESOURCE_MEM,
|
|
.start = MSM_TSIF_PHYS,
|
|
.end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
|
|
},
|
|
[2] = {
|
|
.flags = IORESOURCE_DMA,
|
|
.start = DMOV_TSIF_CHAN,
|
|
.end = DMOV_TSIF_CRCI,
|
|
},
|
|
};
|
|
|
|
static void tsif_release(struct device *dev)
|
|
{
|
|
dev_info(dev, "release\n");
|
|
}
|
|
|
|
struct platform_device msm_device_tsif = {
|
|
.name = "msm_tsif",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(tsif_resources),
|
|
.resource = tsif_resources,
|
|
.dev = {
|
|
.release = tsif_release,
|
|
},
|
|
};
|
|
#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
|
|
/* TSIF end */
|
|
|
|
#define MSM_TSSC_PHYS 0xAA300000
|
|
static struct resource resources_tssc[] = {
|
|
{
|
|
.start = MSM_TSSC_PHYS,
|
|
.end = MSM_TSSC_PHYS + SZ_4K - 1,
|
|
.name = "tssc",
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = INT_TCHSCRN1,
|
|
.end = INT_TCHSCRN1,
|
|
.name = "tssc1",
|
|
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
|
|
},
|
|
{
|
|
.start = INT_TCHSCRN2,
|
|
.end = INT_TCHSCRN2,
|
|
.name = "tssc2",
|
|
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
|
|
},
|
|
};
|
|
|
|
struct platform_device msm_device_tssc = {
|
|
.name = "msm_touchscreen",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(resources_tssc),
|
|
.resource = resources_tssc,
|
|
};
|
|
|
|
static void __init msm_register_device(struct platform_device *pdev, void *data)
|
|
{
|
|
int ret;
|
|
|
|
pdev->dev.platform_data = data;
|
|
|
|
ret = platform_device_register(pdev);
|
|
if (ret)
|
|
dev_err(&pdev->dev,
|
|
"%s: platform_device_register() failed = %d\n",
|
|
__func__, ret);
|
|
}
|
|
|
|
void __init msm_fb_register_device(char *name, void *data)
|
|
{
|
|
if (!strncmp(name, "mdp", 3))
|
|
msm_register_device(&msm_mdp_device, data);
|
|
else if (!strncmp(name, "pmdh", 4))
|
|
msm_register_device(&msm_mddi_device, data);
|
|
else if (!strncmp(name, "emdh", 4))
|
|
msm_register_device(&msm_mddi_ext_device, data);
|
|
else if (!strncmp(name, "ebi2", 4))
|
|
msm_register_device(&msm_ebi2_lcd_device, data);
|
|
else if (!strncmp(name, "tvenc", 5))
|
|
msm_register_device(&msm_tvenc_device, data);
|
|
else if (!strncmp(name, "lcdc", 4))
|
|
msm_register_device(&msm_lcdc_device, data);
|
|
else
|
|
printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
|
|
}
|
|
|
|
static struct platform_device msm_camera_device = {
|
|
.name = "msm_camera",
|
|
.id = 0,
|
|
};
|
|
|
|
void __init msm_camera_register_device(void *res, uint32_t num,
|
|
void *data)
|
|
{
|
|
msm_camera_device.num_resources = num;
|
|
msm_camera_device.resource = res;
|
|
|
|
msm_register_device(&msm_camera_device, data);
|
|
}
|
|
|
|
static DEFINE_CLK_PCOM(adm_clk, ADM_CLK, 0);
|
|
static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, 0);
|
|
static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK, CLK_MIN);
|
|
static DEFINE_CLK_PCOM(ebi2_clk, EBI2_CLK, 0);
|
|
static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, 0);
|
|
static DEFINE_CLK_PCOM(gp_clk, GP_CLK, 0);
|
|
static DEFINE_CLK_PCOM(i2c_clk, I2C_CLK, 0);
|
|
static DEFINE_CLK_PCOM(icodec_rx_clk, ICODEC_RX_CLK, 0);
|
|
static DEFINE_CLK_PCOM(icodec_tx_clk, ICODEC_TX_CLK, 0);
|
|
static DEFINE_CLK_PCOM(imem_clk, IMEM_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(mdc_clk, MDC_CLK, 0);
|
|
static DEFINE_CLK_PCOM(pmdh_clk, PMDH_CLK, OFF | CLK_MINMAX);
|
|
static DEFINE_CLK_PCOM(mdp_clk, MDP_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(mdp_lcdc_pclk_clk, MDP_LCDC_PCLK_CLK, 0);
|
|
static DEFINE_CLK_PCOM(mdp_lcdc_pad_pclk_clk, MDP_LCDC_PAD_PCLK_CLK, 0);
|
|
static DEFINE_CLK_PCOM(mdp_vsync_clk, MDP_VSYNC_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(pbus_clk, PBUS_CLK, CLK_MIN);
|
|
static DEFINE_CLK_PCOM(pcm_clk, PCM_CLK, 0);
|
|
static DEFINE_CLK_PCOM(sdac_clk, SDAC_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc1_clk, SDC1_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc1_p_clk, SDC1_P_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc2_clk, SDC2_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc2_p_clk, SDC2_P_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc3_clk, SDC3_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc3_p_clk, SDC3_P_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc4_clk, SDC4_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(sdc4_p_clk, SDC4_P_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(uart1_clk, UART1_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(uart2_clk, UART2_CLK, 0);
|
|
static DEFINE_CLK_PCOM(uart3_clk, UART3_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(uart1dm_clk, UART1DM_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(uart2dm_clk, UART2DM_CLK, 0);
|
|
static DEFINE_CLK_PCOM(usb_hs_clk, USB_HS_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(usb_hs_p_clk, USB_HS_P_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(usb_otg_clk, USB_OTG_CLK, 0);
|
|
static DEFINE_CLK_PCOM(vdc_clk, VDC_CLK, OFF | CLK_MIN);
|
|
static DEFINE_CLK_PCOM(vfe_clk, VFE_CLK, OFF);
|
|
static DEFINE_CLK_PCOM(vfe_mdc_clk, VFE_MDC_CLK, OFF);
|
|
|
|
struct clk_lookup msm_clocks_7x25[] = {
|
|
CLK_LOOKUP("core_clk", adm_clk.c, "msm_dmov"),
|
|
CLK_LOOKUP("adsp_clk", adsp_clk.c, NULL),
|
|
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
|
|
CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
|
|
CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
|
|
CLK_LOOKUP("core_clk", gp_clk.c, NULL),
|
|
CLK_LOOKUP("core_clk", i2c_clk.c, "msm_i2c.0"),
|
|
CLK_LOOKUP("icodec_rx_clk", icodec_rx_clk.c, NULL),
|
|
CLK_LOOKUP("icodec_tx_clk", icodec_tx_clk.c, NULL),
|
|
CLK_LOOKUP("mem_clk", imem_clk.c, NULL),
|
|
CLK_LOOKUP("mdc_clk", mdc_clk.c, NULL),
|
|
CLK_LOOKUP("mddi_clk", pmdh_clk.c, NULL),
|
|
CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
|
|
CLK_LOOKUP("mdp_lcdc_pclk_clk", mdp_lcdc_pclk_clk.c, NULL),
|
|
CLK_LOOKUP("mdp_lcdc_pad_pclk_clk", mdp_lcdc_pad_pclk_clk.c, NULL),
|
|
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
|
|
CLK_LOOKUP("pbus_clk", pbus_clk.c, NULL),
|
|
CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
|
|
CLK_LOOKUP("sdac_clk", sdac_clk.c, NULL),
|
|
CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
|
|
CLK_LOOKUP("iface_clk", sdc1_p_clk.c, "msm_sdcc.1"),
|
|
CLK_LOOKUP("core_clk", sdc2_clk.c, "msm_sdcc.2"),
|
|
CLK_LOOKUP("iface_clk", sdc2_p_clk.c, "msm_sdcc.2"),
|
|
CLK_LOOKUP("core_clk", sdc3_clk.c, "msm_sdcc.3"),
|
|
CLK_LOOKUP("iface_clk", sdc3_p_clk.c, "msm_sdcc.3"),
|
|
CLK_LOOKUP("core_clk", sdc4_clk.c, "msm_sdcc.4"),
|
|
CLK_LOOKUP("iface_clk", sdc4_p_clk.c, "msm_sdcc.4"),
|
|
CLK_LOOKUP("core_clk", uart1_clk.c, "msm_serial.0"),
|
|
CLK_LOOKUP("core_clk", uart2_clk.c, "msm_serial.1"),
|
|
CLK_LOOKUP("core_clk", uart3_clk.c, "msm_serial.2"),
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CLK_LOOKUP("core_clk", uart1dm_clk.c, "msm_serial_hs.0"),
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CLK_LOOKUP("core_clk", uart2dm_clk.c, "msm_serial_hs.1"),
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CLK_LOOKUP("alt_core_clk", usb_hs_clk.c, "msm_otg"),
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CLK_LOOKUP("iface_clk", usb_hs_p_clk.c, "msm_otg"),
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CLK_LOOKUP("alt_core_clk", usb_hs_clk.c, "msm_hsusb_peripheral"),
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CLK_LOOKUP("iface_clk", usb_hs_p_clk.c, "msm_hsusb_peripheral"),
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|
CLK_LOOKUP("alt_core_clk", usb_otg_clk.c, NULL),
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CLK_LOOKUP("vdc_clk", vdc_clk.c, NULL),
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CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
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CLK_LOOKUP("vfe_mdc_clk", vfe_mdc_clk.c, NULL),
|
|
};
|
|
|
|
unsigned msm_num_clocks_7x25 = ARRAY_SIZE(msm_clocks_7x25);
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|
|