253 lines
8.5 KiB
C
253 lines
8.5 KiB
C
/*
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* Copyright (c) 2008, Google Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __PLATFORM_MSM7K_MDDI_HW_H
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#define __PLATFORM_MSM7K_MDDI_HW_H
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#ifdef TARGET_MSM7630_SURF
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#define MSM_MDDI_BASE 0xAD600000
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#else
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#define MSM_MDDI_BASE 0xAA600000
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#endif
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#if MDP4
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#define MSM_MDP_BASE1 0xA3F00000
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#define LCDC_BASE 0xC0000
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#else
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#define MSM_MDP_BASE1 0xAA200000
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#define LCDC_BASE 0xE0000
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#endif
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#ifdef MDDI_MULTI_WRITE
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#define MAX_CLIENT_REG 128
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#else
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#define MAX_CLIENT_REG 1
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#endif
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enum { /* display configuration for MDP4 */
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PRIMARY_INTF_SEL,
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SECONDARY_INTF_SEL,
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EXTERNAL_INTF_SEL
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};
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#define outp32(port, val) (*((volatile unsigned *) (port)) = ((unsigned) (val)))
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/* see 80-VA736-2 C pp 776-787 */
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#define MDDI_REG(off) (MSM_MDDI_BASE + (off))
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#define MDDI_CMD MDDI_REG(0x0000)
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#define MDDI_VERSION MDDI_REG(0x0004)
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#define MDDI_PRI_PTR MDDI_REG(0x0008)
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#define MDDI_SEC_PTR MDDI_REG(0x000C)
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#define MDDI_BPS MDDI_REG(0x0010)
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#define MDDI_SPM MDDI_REG(0x0014)
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#define MDDI_INT MDDI_REG(0x0018)
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#define MDDI_INT_PRI_PTR_READ (1 << 0)
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#define MDDI_INT_SEC_PTR_READ (1 << 1)
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#define MDDI_INT_REV_DATA_AVAIL (1 << 2)
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#define MDDI_INT_DISP_REQ (1 << 3)
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#define MDDI_INT_PRI_UNDERFLOW (1 << 4)
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#define MDDI_INT_SEC_UNDERFLOW (1 << 5)
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#define MDDI_INT_REV_OVERFLOW (1 << 6)
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#define MDDI_INT_CRC_ERROR (1 << 7)
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#define MDDI_INT_MDDI_IN (1 << 8)
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#define MDDI_INT_PRI_OVERWRITE (1 << 9)
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#define MDDI_INT_SEC_OVERWRITE (1 << 10)
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#define MDDI_INT_REV_OVERWRITE (1 << 11)
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#define MDDI_INT_DMA_FAILURE (1 << 12)
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#define MDDI_INT_LINK_ACTIVE (1 << 13)
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#define MDDI_INT_IN_HIBERNATION (1 << 14)
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#define MDDI_INT_PRI_LINK_LIST_DONE (1 << 15)
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#define MDDI_INT_SEC_LINK_LIST_DONE (1 << 16)
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#define MDDI_INT_NO_REQ_PKTS_PENDING (1 << 17)
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#define MDDI_INT_RTD_FAILURE (1 << 18)
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#define MDDI_INT_REV_PKT_RECEIVED (1 << 19)
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#define MDDI_INT_REV_PKTS_AVAIL (1 << 20)
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#define MDDI_INTEN MDDI_REG(0x001C)
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#define MDDI_REV_PTR MDDI_REG(0x0020)
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#define MDDI_REV_SIZE MDDI_REG(0x0024)
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#define MDDI_STAT MDDI_REG(0x0028)
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#define MDDI_STAT_LINK_ACTIVE (1 << 0)
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#define MDDI_STAT_NEW_REV_PTR (1 << 1)
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#define MDDI_STAT_NEW_PRI_PTR (1 << 2)
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#define MDDI_STAT_NEW_SEC_PTR (1 << 3)
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#define MDDI_STAT_IN_HIBERNATION (1 << 4)
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#define MDDI_STAT_PRI_LINK_LIST_DONE (1 << 5)
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#define MDDI_STAT_SEC_LINK_LIST_DONE (1 << 6)
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#define MDDI_STAT_SEND_TIMING_PKT (1 << 7)
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#define MDDI_STAT_SEND_REV_ENCAP_WITH_FLAGS (1 << 8)
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#define MDDI_STAT_SEND_POWER_DOWN (1 << 9)
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#define MDDI_STAT_DO_HANDSHAKE (1 << 10)
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#define MDDI_STAT_RTD_MEAS_FAIL (1 << 11)
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#define MDDI_STAT_CLIENT_WAKEUP_REQ (1 << 12)
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#define MDDI_STAT_DMA_ABORT (1 << 13)
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#define MDDI_STAT_REV_OVERFLOW_RESET (1 << 14)
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#define MDDI_STAT_FORCE_NEW_REV_PTR (1 << 15)
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#define MDDI_STAT_CRC_ERRORS (1 << 16)
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#define MDDI_REV_RATE_DIV MDDI_REG(0x002C)
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#define MDDI_REV_CRC_ERR MDDI_REG(0x0030)
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#define MDDI_TA1_LEN MDDI_REG(0x0034)
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#define MDDI_TA2_LEN MDDI_REG(0x0038)
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#define MDDI_TEST_BUS MDDI_REG(0x003C)
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#define MDDI_TEST MDDI_REG(0x0040)
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#define MDDI_REV_PKT_CNT MDDI_REG(0x0044)
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#define MDDI_DRIVE_HI MDDI_REG(0x0048)
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#define MDDI_DRIVE_LO MDDI_REG(0x004C)
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#define MDDI_DISP_WAKE MDDI_REG(0x0050)
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#define MDDI_REV_ENCAP_SZ MDDI_REG(0x0054)
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#define MDDI_RTD_VAL MDDI_REG(0x0058)
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#define MDDI_MDP_VID_FMT_DES MDDI_REG(0x005C)
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#define MDDI_MDP_VID_PIX_ATTR MDDI_REG(0x0060)
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#define MDDI_MDP_VID_CLIENTID MDDI_REG(0x0064)
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#define MDDI_PAD_CTL MDDI_REG(0x0068)
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#define MDDI_DRIVER_START_CNT MDDI_REG(0x006C)
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#define MDDI_NEXT_PRI_PTR MDDI_REG(0x0070)
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#define MDDI_NEXT_SEC_PTR MDDI_REG(0x0074)
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#define MDDI_MISR_CTL MDDI_REG(0x0078)
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#define MDDI_MISR_DATA MDDI_REG(0x007C)
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#define MDDI_SF_CNT MDDI_REG(0x0080)
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#define MDDI_MF_CNT MDDI_REG(0x0084)
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#define MDDI_CURR_REV_PTR MDDI_REG(0x0088)
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#define MDDI_CORE_VER MDDI_REG(0x008C)
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#define MDDI_PAD_IO_CTL MDDI_REG(0x00a0)
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#define MDDI_PAD_CAL MDDI_REG(0x00a4)
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#define CMD_POWER_DOWN 0x0100
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#define CMD_POWER_UP 0x0200
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#define CMD_HIBERNATE 0x0300
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#define CMD_RESET 0x0400
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#define CMD_IGNORE 0x0501
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#define CMD_LISTEN 0x0500
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#define CMD_REV_ENC_REQ 0x0600
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#define CMD_RTD_MEASURE 0x0700
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#define CMD_LINK_ACTIVE 0x0900
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#define CMD_PERIODIC_REV_ENC 0x0A00
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#define CMD_FORCE_NEW_REV_PTR 0x0C00
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#define CMD_GET_CLIENT_CAP 0x0601
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#define CMD_GET_CLIENT_STATUS 0x0602
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#if 1
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#define FORMAT_18BPP 0x5666
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#define FORMAT_24BPP 0x5888
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#define FORMAT_16BPP 0x5565
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#else
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#define FORMAT_MONOCHROME (0 << 13)
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#define FORMAT_PALETTE (1 << 13)
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#define FORMAT_RGB (2 << 13)
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#define FORMAT_YCBCR422 (3 << 13)
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#define FORMAT_BAYER (4 << 13)
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#endif
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#define PIXATTR_BOTH_EYES 3
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#define PIXATTR_LEFT_EYE 2
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#define PIXATTR_RIGHT_EYE 1
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#define PIXATTR_ALT_DISPLAY 0
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#define PIXATTR_PROGRESSIVE 0
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#define PIXATTR_INTERLACED (1 << 2)
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#define PIXATTR_ALTERNATE (1 << 3)
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#define PIXATTR_IGNORE_LRTB (1 << 5)
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#define PIXATTR_TO_REFRESH (0 << 6)
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#define PIXATTR_TO_OFFLINE (1 << 6)
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#define PIXATTR_TO_ALL (3 << 6)
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#define PIXATTR_LAST_ROW (1 << 15)
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#define TYPE_VIDEO_STREAM 16
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#define TYPE_CLIENT_CAPS 66
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#define TYPE_REGISTER_ACCESS 146
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#define TYPE_CLIENT_STATUS 70
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typedef struct mddi_video_stream mddi_video_stream;
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typedef struct mddi_register_access mddi_register_access;
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typedef struct mddi_client_caps mddi_client_caps;
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typedef struct mddi_llentry mddi_llentry;
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struct __attribute__ ((packed)) mddi_video_stream {
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unsigned short length; /* length in bytes excluding this field */
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unsigned short type; /* MDDI_TYPE_VIDEO_STREAM */
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unsigned short client_id; /* set to zero */
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unsigned short format;
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unsigned short pixattr;
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unsigned short left;
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unsigned short top;
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unsigned short right;
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unsigned short bottom;
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unsigned short start_x;
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unsigned short start_y;
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unsigned short pixels;
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unsigned short crc;
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unsigned short reserved;
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};
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struct __attribute__ ((packed)) mddi_register_access {
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unsigned short length;
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unsigned short type;
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unsigned short client_id;
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unsigned short rw_info; /* flag below | count of reg_data */
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#define MDDI_WRITE (0 << 14)
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#define MDDI_READ (2 << 14)
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#define MDDI_READ_RESP (3 << 14)
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unsigned reg_addr;
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unsigned short crc; /* 16 bit crc of the above */
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unsigned reg_data[MAX_CLIENT_REG]; /* "list" of 3byte data values */
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};
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struct __attribute__ ((packed)) mddi_llentry {
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unsigned short flags;
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unsigned short header_count;
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unsigned short data_count;
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void *data;
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mddi_llentry *next;
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unsigned short reserved;
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union {
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mddi_video_stream v;
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mddi_register_access r;
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unsigned _[12];
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} u;
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};
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#endif /* __PLATFORM_MSM7K_MDDI_HW_H */
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