222 lines
8.0 KiB
C
222 lines
8.0 KiB
C
/*
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* Copyright (c) 2008, Google Inc.
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* All rights reserved.
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*
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* Copyright (c) 2009-2011, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <debug.h>
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#include <stdlib.h>
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#include <reg.h>
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#include <platform/iomap.h>
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#include <dev/fbcon.h>
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#include <target/display.h>
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#include <dev/lcdc.h>
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#if PLATFORM_MSM7X30
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#define MSM_MDP_BASE1 0xA3F00000
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#define LCDC_BASE 0xC0000
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#elif PLATFORM_MSM8X60
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#define MSM_MDP_BASE1 0x05100000
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#define LCDC_BASE 0xC0000
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#define LCDC_FB_ADDR 0x43E00000
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#else
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#define MSM_MDP_BASE1 0xAA200000
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#define LCDC_BASE 0xE0000
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#endif
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#define LCDC_PIXCLK_IN_PS 26
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#define LCDC_FB_PHYS 0x16600000
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#define LCDC_FB_BPP 16
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#define BIT(x) (1<<(x))
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#define DMA_DSTC0G_8BITS (BIT(1)|BIT(0))
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#define DMA_DSTC1B_8BITS (BIT(3)|BIT(2))
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#define DMA_DSTC2R_8BITS (BIT(5)|BIT(4))
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#define CLR_G 0x0
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#define CLR_B 0x1
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#define CLR_R 0x2
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#define MDP_GET_PACK_PATTERN(a,x,y,z,bit) (((a)<<(bit*3))|((x)<<(bit*2))|((y)<<bit)|(z))
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#define DMA_PACK_ALIGN_LSB 0
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#define DMA_PACK_PATTERN_RGB \
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(MDP_GET_PACK_PATTERN(0,CLR_R,CLR_G,CLR_B,2)<<8)
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#define DMA_DITHER_EN BIT(24)
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#define DMA_OUT_SEL_LCDC BIT(20)
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#define DMA_IBUF_FORMAT_RGB565 BIT(25)
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#define MDP_RGB_565_FORMAT (BIT(14) | (1<<9) | (0<<8) | (0<<6) | (1<<4) | (1<<2) | (2<<0))
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static struct fbcon_config fb_cfg = {
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.height = LCDC_FB_HEIGHT,
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.width = LCDC_FB_WIDTH,
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.stride = LCDC_FB_WIDTH,
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.format = FB_FORMAT_RGB565,
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.bpp = LCDC_FB_BPP,
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.update_start = NULL,
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.update_done = NULL,
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};
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void lcdc_clock_init(unsigned rate);
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struct fbcon_config *lcdc_init_set(struct lcdc_timing_parameters
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*custom_timing_param)
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{
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struct lcdc_timing_parameters timing_param;
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unsigned mdp_rgb_size;
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if (custom_timing_param == DEFAULT_LCD_TIMING) {
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timing_param.lcdc_hsync_pulse_width_dclk =
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LCDC_HSYNC_PULSE_WIDTH_DCLK;
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timing_param.lcdc_hsync_back_porch_dclk =
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LCDC_HSYNC_BACK_PORCH_DCLK;
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timing_param.lcdc_hsync_front_porch_dclk =
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LCDC_HSYNC_FRONT_PORCH_DCLK;
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timing_param.lcdc_hsync_skew_dclk = LCDC_HSYNC_SKEW_DCLK;
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timing_param.lcdc_vsync_pulse_width_lines =
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LCDC_VSYNC_PULSE_WIDTH_LINES;
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timing_param.lcdc_vsync_back_porch_lines =
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LCDC_VSYNC_BACK_PORCH_LINES;
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timing_param.lcdc_vsync_front_porch_lines =
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LCDC_VSYNC_FRONT_PORCH_LINES;
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} else {
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/*use custom timing parameters */
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timing_param.lcdc_hsync_pulse_width_dclk =
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custom_timing_param->lcdc_hsync_pulse_width_dclk;
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timing_param.lcdc_hsync_back_porch_dclk =
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custom_timing_param->lcdc_hsync_back_porch_dclk;
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timing_param.lcdc_hsync_front_porch_dclk =
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custom_timing_param->lcdc_hsync_front_porch_dclk;
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timing_param.lcdc_hsync_skew_dclk =
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custom_timing_param->lcdc_hsync_skew_dclk;
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timing_param.lcdc_vsync_pulse_width_lines =
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custom_timing_param->lcdc_vsync_pulse_width_lines;
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timing_param.lcdc_vsync_back_porch_lines =
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custom_timing_param->lcdc_vsync_back_porch_lines;
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timing_param.lcdc_vsync_front_porch_lines =
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custom_timing_param->lcdc_vsync_front_porch_lines;
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/* only set when using custom timing since initialized with defaults */
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fb_cfg.height = custom_timing_param->lcdc_fb_height;
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fb_cfg.width = custom_timing_param->lcdc_fb_width;
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}
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mdp_rgb_size = (fb_cfg.height << 16) + fb_cfg.width;
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dprintf(INFO, "lcdc_init(): panel is %d x %d\n", fb_cfg.width,
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fb_cfg.height);
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fb_cfg.base = LCDC_FB_ADDR;
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writel((unsigned)fb_cfg.base, MSM_MDP_BASE1 + 0x90008);
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writel((fb_cfg.height << 16) | fb_cfg.width, MSM_MDP_BASE1 + 0x90004);
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writel(fb_cfg.width * fb_cfg.bpp / 8, MSM_MDP_BASE1 + 0x9000c);
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writel(0, MSM_MDP_BASE1 + 0x90010);
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writel(DMA_PACK_ALIGN_LSB | DMA_PACK_PATTERN_RGB | DMA_DITHER_EN |
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DMA_OUT_SEL_LCDC | DMA_IBUF_FORMAT_RGB565 | DMA_DSTC0G_8BITS |
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DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS, MSM_MDP_BASE1 + 0x90000);
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int hsync_period = timing_param.lcdc_hsync_pulse_width_dclk +
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timing_param.lcdc_hsync_back_porch_dclk +
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fb_cfg.width + timing_param.lcdc_hsync_front_porch_dclk;
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int vsync_period = (timing_param.lcdc_vsync_pulse_width_lines +
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timing_param.lcdc_vsync_back_porch_lines +
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fb_cfg.height +
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timing_param.lcdc_vsync_front_porch_lines) *
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hsync_period;
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int hsync_start_x =
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timing_param.lcdc_hsync_pulse_width_dclk +
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timing_param.lcdc_hsync_back_porch_dclk;
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int hsync_end_x =
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hsync_period - timing_param.lcdc_hsync_front_porch_dclk - 1;
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int display_hctl = (hsync_end_x << 16) | hsync_start_x;
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int display_vstart = (timing_param.lcdc_vsync_pulse_width_lines +
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timing_param.lcdc_vsync_back_porch_lines)
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* hsync_period + timing_param.lcdc_hsync_skew_dclk;
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int display_vend = vsync_period -
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(timing_param.lcdc_vsync_front_porch_lines * hsync_period)
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+ timing_param.lcdc_hsync_skew_dclk - 1;
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writel((hsync_period << 16) | timing_param.lcdc_hsync_pulse_width_dclk,
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MSM_MDP_BASE1 + LCDC_BASE + 0x4);
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writel(vsync_period, MSM_MDP_BASE1 + LCDC_BASE + 0x8);
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writel(timing_param.lcdc_vsync_pulse_width_lines * hsync_period,
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MSM_MDP_BASE1 + LCDC_BASE + 0xc);
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writel(display_hctl, MSM_MDP_BASE1 + LCDC_BASE + 0x10);
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writel(display_vstart, MSM_MDP_BASE1 + LCDC_BASE + 0x14);
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writel(display_vend, MSM_MDP_BASE1 + LCDC_BASE + 0x18);
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#if MDP4
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writel(0xf, MSM_MDP_BASE1 + LCDC_BASE + 0x28);
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writel(0xff, MSM_MDP_BASE1 + LCDC_BASE + 0x2c);
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writel(timing_param.lcdc_hsync_skew_dclk,
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MSM_MDP_BASE1 + LCDC_BASE + 0x30);
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writel(0x3, MSM_MDP_BASE1 + LCDC_BASE + 0x38);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x1c);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x20);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x24);
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/* setting for single layer direct out mode for rgb565 source */
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writel(0x100, MSM_MDP_BASE1 + 0x10100);
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writel(mdp_rgb_size, MSM_MDP_BASE1 + 0x40000);
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writel(mdp_rgb_size, MSM_MDP_BASE1 + 0x40008);
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writel((int)fb_cfg.base, MSM_MDP_BASE1 + 0x40010);
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writel(fb_cfg.width * fb_cfg.bpp / 8, MSM_MDP_BASE1 + 0x40040);
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writel(0x00, MSM_MDP_BASE1 + 0x41008);
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writel(MDP_RGB_565_FORMAT, MSM_MDP_BASE1 + 0x40050);
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writel(0x1, MSM_MDP_BASE1 + 0x10004);
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writel(0x1, MSM_MDP_BASE1 + 0x10014);
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/* register flush and enable LCDC */
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writel(0x11, MSM_MDP_BASE1 + 0x18000);
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writel(0x1, MSM_MDP_BASE1 + LCDC_BASE + 0x0);
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#else
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x28);
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writel(0xff, MSM_MDP_BASE1 + LCDC_BASE + 0x2c);
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writel(timing_param.lcdc_hsync_skew_dclk,
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MSM_MDP_BASE1 + LCDC_BASE + 0x30);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x38);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x1c);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x20);
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x24);
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writel(1, MSM_MDP_BASE1 + LCDC_BASE + 0x0);
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#endif
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return &fb_cfg;
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}
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struct fbcon_config *lcdc_init(void)
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{
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return lcdc_init_set(DEFAULT_LCD_TIMING);
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}
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void lcdc_shutdown(void)
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{
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writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x0);
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}
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