141 lines
5.5 KiB
C
141 lines
5.5 KiB
C
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __SPMI_H
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#define __SPMI_H
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#define SPMI_MSM8974_MASTER_ID 0
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#define SPMI_GENI_REG(x) (SPMI_GENI_BASE + (x))
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#define SPMI_GENI_CFG_REG_BASE SPMI_GENI_REG(0x100)
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#define SPMI_GENI_CFG_RAM_BASE SPMI_GENI_REG(0x200)
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#define SPMI_GENI_CFG_REGn(x) (SPMI_GENI_CFG_REG_BASE + 4 * (x))
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#define SPMI_GENI_CFG_RAM_REGn(x) (SPMI_GENI_CFG_RAM_BASE + 4 * (x))
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#define SPMI_GENI_CLK_CTRL_REG SPMI_GENI_REG(0x00)
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#define SPMI_GENI_OUTPUT_CTRL_REG SPMI_GENI_REG(0x10)
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#define SPMI_GENI_FORCE_DEFAULT_REG SPMI_GENI_REG(0x0C)
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#define SPMI_MID_REG SPMI_GENI_REG(0xF00)
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#define SPMI_CFG_REG SPMI_GENI_REG(0xF04)
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#define SPMI_SEC_DISABLE_REG SPMI_GENI_REG(0xF08)
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#define SPMI_GENI_IRQ_ENABLE (SPMI_GENI_BASE + 0x24)
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#define SPMI_GENI_IRQ_CLEAR (SPMI_GENI_BASE + 0x28)
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#define SPMI_GENI_TX_FIFO_BASE (SPMI_GENI_BASE + 0x40)
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#define SPMI_GENI_RX_FIFO_BASE (SPMI_GENI_BASE + 0x80)
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#define SPMI_GENI_TX_FIFOn(x) (SPMI_GENI_TX_FIFO_BASE + 4 * (x))
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#define SPMI_GENI_RX_FIFOn(x) (SPMI_GENI_RX_FIFO_BASE + 4 * (x))
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#define PMIC_ARB_CHNLn_CMD0(x) (SPMI_BASE + 0xF800 + (x) * 0x80)
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#define PMIC_ARB_CMD_OPCODE_SHIFT 27
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#define PMIC_ARB_CMD_PRIORITY_SHIFT 26
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#define PMIC_ARB_CMD_SLAVE_ID_SHIFT 20
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#define PMIC_ARB_CMD_ADDR_SHIFT 12
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#define PMIC_ARB_CMD_ADDR_OFFSET_SHIFT 4
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#define PMIC_ARB_CMD_BYTE_CNT_SHIFT 0
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#define PMIC_ARB_CHNLn_CONFIG(x) (SPMI_BASE + 0xF804 + (x) * 0x80)
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#define PMIC_ARB_CHNLn_STATUS(x) (SPMI_BASE + 0xF808 + (x) * 0x80)
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#define PMIC_ARB_CHNLn_WDATA(x, n) (SPMI_BASE + 0xF810 + \
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(x) * 0x80 + (n) * 4)
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#define PMIC_ARB_CHNLn_RDATA(x,n) (SPMI_BASE + 0xF818 + \
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(x) * 0x80 + (n) * 4)
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/* PIC Registers */
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#define SPMI_PIC_OWNERm_ACC_STATUSn(m, n) (SPMI_PIC_BASE + 32 * (m) + 4 * (n))
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#define SPMI_PIC_ACC_ENABLEn(n) (SPMI_PIC_BASE + 0x200 + 4 * (n))
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#define SPMI_PIC_IRQ_STATUSn(n) (SPMI_PIC_BASE + 0x600 + 0x4 * (n))
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#define SPMI_PIC_IRQ_CLEARn(n) (SPMI_PIC_BASE + 0xA00 + 0x4 * (n))
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/* SPMI Commands */
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#define SPMI_CMD_EXT_REG_WRTIE_LONG 0x00
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#define SPMI_CMD_EXT_REG_READ_LONG 0x01
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#define SPMI_CMD_EXT_REG_READ_LONG_DELAYED 0x02
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#define SPMI_CMD_TRANSFER_BUS_OWNERSHIP 0x03
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/* The commands below are not yet supported */
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#define SPMI_CMD_RESET 0x04
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#define SPMI_CMD_SLEEP 0x05
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#define SPMI_CMD_SHUTDOWN 0x06
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#define SPMI_CMD_WAKEUP 0x07
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#define SPMI_CMD_EXT_REG_WRITE 0x08
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#define SPMI_CMD_EXT_REG_READ 0x09
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#define SPMI_CMD_REG_WRITE 0x0A
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#define SPMI_CMD_REG_READ 0x0B
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#define SPMI_CMD_REG_0_WRITE 0x0C
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#define SPMI_CMD_AUTH 0x0D
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#define SPMI_CMD_MASTER_WRITE 0x0E
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#define SPMI_CMD_MASTER_READ 0x0F
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#define SPMI_CMD_DEV_DESC_BLK_MASTER_READ 0x10
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#define SPMI_CMD_DEV_DESC_BLK_SLAVE_READ 0x11
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enum spmi_geni_cmd_return_value{
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SPMI_CMD_DONE,
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SMPI_CMD_DENIED,
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SPMI_CMD_FAILURE,
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SPMI_ILLEGAL_CMD,
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SPMI_CMD_OVERRUN = 6,
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SPMI_TX_FIFO_RD_ERR,
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SPMI_TX_FIFO_WR_ERR,
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SPMI_RX_FIFO_RD_ERR,
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SPMI_RX_FIFO_WR_ERR
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};
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enum pmic_arb_chnl_return_values{
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PMIC_ARB_CMD_DONE,
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PMIC_ARB_CMD_FAILURE,
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PMIC_ARB_CMD_DENIED,
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PMIC_ARB_CMD_DROPPED,
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};
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struct pmic_arb_cmd{
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uint8_t opcode;
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uint8_t priority;
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uint8_t slave_id;
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uint8_t address;
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uint8_t offset;
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uint8_t byte_cnt;
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};
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struct pmic_arb_param{
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uint8_t *buffer;
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uint8_t size;
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};
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typedef void (*spmi_callback)();
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void spmi_init(uint32_t, uint32_t);
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unsigned int pmic_arb_write_cmd(struct pmic_arb_cmd *cmd,
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struct pmic_arb_param *param);
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unsigned int pmic_arb_read_cmd(struct pmic_arb_cmd *cmd,
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struct pmic_arb_param *param);
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#endif
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