129 lines
4.0 KiB
C
129 lines
4.0 KiB
C
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <debug.h>
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#include <reg.h>
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#include <platform/iomap.h>
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#include <qgic.h>
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#include <qtimer.h>
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#include <platform/clock.h>
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#include <mmu.h>
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#include <arch/arm/mmu.h>
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#include <smem.h>
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#include <board.h>
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#define MB (1024*1024)
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#define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB)
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/* LK memory - cacheable, write through */
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#define LK_MEMORY (MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
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MMU_MEMORY_AP_READ_WRITE)
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/* Peripherals - non-shared device */
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#define IOMAP_MEMORY (MMU_MEMORY_TYPE_DEVICE_SHARED | \
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MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN)
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static mmu_section_t mmu_section_table[] = {
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/* Physical addr, Virtual addr, Size (in MB), Flags */
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{ MEMBASE, MEMBASE, (MEMSIZE / MB), LK_MEMORY},
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{ MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY},
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};
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static struct smem_ram_ptable ram_ptable;
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void platform_early_init(void)
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{
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board_init();
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platform_clock_init();
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qgic_init();
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qtimer_init();
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}
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void platform_init(void)
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{
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dprintf(INFO, "platform_init()\n");
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}
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void platform_uninit(void)
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{
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qtimer_uninit();
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}
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/* Setup memory for this platform */
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void platform_init_mmu_mappings(void)
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{
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uint32_t i;
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uint32_t sections;
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uint32_t table_size = ARRAY_SIZE(mmu_section_table);
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ASSERT(smem_ram_ptable_init(&ram_ptable));
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/* Configure the MMU page entries for SDRAM and IMEM memory read
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from the smem ram table*/
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for(i = 0; i < ram_ptable.len; i++)
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{
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if(ram_ptable.parts[i].type == SYS_MEMORY)
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{
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if((ram_ptable.parts[i].category == SDRAM) ||
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(ram_ptable.parts[i].category == IMEM))
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{
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/* Check to ensure that start address is 1MB aligned */
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ASSERT((ram_ptable.parts[i].start & 0xFFFFF) == 0);
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sections = (ram_ptable.parts[i].size) / MB;
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while(sections--)
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{
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arm_mmu_map_section(ram_ptable.parts[i].start +
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sections * MB,
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ram_ptable.parts[i].start +
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sections * MB,
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(MMU_MEMORY_TYPE_NORMAL_WRITE_THROUGH | \
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MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN));
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}
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}
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}
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}
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/* Configure the MMU page entries for memory read from the
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mmu_section_table */
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for (i = 0; i < table_size; i++)
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{
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sections = mmu_section_table[i].num_of_sections;
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while (sections--)
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{
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arm_mmu_map_section(mmu_section_table[i].paddress +
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sections * MB,
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mmu_section_table[i].vaddress +
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sections * MB,
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mmu_section_table[i].flags);
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}
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}
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}
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