129 lines
2.8 KiB
C
129 lines
2.8 KiB
C
/*
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* Routines common to most mpc85xx-based boards.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/qe.h>
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#include <sysdev/cpm2_pic.h>
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#include "mpc85xx.h"
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static const struct of_device_id mpc85xx_common_ids[] __initconst = {
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{ .type = "soc", },
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{ .compatible = "soc", },
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{ .compatible = "simple-bus", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{ .compatible = "gianfar", },
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{ .compatible = "fsl,qe", },
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{ .compatible = "fsl,cpm2", },
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{ .compatible = "fsl,srio", },
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/* So that the DMA channel nodes can be probed individually: */
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{ .compatible = "fsl,eloplus-dma", },
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/* For the PMC driver */
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{ .compatible = "fsl,mpc8548-guts", },
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/* Probably unnecessary? */
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{ .compatible = "gpio-leds", },
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/* For all PCI controllers */
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{ .compatible = "fsl,mpc8540-pci", },
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{ .compatible = "fsl,mpc8548-pcie", },
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{ .compatible = "fsl,p1022-pcie", },
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{ .compatible = "fsl,p1010-pcie", },
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{ .compatible = "fsl,p1023-pcie", },
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{ .compatible = "fsl,p4080-pcie", },
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{ .compatible = "fsl,qoriq-pcie-v2.4", },
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{ .compatible = "fsl,qoriq-pcie-v2.3", },
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{ .compatible = "fsl,qoriq-pcie-v2.2", },
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{},
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};
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int __init mpc85xx_common_publish_devices(void)
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{
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return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
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}
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#ifdef CONFIG_CPM2
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static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int cascade_irq;
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while ((cascade_irq = cpm2_get_irq()) >= 0)
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generic_handle_irq(cascade_irq);
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chip->irq_eoi(&desc->irq_data);
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}
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void __init mpc85xx_cpm2_pic_init(void)
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{
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struct device_node *np;
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int irq;
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/* Setup CPM2 PIC */
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np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
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if (np == NULL) {
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printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
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return;
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}
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irq = irq_of_parse_and_map(np, 0);
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if (irq == NO_IRQ) {
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of_node_put(np);
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printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
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return;
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}
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cpm2_pic_init(np);
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of_node_put(np);
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irq_set_chained_handler(irq, cpm2_cascade);
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}
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#endif
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#ifdef CONFIG_QUICC_ENGINE
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void __init mpc85xx_qe_init(void)
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{
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,qe");
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if (!np) {
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np = of_find_node_by_name(NULL, "qe");
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if (!np) {
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pr_err("%s: Could not find Quicc Engine node\n",
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__func__);
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return;
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}
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}
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if (!of_device_is_available(np)) {
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of_node_put(np);
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return;
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}
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qe_reset();
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of_node_put(np);
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}
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void __init mpc85xx_qe_par_io_init(void)
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{
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struct device_node *np;
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np = of_find_node_by_name(NULL, "par_io");
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if (np) {
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struct device_node *ucc;
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par_io_init(np);
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of_node_put(np);
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for_each_node_by_name(ucc, "ucc")
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par_io_of_config(ucc);
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}
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}
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#endif
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