56 lines
1.6 KiB
Plaintext
56 lines
1.6 KiB
Plaintext
/*
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* at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2
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* Ethernet interfaces.
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*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* Licensed under GPLv2.
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*/
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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ahb {
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apb {
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pinctrl@fffff400 {
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macb1 {
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pinctrl_macb1_rmii: macb1_rmii-0 {
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atmel,pins =
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<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
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AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
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AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
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AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
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AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
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AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
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AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
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AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
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AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
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AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
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};
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};
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};
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pmc: pmc@fffffc00 {
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periphck {
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macb1_clk: macb1_clk {
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#clock-cells = <0>;
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reg = <27>;
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};
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};
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};
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macb1: ethernet@f8030000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf8030000 0x100>;
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interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb1_rmii>;
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clocks = <&macb1_clk>, <&macb1_clk>;
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clock-names = "hclk", "pclk";
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status = "disabled";
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};
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};
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};
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};
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