25 lines
943 B
Plaintext
25 lines
943 B
Plaintext
Rockchip Successive Approximation Register (SAR) A/D Converter bindings
|
|
|
|
Required properties:
|
|
- compatible: Should be "rockchip,saradc"
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
- interrupts: The interrupt number to the cpu. The interrupt specifier format
|
|
depends on the interrupt controller.
|
|
- clocks: Must contain an entry for each entry in clock-names.
|
|
- clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
|
|
the peripheral clock.
|
|
- vref-supply: The regulator supply ADC reference voltage.
|
|
- #io-channel-cells: Should be 1, see ../iio-bindings.txt
|
|
|
|
Example:
|
|
saradc: saradc@2006c000 {
|
|
compatible = "rockchip,saradc";
|
|
reg = <0x2006c000 0x100>;
|
|
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
|
clock-names = "saradc", "apb_pclk";
|
|
#io-channel-cells = <1>;
|
|
vref-supply = <&vcc18>;
|
|
};
|