128 lines
5.1 KiB
Plaintext
128 lines
5.1 KiB
Plaintext
Device State Configuration Registers
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------------------------------------
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TI C6X SoCs contain a region of miscellaneous registers which provide various
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function for SoC control or status. Details vary considerably among from SoC
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to SoC with no two being alike.
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In general, the Device State Configuration Registers (DSCR) will provide one or
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more configuration registers often protected by a lock register where one or
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more key values must be written to a lock register in order to unlock the
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configuration register for writes. These configuration register may be used to
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enable (and disable in some cases) SoC pin drivers, select peripheral clock
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sources (internal or pin), etc. In some cases, a configuration register is
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write once or the individual bits are write once. In addition to device config,
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the DSCR block may provide registers which which are used to reset peripherals,
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provide device ID information, provide ethernet MAC addresses, as well as other
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miscellaneous functions.
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For device state control (enable/disable), each device control is assigned an
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id which is used by individual device drivers to control the state as needed.
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Required properties:
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- compatible: must be "ti,c64x+dscr"
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- reg: register area base and size
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Optional properties:
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NOTE: These are optional in that not all SoCs will have all properties. For
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SoCs which do support a given property, leaving the property out of the
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device tree will result in reduced functionality or possibly driver
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failure.
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- ti,dscr-devstat
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offset of the devstat register
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- ti,dscr-silicon-rev
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offset, start bit, and bitsize of silicon revision field
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- ti,dscr-rmii-resets
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offset and bitmask of RMII reset field. May have multiple tuples if more
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than one ethernet port is available.
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- ti,dscr-locked-regs
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possibly multiple tuples describing registers which are write protected by
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a lock register. Each tuple consists of the register offset, lock register
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offsset, and the key value used to unlock the register.
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- ti,dscr-kick-regs
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offset and key values of two "kick" registers used to write protect other
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registers in DSCR. On SoCs using kick registers, the first key must be
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written to the first kick register and the second key must be written to
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the second register before other registers in the area are write-enabled.
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- ti,dscr-mac-fuse-regs
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MAC addresses are contained in two registers. Each element of a MAC address
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is contained in a single byte. This property has two tuples. Each tuple has
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a register offset and four cells representing bytes in the register from
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most significant to least. The value of these four cells is the MAC byte
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index (1-6) of the byte within the register. A value of 0 means the byte
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is unused in the MAC address.
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- ti,dscr-devstate-ctl-regs
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This property describes the bitfields used to control the state of devices.
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Each tuple describes a range of identical bitfields used to control one or
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more devices (one bitfield per device). The layout of each tuple is:
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start_id num_ids reg enable disable start_bit nbits
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Where:
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start_id is device id for the first device control in the range
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num_ids is the number of device controls in the range
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reg is the offset of the register holding the control bits
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enable is the value to enable a device
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disable is the value to disable a device (0xffffffff if cannot disable)
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start_bit is the bit number of the first bit in the range
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nbits is the number of bits per device control
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- ti,dscr-devstate-stat-regs
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This property describes the bitfields used to provide device state status
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for device states controlled by the DSCR. Each tuple describes a range of
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identical bitfields used to provide status for one or more devices (one
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bitfield per device). The layout of each tuple is:
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start_id num_ids reg enable disable start_bit nbits
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Where:
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start_id is device id for the first device status in the range
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num_ids is the number of devices covered by the range
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reg is the offset of the register holding the status bits
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enable is the value indicating device is enabled
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disable is the value indicating device is disabled
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start_bit is the bit number of the first bit in the range
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nbits is the number of bits per device status
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- ti,dscr-privperm
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Offset and default value for register used to set access privilege for
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some SoC devices.
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Example:
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device-state-config-regs@2a80000 {
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compatible = "ti,c64x+dscr";
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reg = <0x02a80000 0x41000>;
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ti,dscr-devstat = <0>;
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ti,dscr-silicon-rev = <8 28 0xf>;
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ti,dscr-rmii-resets = <0x40020 0x00040000>;
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ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
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ti,dscr-devstate-ctl-regs =
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<0 12 0x40008 1 0 0 2
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12 1 0x40008 3 0 30 2
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13 2 0x4002c 1 0xffffffff 0 1>;
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ti,dscr-devstate-stat-regs =
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<0 10 0x40014 1 0 0 3
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10 2 0x40018 1 0 0 3>;
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ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
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0x704 5 6 0 0>;
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ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
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ti,dscr-kick-regs = <0x38 0x83E70B13
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0x3c 0x95A4F1E0>;
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};
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