172 lines
3.4 KiB
C
172 lines
3.4 KiB
C
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef MDSS_H
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#define MDSS_H
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#include <linux/msm_ion.h>
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#include <linux/earlysuspend.h>
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#include <linux/msm_mdp.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/workqueue.h>
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#include <mach/iommu_domains.h>
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#define MDSS_REG_WRITE(addr, val) writel_relaxed(val, mdss_res->mdp_base + addr)
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#define MDSS_REG_READ(addr) readl_relaxed(mdss_res->mdp_base + addr)
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enum mdss_mdp_clk_type {
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MDSS_CLK_AHB,
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MDSS_CLK_AXI,
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MDSS_CLK_MDP_SRC,
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MDSS_CLK_MDP_CORE,
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MDSS_CLK_MDP_LUT,
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MDSS_CLK_MDP_VSYNC,
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MDSS_MAX_CLK
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};
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enum mdss_iommu_domain_type {
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MDSS_IOMMU_DOMAIN_SECURE,
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MDSS_IOMMU_DOMAIN_UNSECURE,
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MDSS_IOMMU_MAX_DOMAIN
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};
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struct mdss_iommu_map_type {
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char *client_name;
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char *ctx_name;
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struct device *ctx;
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struct msm_iova_partition partitions[1];
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int npartitions;
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int domain_idx;
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};
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struct mdss_hw_settings {
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char __iomem *reg;
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u32 val;
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};
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struct mdss_data_type {
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u32 mdp_rev;
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struct clk *mdp_clk[MDSS_MAX_CLK];
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struct regulator *fs;
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u32 max_mdp_clk_rate;
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struct platform_device *pdev;
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char __iomem *mdp_base;
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size_t mdp_reg_size;
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char __iomem *vbif_base;
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u32 irq;
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u32 irq_mask;
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u32 irq_ena;
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u32 irq_buzy;
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u32 has_bwc;
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u32 has_decimation;
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u32 mdp_irq_mask;
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u32 mdp_hist_irq_mask;
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int suspend_fs_ena;
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u8 clk_ena;
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u8 fs_ena;
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u8 vsync_ena;
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unsigned long min_mdp_clk;
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u32 res_init;
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u32 bus_hdl;
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u32 smp_mb_cnt;
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u32 smp_mb_size;
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u32 rot_block_size;
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struct mdss_hw_settings *hw_settings;
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struct mdss_mdp_pipe *vig_pipes;
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struct mdss_mdp_pipe *rgb_pipes;
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struct mdss_mdp_pipe *dma_pipes;
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u32 nvig_pipes;
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u32 nrgb_pipes;
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u32 ndma_pipes;
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struct mdss_mdp_mixer *mixer_intf;
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struct mdss_mdp_mixer *mixer_wb;
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u32 nmixers_intf;
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u32 nmixers_wb;
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struct mdss_mdp_ctl *ctl_off;
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u32 nctl;
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struct mdss_mdp_dp_intf *dp_off;
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u32 ndp;
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void *video_intf;
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u32 nintf;
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struct mdss_ad_info *ad_cfgs;
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u32 nad_cfgs;
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struct workqueue_struct *ad_calc_wq;
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struct ion_client *iclient;
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int iommu_attached;
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struct mdss_iommu_map_type *iommu_map;
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struct early_suspend early_suspend;
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void *debug_data;
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int current_bus_idx;
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};
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extern struct mdss_data_type *mdss_res;
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enum mdss_hw_index {
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MDSS_HW_MDP,
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MDSS_HW_DSI0,
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MDSS_HW_DSI1,
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MDSS_HW_HDMI,
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MDSS_HW_EDP,
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MDSS_MAX_HW_BLK
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};
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struct mdss_hw {
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u32 hw_ndx;
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void *ptr;
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irqreturn_t (*irq_handler)(int irq, void *ptr);
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};
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int mdss_register_irq(struct mdss_hw *hw);
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void mdss_enable_irq(struct mdss_hw *hw);
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void mdss_disable_irq(struct mdss_hw *hw);
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void mdss_disable_irq_nosync(struct mdss_hw *hw);
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static inline struct ion_client *mdss_get_ionclient(void)
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{
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if (!mdss_res)
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return NULL;
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return mdss_res->iclient;
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}
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static inline int is_mdss_iommu_attached(void)
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{
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if (!mdss_res)
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return false;
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return mdss_res->iommu_attached;
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}
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static inline int mdss_get_iommu_domain(u32 type)
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{
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if (type >= MDSS_IOMMU_MAX_DOMAIN)
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return -EINVAL;
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if (!mdss_res)
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return -ENODEV;
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return mdss_res->iommu_map[type].domain_idx;
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}
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#endif /* MDSS_H */
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