603 lines
15 KiB
C
603 lines
15 KiB
C
/*
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* Copyright (C) 1998-2000 Michel Aubry, Maintainer
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* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
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* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
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*
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* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
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* May be copied or modified under the terms of the GNU General Public License
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* Copyright (C) 2002 Alan Cox
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* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
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* Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
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* Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
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*
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* (U)DMA capable version of ali 1533/1543(C), 1535(D)
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*
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**********************************************************************
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* 9/7/99 --Parts from the above author are included and need to be
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* converted into standard interface, once I finish the thought.
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*
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* Recent changes
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* Don't use LBA48 mode on ALi <= 0xC4
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* Don't poke 0x79 with a non ALi northbridge
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* Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
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* Allow UDMA6 on revisions > 0xC4
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*
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* Documentation
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* Chipset documentation available under NDA only
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <linux/dmi.h>
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#include <asm/io.h>
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#define DRV_NAME "alim15x3"
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/*
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* ALi devices are not plug in. Otherwise these static values would
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* need to go. They ought to go away anyway
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*/
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static u8 m5229_revision;
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static u8 chip_is_1543c_e;
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static struct pci_dev *isa_dev;
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static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on)
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{
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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int pio_fifo = 0x54 + hwif->channel;
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u8 fifo;
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int shift = 4 * (drive->dn & 1);
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pci_read_config_byte(pdev, pio_fifo, &fifo);
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fifo &= ~(0x0F << shift);
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fifo |= (on << shift);
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pci_write_config_byte(pdev, pio_fifo, fifo);
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}
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static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
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struct ide_timing *t, u8 ultra)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int port = hwif->channel ? 0x5c : 0x58;
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int udmat = 0x56 + hwif->channel;
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u8 unit = drive->dn & 1, udma;
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int shift = 4 * unit;
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/* Set up the UDMA */
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pci_read_config_byte(dev, udmat, &udma);
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udma &= ~(0x0F << shift);
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udma |= ultra << shift;
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pci_write_config_byte(dev, udmat, udma);
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if (t == NULL)
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return;
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t->setup = clamp_val(t->setup, 1, 8) & 7;
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t->act8b = clamp_val(t->act8b, 1, 8) & 7;
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t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
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t->active = clamp_val(t->active, 1, 8) & 7;
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t->recover = clamp_val(t->recover, 1, 16) & 15;
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pci_write_config_byte(dev, port, t->setup);
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pci_write_config_byte(dev, port + 1, (t->act8b << 4) | t->rec8b);
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pci_write_config_byte(dev, port + unit + 2,
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(t->active << 4) | t->recover);
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}
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/**
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* ali_set_pio_mode - set host controller for PIO mode
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* @hwif: port
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* @drive: drive
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*
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* Program the controller for the given PIO mode.
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*/
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static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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ide_drive_t *pair = ide_get_pair_dev(drive);
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int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
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unsigned long T = 1000000 / bus_speed; /* PCI clock based */
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struct ide_timing t;
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ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
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if (pair) {
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struct ide_timing p;
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ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
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ide_timing_merge(&p, &t, &t,
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IDE_TIMING_SETUP | IDE_TIMING_8BIT);
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if (pair->dma_mode) {
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ide_timing_compute(pair, pair->dma_mode, &p, T, 1);
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ide_timing_merge(&p, &t, &t,
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IDE_TIMING_SETUP | IDE_TIMING_8BIT);
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}
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}
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/*
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* PIO mode => ATA FIFO on, ATAPI FIFO off
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*/
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ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
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ali_program_timings(hwif, drive, &t, 0);
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}
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/**
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* ali_udma_filter - compute UDMA mask
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* @drive: IDE device
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*
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* Return available UDMA modes.
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*
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* The actual rules for the ALi are:
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* No UDMA on revisions <= 0x20
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* Disk only for revisions < 0xC2
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* Not WDC drives on M1543C-E (?)
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*/
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static u8 ali_udma_filter(ide_drive_t *drive)
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{
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if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
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if (drive->media != ide_disk)
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return 0;
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if (chip_is_1543c_e &&
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strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
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return 0;
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}
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return drive->hwif->ultra_mask;
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}
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/**
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* ali_set_dma_mode - set host controller for DMA mode
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* @hwif: port
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* @drive: drive
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*
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* Configure the hardware for the desired IDE transfer mode.
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*/
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static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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ide_drive_t *pair = ide_get_pair_dev(drive);
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int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
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unsigned long T = 1000000 / bus_speed; /* PCI clock based */
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const u8 speed = drive->dma_mode;
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u8 tmpbyte = 0x00;
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struct ide_timing t;
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if (speed < XFER_UDMA_0) {
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ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
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if (pair) {
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struct ide_timing p;
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ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
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ide_timing_merge(&p, &t, &t,
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IDE_TIMING_SETUP | IDE_TIMING_8BIT);
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if (pair->dma_mode) {
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ide_timing_compute(pair, pair->dma_mode,
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&p, T, 1);
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ide_timing_merge(&p, &t, &t,
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IDE_TIMING_SETUP | IDE_TIMING_8BIT);
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}
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}
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ali_program_timings(hwif, drive, &t, 0);
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} else {
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ali_program_timings(hwif, drive, NULL,
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udma_timing[speed - XFER_UDMA_0]);
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if (speed >= XFER_UDMA_3) {
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pci_read_config_byte(dev, 0x4b, &tmpbyte);
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tmpbyte |= 1;
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pci_write_config_byte(dev, 0x4b, tmpbyte);
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}
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}
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}
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/**
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* ali_dma_check - DMA check
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* @drive: target device
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* @cmd: command
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*
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* Returns 1 if the DMA cannot be performed, zero on success.
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*/
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static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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if (m5229_revision < 0xC2 && drive->media != ide_disk) {
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if (cmd->tf_flags & IDE_TFLAG_WRITE)
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return 1; /* try PIO instead of DMA */
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}
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return 0;
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}
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/**
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* init_chipset_ali15x3 - Initialise an ALi IDE controller
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* @dev: PCI device
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*
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* This function initializes the ALI IDE controller and where
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* appropriate also sets up the 1533 southbridge.
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*/
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static int init_chipset_ali15x3(struct pci_dev *dev)
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{
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unsigned long flags;
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u8 tmpbyte;
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struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
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m5229_revision = dev->revision;
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isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
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local_irq_save(flags);
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if (m5229_revision < 0xC2) {
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/*
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* revision 0x20 (1543-E, 1543-F)
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* revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
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* clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
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*/
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pci_read_config_byte(dev, 0x4b, &tmpbyte);
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/*
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* clear bit 7
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*/
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pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
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/*
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* check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
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*/
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if (m5229_revision >= 0x20 && isa_dev) {
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pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
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chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
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}
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goto out;
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}
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/*
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* 1543C-B?, 1535, 1535D, 1553
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* Note 1: not all "motherboard" support this detection
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* Note 2: if no udma 66 device, the detection may "error".
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* but in this case, we will not set the device to
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* ultra 66, the detection result is not important
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*/
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/*
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* enable "Cable Detection", m5229, 0x4b, bit3
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*/
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pci_read_config_byte(dev, 0x4b, &tmpbyte);
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pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
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/*
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* We should only tune the 1533 enable if we are using an ALi
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* North bridge. We might have no north found on some zany
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* box without a device at 0:0.0. The ALi bridge will be at
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* 0:0.0 so if we didn't find one we know what is cooking.
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*/
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if (north && north->vendor != PCI_VENDOR_ID_AL)
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goto out;
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if (m5229_revision < 0xC5 && isa_dev)
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{
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/*
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* set south-bridge's enable bit, m1533, 0x79
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*/
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pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
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if (m5229_revision == 0xC2) {
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/*
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* 1543C-B0 (m1533, 0x79, bit 2)
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*/
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pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
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} else if (m5229_revision >= 0xC3) {
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/*
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* 1553/1535 (m1533, 0x79, bit 1)
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*/
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pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
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}
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}
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out:
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/*
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* CD_ROM DMA on (m5229, 0x53, bit0)
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* Enable this bit even if we want to use PIO.
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* PIO FIFO off (m5229, 0x53, bit1)
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* The hardware will use 0x54h and 0x55h to control PIO FIFO.
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* (Not on later devices it seems)
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*
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* 0x53 changes meaning on later revs - we must no touch
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* bit 1 on them. Need to check if 0x20 is the right break.
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*/
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if (m5229_revision >= 0x20) {
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pci_read_config_byte(dev, 0x53, &tmpbyte);
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if (m5229_revision <= 0x20)
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tmpbyte = (tmpbyte & (~0x02)) | 0x01;
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else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
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tmpbyte |= 0x03;
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else
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tmpbyte |= 0x01;
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pci_write_config_byte(dev, 0x53, tmpbyte);
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}
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pci_dev_put(north);
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pci_dev_put(isa_dev);
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local_irq_restore(flags);
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return 0;
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}
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/*
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* Cable special cases
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*/
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static const struct dmi_system_id cable_dmi_table[] = {
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{
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.ident = "HP Pavilion N5430",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
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},
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},
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{
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.ident = "Toshiba Satellite S1800-814",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
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DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
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},
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},
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{ }
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};
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static int ali_cable_override(struct pci_dev *pdev)
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{
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/* Fujitsu P2000 */
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if (pdev->subsystem_vendor == 0x10CF &&
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pdev->subsystem_device == 0x10AF)
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return 1;
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/* Mitac 8317 (Winbook-A) and relatives */
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if (pdev->subsystem_vendor == 0x1071 &&
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pdev->subsystem_device == 0x8317)
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return 1;
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/* Systems by DMI */
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if (dmi_check_system(cable_dmi_table))
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return 1;
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return 0;
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}
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/**
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* ali_cable_detect - cable detection
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* @hwif: IDE interface
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*
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* This checks if the controller and the cable are capable
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* of UDMA66 transfers. It doesn't check the drives.
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*/
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static u8 ali_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u8 cbl = ATA_CBL_PATA40, tmpbyte;
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if (m5229_revision >= 0xC2) {
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/*
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* m5229 80-pin cable detection (from Host View)
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*
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* 0x4a bit0 is 0 => primary channel has 80-pin
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* 0x4a bit1 is 0 => secondary channel has 80-pin
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*
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* Certain laptops use short but suitable cables
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* and don't implement the detect logic.
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*/
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if (ali_cable_override(dev))
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cbl = ATA_CBL_PATA40_SHORT;
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else {
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pci_read_config_byte(dev, 0x4a, &tmpbyte);
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if ((tmpbyte & (1 << hwif->channel)) == 0)
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cbl = ATA_CBL_PATA80;
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}
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}
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return cbl;
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}
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#ifndef CONFIG_SPARC64
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/**
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* init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
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* @hwif: interface to configure
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*
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* Obtain the IRQ tables for an ALi based IDE solution on the PC
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* class platforms. This part of the code isn't applicable to the
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* Sparc systems.
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*/
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static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
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{
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u8 ideic, inmir;
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s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
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1, 11, 0, 12, 0, 14, 0, 15 };
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int irq = -1;
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if (isa_dev) {
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/*
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* read IDE interface control
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*/
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pci_read_config_byte(isa_dev, 0x58, &ideic);
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/* bit0, bit1 */
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ideic = ideic & 0x03;
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/* get IRQ for IDE Controller */
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if ((hwif->channel && ideic == 0x03) ||
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(!hwif->channel && !ideic)) {
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/*
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* get SIRQ1 routing table
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*/
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pci_read_config_byte(isa_dev, 0x44, &inmir);
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inmir = inmir & 0x0f;
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irq = irq_routing_table[inmir];
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} else if (hwif->channel && !(ideic & 0x01)) {
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/*
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* get SIRQ2 routing table
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*/
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pci_read_config_byte(isa_dev, 0x75, &inmir);
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inmir = inmir & 0x0f;
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irq = irq_routing_table[inmir];
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}
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if(irq >= 0)
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hwif->irq = irq;
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}
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}
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#else
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#define init_hwif_ali15x3 NULL
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#endif /* CONFIG_SPARC64 */
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/**
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* init_dma_ali15x3 - set up DMA on ALi15x3
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* @hwif: IDE interface
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* @d: IDE port info
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*
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* Set up the DMA functionality on the ALi 15x3.
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*/
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static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
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const struct ide_port_info *d)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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unsigned long base = ide_pci_dma_base(hwif, d);
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if (base == 0)
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return -1;
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hwif->dma_base = base;
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if (ide_pci_check_simplex(hwif, d) < 0)
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return -1;
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if (ide_pci_set_master(dev, d->name) < 0)
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return -1;
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if (!hwif->channel)
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outb(inb(base + 2) & 0x60, base + 2);
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printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
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hwif->name, base, base + 7);
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if (ide_allocate_dma_engine(hwif))
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return -1;
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return 0;
|
|
}
|
|
|
|
static const struct ide_port_ops ali_port_ops = {
|
|
.set_pio_mode = ali_set_pio_mode,
|
|
.set_dma_mode = ali_set_dma_mode,
|
|
.udma_filter = ali_udma_filter,
|
|
.cable_detect = ali_cable_detect,
|
|
};
|
|
|
|
static const struct ide_dma_ops ali_dma_ops = {
|
|
.dma_host_set = ide_dma_host_set,
|
|
.dma_setup = ide_dma_setup,
|
|
.dma_start = ide_dma_start,
|
|
.dma_end = ide_dma_end,
|
|
.dma_test_irq = ide_dma_test_irq,
|
|
.dma_lost_irq = ide_dma_lost_irq,
|
|
.dma_check = ali_dma_check,
|
|
.dma_timer_expiry = ide_dma_sff_timer_expiry,
|
|
.dma_sff_read_status = ide_dma_sff_read_status,
|
|
};
|
|
|
|
static const struct ide_port_info ali15x3_chipset __devinitdata = {
|
|
.name = DRV_NAME,
|
|
.init_chipset = init_chipset_ali15x3,
|
|
.init_hwif = init_hwif_ali15x3,
|
|
.init_dma = init_dma_ali15x3,
|
|
.port_ops = &ali_port_ops,
|
|
.dma_ops = &sff_dma_ops,
|
|
.pio_mask = ATA_PIO5,
|
|
.swdma_mask = ATA_SWDMA2,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
};
|
|
|
|
/**
|
|
* alim15x3_init_one - set up an ALi15x3 IDE controller
|
|
* @dev: PCI device to set up
|
|
*
|
|
* Perform the actual set up for an ALi15x3 that has been found by the
|
|
* hot plug layer.
|
|
*/
|
|
|
|
static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
|
{
|
|
struct ide_port_info d = ali15x3_chipset;
|
|
u8 rev = dev->revision, idx = id->driver_data;
|
|
|
|
/* don't use LBA48 DMA on ALi devices before rev 0xC5 */
|
|
if (rev <= 0xC4)
|
|
d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
|
|
|
|
if (rev >= 0x20) {
|
|
if (rev == 0x20)
|
|
d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
|
|
|
|
if (rev < 0xC2)
|
|
d.udma_mask = ATA_UDMA2;
|
|
else if (rev == 0xC2 || rev == 0xC3)
|
|
d.udma_mask = ATA_UDMA4;
|
|
else if (rev == 0xC4)
|
|
d.udma_mask = ATA_UDMA5;
|
|
else
|
|
d.udma_mask = ATA_UDMA6;
|
|
|
|
d.dma_ops = &ali_dma_ops;
|
|
} else {
|
|
d.host_flags |= IDE_HFLAG_NO_DMA;
|
|
|
|
d.mwdma_mask = d.swdma_mask = 0;
|
|
}
|
|
|
|
if (idx == 0)
|
|
d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
|
|
|
|
return ide_pci_init_one(dev, &d, NULL);
|
|
}
|
|
|
|
|
|
static const struct pci_device_id alim15x3_pci_tbl[] = {
|
|
{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
|
|
{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
|
|
{ 0, },
|
|
};
|
|
MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
|
|
|
|
static struct pci_driver alim15x3_pci_driver = {
|
|
.name = "ALI15x3_IDE",
|
|
.id_table = alim15x3_pci_tbl,
|
|
.probe = alim15x3_init_one,
|
|
.remove = ide_pci_remove,
|
|
.suspend = ide_pci_suspend,
|
|
.resume = ide_pci_resume,
|
|
};
|
|
|
|
static int __init ali15x3_ide_init(void)
|
|
{
|
|
return ide_pci_register_driver(&alim15x3_pci_driver);
|
|
}
|
|
|
|
static void __exit ali15x3_ide_exit(void)
|
|
{
|
|
pci_unregister_driver(&alim15x3_pci_driver);
|
|
}
|
|
|
|
module_init(ali15x3_ide_init);
|
|
module_exit(ali15x3_ide_exit);
|
|
|
|
MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz");
|
|
MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
|
|
MODULE_LICENSE("GPL");
|