1746 lines
45 KiB
Plaintext
1746 lines
45 KiB
Plaintext
/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Qualcomm MSM 8974";
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compatible = "qcom,msm8974";
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interrupt-parent = <&intc>;
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aliases {
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spi0 = &spi_0;
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spi7 = &spi_7;
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sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
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sdhc2 = &sdhc_2; /* SDC2 SD card slot */
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sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
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sdhc4 = &sdhc_4; /* SDC4 SDIO slot */
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/* smdtty devices */
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smd1 = &smdtty_apps_fm;
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smd2 = &smdtty_apps_riva_bt_acl;
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smd3 = &smdtty_apps_riva_bt_cmd;
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smd4 = &smdtty_mbalbridge;
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smd5 = &smdtty_apps_riva_ant_cmd;
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smd6 = &smdtty_apps_riva_ant_data;
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smd7 = &smdtty_data1;
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smd11 = &smdtty_data11;
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smd21 = &smdtty_data21;
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smd27 = &smdtty_gps_nmea;
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smd36 = &smdtty_loopback;
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};
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cpus {
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#size-cells = <0>;
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#address-cells = <1>;
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "qcom,krait";
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reg = <0x0>;
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};
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CPU1: cpu@1 {
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device_type = "cpu";
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compatible = "qcom,krait";
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reg = <0x1>;
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};
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CPU2: cpu@2 {
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device_type = "cpu";
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compatible = "qcom,krait";
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reg = <0x2>;
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};
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CPU3: cpu@3 {
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device_type = "cpu";
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compatible = "qcom,krait";
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reg = <0x3>;
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};
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};
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memory {
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secure_mem: secure_region {
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linux,contiguous-region;
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reg = <0 0xFC00000>;
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label = "secure_mem";
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};
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adsp_mem: adsp_region {
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linux,contiguous-region;
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reg = <0 0x2F00000>;
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label = "adsp_mem";
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};
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qsecom_mem: qsecom_region {
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linux,contiguous-region;
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reg = <0 0x1100000>;
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label = "qseecom_mem";
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};
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};
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soc: soc { };
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};
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/include/ "msm8974-camera.dtsi"
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/include/ "msm8974-coresight.dtsi"
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/include/ "msm-gdsc.dtsi"
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/include/ "msm8974-ion.dtsi"
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/include/ "msm8974-gpu.dtsi"
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/include/ "msm8974-mdss.dtsi"
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/include/ "msm8974-smp2p.dtsi"
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/include/ "msm8974-bus.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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intc: interrupt-controller@F9000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0xF9000000 0x1000>,
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<0xF9002000 0x1000>;
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};
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msmgpio: gpio@fd510000 {
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compatible = "qcom,msm-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0xfd510000 0x4000>;
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ngpio = <146>;
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interrupts = <0 208 0>;
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qcom,direct-connect-irqs = <8>;
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};
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wcd9xxx_intc: wcd9xxx-irq {
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compatible = "qcom,wcd9xxx-irq";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&msmgpio>;
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interrupts = <72 0>;
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interrupt-names = "cdc-int";
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 2 0 1 3 0>;
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clock-frequency = <19200000>;
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};
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timer@f9020000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0xf9020000 0x1000>;
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clock-frequency = <19200000>;
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frame@f9021000 {
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frame-number = <0>;
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interrupts = <0 8 0x4>,
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<0 7 0x4>;
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reg = <0xf9021000 0x1000>,
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<0xf9022000 0x1000>;
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};
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frame@f9023000 {
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frame-number = <1>;
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interrupts = <0 9 0x4>;
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reg = <0xf9023000 0x1000>;
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status = "disabled";
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};
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frame@f9024000 {
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frame-number = <2>;
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interrupts = <0 10 0x4>;
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reg = <0xf9024000 0x1000>;
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status = "disabled";
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};
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frame@f9025000 {
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frame-number = <3>;
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interrupts = <0 11 0x4>;
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reg = <0xf9025000 0x1000>;
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status = "disabled";
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};
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frame@f9026000 {
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frame-number = <4>;
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interrupts = <0 12 0x4>;
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reg = <0xf9026000 0x1000>;
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status = "disabled";
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};
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frame@f9027000 {
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frame-number = <5>;
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interrupts = <0 13 0x4>;
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reg = <0xf9027000 0x1000>;
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status = "disabled";
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};
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frame@f9028000 {
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frame-number = <6>;
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interrupts = <0 14 0x4>;
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reg = <0xf9028000 0x1000>;
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status = "disabled";
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};
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};
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qcom,mpm2-sleep-counter@fc4a3000 {
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compatible = "qcom,mpm2-sleep-counter";
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reg = <0xfc4a3000 0x1000>;
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clock-frequency = <32768>;
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};
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msm_vidc: qcom,vidc@fdc00000 {
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compatible = "qcom,msm-vidc";
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reg = <0xfdc00000 0xff000>;
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interrupts = <0 44 0>;
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qcom,hfi = "venus";
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qcom,has-ocmem;
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qcom,max-hw-load = <1224450>; /* 4k @ 30 + 1080p @ 30*/
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};
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qcom,vidc {
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compatible = "qcom,msm-vidc";
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qcom,hfi = "q6";
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qcom,max-hw-load = <108000>; /* 720p @ 30 */
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};
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qcom,wfd {
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compatible = "qcom,msm-wfd";
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};
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serial@f991f000 {
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compatible = "qcom,msm-lsuart-v14";
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reg = <0xf991f000 0x1000>;
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interrupts = <0 109 0>;
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status = "disabled";
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};
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serial@f995e000 {
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compatible = "qcom,msm-lsuart-v14";
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reg = <0xf995e000 0x1000>;
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interrupts = <0 114 0>;
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status = "disabled";
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};
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serial@f991e000 {
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compatible = "qcom,msm-lsuart-v14";
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reg = <0xf991e000 0x1000>;
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interrupts = <0 108 0>;
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status = "disabled";
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qcom,msm-bus,name = "serial_uart2";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<86 512 0 0>,
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<86 512 500 800>;
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};
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usb_otg: usb@f9a55000 {
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compatible = "qcom,hsusb-otg";
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status = "disabled";
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reg = <0xf9a55000 0x400>;
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interrupts = <0 134 0 0 140 0>;
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interrupt-names = "core_irq", "async_irq";
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HSUSB_VDDCX-supply = <&pm8841_s2_corner>;
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HSUSB_1p8-supply = <&pm8941_l6>;
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HSUSB_3p3-supply = <&pm8941_l24>;
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qcom,vdd-voltage-level = <1 5 7>;
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qcom,hsusb-otg-phy-type = <2>;
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qcom,hsusb-otg-phy-init-seq = <0x63 0x81 0xffffffff>;
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qcom,hsusb-otg-mode = <1>;
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qcom,hsusb-otg-otg-control = <1>;
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qcom,hsusb-otg-disable-reset;
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qcom,msm-bus,name = "usb2";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<87 512 0 0>,
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<87 512 60000 960000>;
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};
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sdcc1: qcom,sdcc@f9824000 {
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cell-index = <1>; /* SDC1 eMMC slot */
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compatible = "qcom,msm-sdcc";
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reg = <0xf9824000 0x800>,
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<0xf9824800 0x100>,
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<0xf9804000 0x7000>;
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reg-names = "core_mem", "dml_mem", "bam_mem";
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interrupts = <0 123 0>, <0 137 0>;
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interrupt-names = "core_irq", "bam_irq";
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vdd-supply = <&pm8941_l20>;
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vdd-io-supply = <&pm8941_s3>;
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qcom,vdd-always-on;
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qcom,vdd-lpm-sup;
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qcom,vdd-voltage-level = <2950000 2950000>;
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qcom,vdd-current-level = <800 500000>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-voltage-level = <1800000 1800000>;
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qcom,vdd-io-current-level = <250 154000>;
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qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
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qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
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qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
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qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
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qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
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qcom,sup-voltages = <2950 2950>;
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qcom,bus-width = <8>;
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qcom,nonremovable;
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qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
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qcom,msm-bus,name = "sdcc1";
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qcom,msm-bus,num-cases = <8>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
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<78 512 1600 3200>, /* 400 KB/s*/
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<78 512 80000 160000>, /* 20 MB/s */
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<78 512 100000 200000>, /* 25 MB/s */
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<78 512 200000 400000>, /* 50 MB/s */
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<78 512 400000 800000>, /* 100 MB/s */
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<78 512 800000 1600000>, /* 200 MB/s */
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<78 512 2048000 4096000>; /* Max. bandwidth */
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qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
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qcom,dat1-mpm-int = <42>;
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status = "disable";
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};
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sdcc2: qcom,sdcc@f98a4000 {
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cell-index = <2>; /* SDC2 SD card slot */
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compatible = "qcom,msm-sdcc";
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reg = <0xf98a4000 0x800>,
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<0xf98a4800 0x100>,
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<0xf9884000 0x7000>;
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reg-names = "core_mem", "dml_mem", "bam_mem";
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interrupts = <0 125 0>, <0 220 0>;
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interrupt-names = "core_irq", "bam_irq";
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vdd-supply = <&pm8941_l21>;
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vdd-io-supply = <&pm8941_l13>;
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qcom,vdd-voltage-level = <2950000 2950000>;
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qcom,vdd-current-level = <9000 800000>;
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qcom,vdd-io-voltage-level = <1800000 2950000>;
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qcom,vdd-io-current-level = <6 22000>;
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qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
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qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
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qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
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qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
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qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
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qcom,sup-voltages = <2950 2950>;
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qcom,bus-width = <4>;
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qcom,xpc;
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qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
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qcom,current-limit = <800>;
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qcom,msm-bus,name = "sdcc2";
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qcom,msm-bus,num-cases = <8>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
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<81 512 1600 3200>, /* 400 KB/s*/
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<81 512 80000 160000>, /* 20 MB/s */
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<81 512 100000 200000>, /* 25 MB/s */
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<81 512 200000 400000>, /* 50 MB/s */
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<81 512 400000 800000>, /* 100 MB/s */
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<81 512 800000 1600000>, /* 200 MB/s */
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<81 512 2048000 4096000>; /* Max. bandwidth */
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qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
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qcom,dat1-mpm-int = <44>;
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status = "disable";
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};
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sdcc3: qcom,sdcc@f9864000 {
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cell-index = <3>; /* SDC3 SDIO slot */
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compatible = "qcom,msm-sdcc";
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reg = <0xf9864000 0x800>,
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<0xf9864800 0x100>,
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<0xf9844000 0x7000>;
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reg-names = "core_mem", "dml_mem", "bam_mem";
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#address-cells = <0>;
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interrupt-parent = <&sdcc3>;
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interrupts = <0 1 2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xffffffff>;
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interrupt-map = <0 &intc 0 127 0
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1 &intc 0 223 0
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2 &msmgpio 37 0x8>;
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interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
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gpios = <&msmgpio 40 0>, /* CLK */
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<&msmgpio 39 0>, /* CMD */
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<&msmgpio 38 0>, /* DATA0 */
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<&msmgpio 37 0>, /* DATA1 */
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<&msmgpio 36 0>, /* DATA2 */
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<&msmgpio 35 0>; /* DATA3 */
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qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
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qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
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qcom,sup-voltages = <1800 1800>;
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qcom,bus-width = <4>;
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qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
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qcom,msm-bus,name = "sdcc3";
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qcom,msm-bus,num-cases = <8>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
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<79 512 1600 3200>, /* 400 KB/s*/
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<79 512 80000 160000>, /* 20 MB/s */
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<79 512 100000 200000>, /* 25 MB/s */
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<79 512 200000 400000>, /* 50 MB/s */
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<79 512 400000 800000>, /* 100 MB/s */
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<79 512 800000 1600000>, /* 200 MB/s */
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<79 512 2048000 4096000>; /* Max. bandwidth */
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qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
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status = "disable";
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};
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sdcc4: qcom,sdcc@f98e4000 {
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cell-index = <4>; /* SDC4 SDIO slot */
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compatible = "qcom,msm-sdcc";
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reg = <0xf98e4000 0x800>,
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<0xf98e4800 0x100>,
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<0xf98c4000 0x7000>;
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reg-names = "core_mem", "dml_mem", "bam_mem";
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#address-cells = <0>;
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interrupt-parent = <&sdcc4>;
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interrupts = <0 1 2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xffffffff>;
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interrupt-map = <0 &intc 0 129 0
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1 &intc 0 226 0
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2 &msmgpio 95 0x8>;
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interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
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gpios = <&msmgpio 93 0>, /* CLK */
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<&msmgpio 91 0>, /* CMD */
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<&msmgpio 96 0>, /* DATA0 */
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<&msmgpio 95 0>, /* DATA1 */
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<&msmgpio 94 0>, /* DATA2 */
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<&msmgpio 92 0>; /* DATA3 */
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qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
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qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
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qcom,sup-voltages = <1800 1800>;
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qcom,bus-width = <4>;
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qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
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qcom,msm-bus,name = "sdcc4";
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qcom,msm-bus,num-cases = <8>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps = <80 512 0 0>, /* No vote */
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<80 512 1600 3200>, /* 400 KB/s*/
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<80 512 80000 160000>, /* 20 MB/s */
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<80 512 100000 200000>, /* 25 MB/s */
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<80 512 200000 400000>, /* 50 MB/s */
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<80 512 400000 800000>, /* 100 MB/s */
|
|
<80 512 800000 1600000>, /* 200 MB/s */
|
|
<80 512 2048000 4096000>; /* Max. bandwidth */
|
|
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
|
|
status = "disable";
|
|
};
|
|
|
|
sdhc_1: sdhci@f9824900 {
|
|
qcom,bus-width = <8>;
|
|
compatible = "qcom,sdhci-msm";
|
|
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
interrupts = <0 123 0>, <0 138 0>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
|
|
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
|
|
qcom,cpu-dma-latency-us = <200>;
|
|
|
|
qcom,msm-bus,name = "sdhc1";
|
|
qcom,msm-bus,num-cases = <8>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
|
|
<78 512 1600 3200>, /* 400 KB/s*/
|
|
<78 512 80000 160000>, /* 20 MB/s */
|
|
<78 512 100000 200000>, /* 25 MB/s */
|
|
<78 512 200000 400000>, /* 50 MB/s */
|
|
<78 512 400000 800000>, /* 100 MB/s */
|
|
<78 512 800000 1600000>, /* 200 MB/s */
|
|
<78 512 2048000 4096000>; /* Max. bandwidth */
|
|
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
|
|
status = "disable";
|
|
};
|
|
|
|
sdhc_2: sdhci@f98a4900 {
|
|
compatible = "qcom,sdhci-msm";
|
|
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
interrupts = <0 125 0>, <0 221 0>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
|
|
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
|
|
qcom,bus-width = <4>;
|
|
qcom,cpu-dma-latency-us = <200>;
|
|
|
|
qcom,msm-bus,name = "sdhc2";
|
|
qcom,msm-bus,num-cases = <8>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
|
|
<81 512 1600 3200>, /* 400 KB/s*/
|
|
<81 512 80000 160000>, /* 20 MB/s */
|
|
<81 512 100000 200000>, /* 25 MB/s */
|
|
<81 512 200000 400000>, /* 50 MB/s */
|
|
<81 512 400000 800000>, /* 100 MB/s */
|
|
<81 512 800000 1600000>, /* 200 MB/s */
|
|
<81 512 2048000 4096000>; /* Max. bandwidth */
|
|
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
|
|
status = "disable";
|
|
};
|
|
|
|
sdhc_3: sdhci@f9864900 {
|
|
compatible = "qcom,sdhci-msm";
|
|
reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
interrupts = <0 127 0>, <0 224 0>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
gpios = <&msmgpio 40 0>, /* CLK */
|
|
<&msmgpio 39 0>, /* CMD */
|
|
<&msmgpio 38 0>, /* DATA0 */
|
|
<&msmgpio 37 0>, /* DATA1 */
|
|
<&msmgpio 36 0>, /* DATA2 */
|
|
<&msmgpio 35 0>; /* DATA3 */
|
|
qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
|
|
|
|
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
|
|
qcom,bus-width = <4>;
|
|
qcom,cpu-dma-latency-us = <200>;
|
|
|
|
qcom,msm-bus,name = "sdhc3";
|
|
qcom,msm-bus,num-cases = <8>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
|
|
<79 512 1600 3200>, /* 400 KB/s*/
|
|
<79 512 80000 160000>, /* 20 MB/s */
|
|
<79 512 100000 200000>, /* 25 MB/s */
|
|
<79 512 200000 400000>, /* 50 MB/s */
|
|
<79 512 400000 800000>, /* 100 MB/s */
|
|
<79 512 800000 1600000>, /* 200 MB/s */
|
|
<79 512 2048000 4096000>; /* Max. bandwidth */
|
|
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
|
|
status = "disable";
|
|
};
|
|
|
|
sdhc_4: sdhci@f98e4900 {
|
|
compatible = "qcom,sdhci-msm";
|
|
reg = <0xf98e4900 0x11c>, <0xf98e4000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
interrupts = <0 129 0>, <0 227 0>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
gpios = <&msmgpio 93 0>, /* CLK */
|
|
<&msmgpio 91 0>, /* CMD */
|
|
<&msmgpio 96 0>, /* DATA0 */
|
|
<&msmgpio 95 0>, /* DATA1 */
|
|
<&msmgpio 94 0>, /* DATA2 */
|
|
<&msmgpio 92 0>; /* DATA3 */
|
|
qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
|
|
|
|
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
|
|
qcom,bus-width = <4>;
|
|
qcom,cpu-dma-latency-us = <200>;
|
|
|
|
qcom,msm-bus,name = "sdhc4";
|
|
qcom,msm-bus,num-cases = <8>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps = <80 512 0 0>, /* No vote */
|
|
<80 512 1600 3200>, /* 400 KB/s*/
|
|
<80 512 80000 160000>, /* 20 MB/s */
|
|
<80 512 100000 200000>, /* 25 MB/s */
|
|
<80 512 200000 400000>, /* 50 MB/s */
|
|
<80 512 400000 800000>, /* 100 MB/s */
|
|
<80 512 800000 1600000>, /* 200 MB/s */
|
|
<80 512 2048000 4096000>; /* Max. bandwidth */
|
|
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
|
|
status = "disable";
|
|
};
|
|
|
|
qcom,sps@f9980000 {
|
|
compatible = "qcom,msm_sps";
|
|
reg = <0xf9984000 0x15000>,
|
|
<0xf9999000 0xb000>;
|
|
interrupts = <0 94 0>;
|
|
|
|
qcom,bam-dma-res-pipes = <6>;
|
|
};
|
|
|
|
spi_7: spi_epm: spi@f9966000 {
|
|
compatible = "qcom,spi-qup-v2";
|
|
reg = <0xf9966000 0x1000>;
|
|
interrupts = <0 104 0>;
|
|
spi-max-frequency = <19200000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
gpios = <&msmgpio 56 0>, /* CLK */
|
|
<&msmgpio 54 0>, /* MISO */
|
|
<&msmgpio 53 0>; /* MOSI */
|
|
cs-gpios = <&msmgpio 55 0>;
|
|
qcom,master-id = <84>;
|
|
};
|
|
|
|
tspp: msm_tspp@f99d8000 {
|
|
compatible = "qcom,msm_tspp";
|
|
cell-index = <0>;
|
|
reg = <0xf99d8000 0x1000>, /* MSM_TSIF0_PHYS */
|
|
<0xf99d9000 0x1000>, /* MSM_TSIF1_PHYS */
|
|
<0xf99da000 0x1000>, /* MSM_TSPP_PHYS */
|
|
<0xf99c4000 0x14000>; /* MSM_TSPP_BAM_PHYS */
|
|
reg-names = "MSM_TSIF0_PHYS",
|
|
"MSM_TSIF1_PHYS",
|
|
"MSM_TSPP_PHYS",
|
|
"MSM_TSPP_BAM_PHYS";
|
|
interrupts = <0 153 0>, /* TSIF_TSPP_IRQ */
|
|
<0 151 0>, /* TSIF0_IRQ */
|
|
<0 152 0>, /* TSIF1_IRQ */
|
|
<0 154 0>; /* TSIF_BAM_IRQ */
|
|
interrupt-names = "TSIF_TSPP_IRQ",
|
|
"TSIF0_IRQ",
|
|
"TSIF1_IRQ",
|
|
"TSIF_BAM_IRQ";
|
|
qcom,tsif-pclk = "iface_clk";
|
|
qcom,tsif-ref-clk = "ref_clk";
|
|
gpios = <&msmgpio 89 0>, /* TSIF0 CLK */
|
|
<&msmgpio 90 0>, /* TSIF0 EN */
|
|
<&msmgpio 91 0>, /* TSIF0 DATA */
|
|
<&msmgpio 92 0>, /* TSIF0 SYNC */
|
|
<&msmgpio 93 0>, /* TSIF1 CLK */
|
|
<&msmgpio 94 0>, /* TSIF1 EN */
|
|
<&msmgpio 95 0>, /* TSIF1 DATA */
|
|
<&msmgpio 96 0>; /* TSIF1 SYNC */
|
|
qcom,gpio-names = "tsif_clk",
|
|
"tsif_en",
|
|
"tsif_data",
|
|
"tsif_sync",
|
|
"tsif_clk",
|
|
"tsif_en",
|
|
"tsif_data",
|
|
"tsif_sync";
|
|
qcom,gpios-func = <1>;
|
|
|
|
qcom,msm-bus,name = "tsif";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,active-only = <0>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<82 512 0 0>, /* No vote */
|
|
<82 512 12288 24576>; /* Max. bandwidth, 2xTSIF, each max of 96Mbps */
|
|
};
|
|
|
|
slim_msm: slim@fe12f000 {
|
|
cell-index = <1>;
|
|
compatible = "qcom,slim-ngd";
|
|
reg = <0xfe12f000 0x35000>,
|
|
<0xfe104000 0x20000>;
|
|
reg-names = "slimbus_physical", "slimbus_bam_physical";
|
|
interrupts = <0 163 0 0 164 0>;
|
|
interrupt-names = "slimbus_irq", "slimbus_bam_irq";
|
|
|
|
taiko_codec {
|
|
compatible = "qcom,taiko-slim-pgd";
|
|
elemental-addr = [00 01 A0 00 17 02];
|
|
|
|
interrupt-parent = <&wcd9xxx_intc>;
|
|
interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
|
|
17 18 19 20 21 22 23 24 25 26 27 28 29
|
|
30>;
|
|
|
|
qcom,cdc-reset-gpio = <&msmgpio 63 0>;
|
|
|
|
cdc-vdd-buck-supply = <&pm8941_s2>;
|
|
qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
|
|
qcom,cdc-vdd-buck-current = <650000>;
|
|
|
|
cdc-vdd-tx-h-supply = <&pm8941_s3>;
|
|
qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
|
|
qcom,cdc-vdd-tx-h-current = <25000>;
|
|
|
|
cdc-vdd-rx-h-supply = <&pm8941_s3>;
|
|
qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
|
|
qcom,cdc-vdd-rx-h-current = <25000>;
|
|
|
|
cdc-vddpx-1-supply = <&pm8941_s3>;
|
|
qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
|
|
qcom,cdc-vddpx-1-current = <10000>;
|
|
|
|
cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
|
|
qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
|
|
qcom,cdc-vdd-a-1p2v-current = <10000>;
|
|
|
|
cdc-vddcx-1-supply = <&pm8941_l1>;
|
|
qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
|
|
qcom,cdc-vddcx-1-current = <10000>;
|
|
|
|
cdc-vddcx-2-supply = <&pm8941_l1>;
|
|
qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
|
|
qcom,cdc-vddcx-2-current = <10000>;
|
|
|
|
qcom,cdc-static-supplies = "cdc-vdd-buck",
|
|
"cdc-vdd-tx-h",
|
|
"cdc-vdd-rx-h",
|
|
"cdc-vddpx-1",
|
|
"cdc-vdd-a-1p2v",
|
|
"cdc-vddcx-1",
|
|
"cdc-vddcx-2";
|
|
|
|
qcom,cdc-micbias-ldoh-v = <0x3>;
|
|
qcom,cdc-micbias-cfilt1-mv = <1800>;
|
|
qcom,cdc-micbias-cfilt2-mv = <2700>;
|
|
qcom,cdc-micbias-cfilt3-mv = <1800>;
|
|
qcom,cdc-micbias1-cfilt-sel = <0x0>;
|
|
qcom,cdc-micbias2-cfilt-sel = <0x1>;
|
|
qcom,cdc-micbias3-cfilt-sel = <0x2>;
|
|
qcom,cdc-micbias4-cfilt-sel = <0x2>;
|
|
qcom,cdc-mclk-clk-rate = <9600000>;
|
|
qcom,cdc-slim-ifd = "taiko-slim-ifd";
|
|
qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
|
|
qcom,cdc-dmic-sample-rate = <4800000>;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "qcom,msm8974-audio-taiko";
|
|
qcom,model = "msm8974-taiko-snd-card";
|
|
|
|
qcom,audio-routing =
|
|
"RX_BIAS", "MCLK",
|
|
"LDO_H", "MCLK",
|
|
"AIF4 MAD", "MCLK",
|
|
"AMIC1", "MIC BIAS1 Internal1",
|
|
"MIC BIAS1 Internal1", "Handset Mic",
|
|
"AMIC2", "MIC BIAS2 External",
|
|
"MIC BIAS2 External", "Headset Mic",
|
|
"AMIC3", "MIC BIAS2 External",
|
|
"MIC BIAS2 External", "ANCRight Headset Mic",
|
|
"AMIC4", "MIC BIAS2 External",
|
|
"MIC BIAS2 External", "ANCLeft Headset Mic",
|
|
"DMIC1", "MIC BIAS1 External",
|
|
"MIC BIAS1 External", "Digital Mic1",
|
|
"DMIC2", "MIC BIAS1 External",
|
|
"MIC BIAS1 External", "Digital Mic2",
|
|
"DMIC3", "MIC BIAS3 External",
|
|
"MIC BIAS3 External", "Digital Mic3",
|
|
"DMIC4", "MIC BIAS3 External",
|
|
"MIC BIAS3 External", "Digital Mic4",
|
|
"DMIC5", "MIC BIAS4 External",
|
|
"MIC BIAS4 External", "Digital Mic5",
|
|
"DMIC6", "MIC BIAS4 External",
|
|
"MIC BIAS4 External", "Digital Mic6";
|
|
|
|
qcom,cdc-mclk-gpios = <&pm8941_gpios 15 0>;
|
|
qcom,taiko-mclk-clk-freq = <9600000>;
|
|
qcom,prim-auxpcm-gpio-clk = <&msmgpio 65 0>;
|
|
qcom,prim-auxpcm-gpio-sync = <&msmgpio 66 0>;
|
|
qcom,prim-auxpcm-gpio-din = <&msmgpio 67 0>;
|
|
qcom,prim-auxpcm-gpio-dout = <&msmgpio 68 0>;
|
|
qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
|
|
qcom,sec-auxpcm-gpio-clk = <&msmgpio 79 0>;
|
|
qcom,sec-auxpcm-gpio-sync = <&msmgpio 80 0>;
|
|
qcom,sec-auxpcm-gpio-din = <&msmgpio 81 0>;
|
|
qcom,sec-auxpcm-gpio-dout = <&msmgpio 82 0>;
|
|
};
|
|
|
|
spmi_bus: qcom,spmi@fc4c0000 {
|
|
cell-index = <0>;
|
|
compatible = "qcom,spmi-pmic-arb";
|
|
reg-names = "core", "intr", "cnfg";
|
|
reg = <0xfc4cf000 0x1000>,
|
|
<0Xfc4cb000 0x1000>,
|
|
<0Xfc4ca000 0x1000>;
|
|
/* 190,ee0_krait_hlos_spmi_periph_irq */
|
|
/* 187,channel_0_krait_hlos_trans_done_irq */
|
|
interrupts = <0 190 0 0 187 0>;
|
|
qcom,pmic-arb-ee = <0>;
|
|
qcom,pmic-arb-channel = <0>;
|
|
};
|
|
|
|
i2c_0: i2c@f9967000 { /* BLSP#11 */
|
|
cell-index = <0>;
|
|
compatible = "qcom,i2c-qup";
|
|
reg = <0Xf9967000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg-names = "qup_phys_addr";
|
|
interrupts = <0 105 0>;
|
|
interrupt-names = "qup_err_intr";
|
|
qcom,i2c-bus-freq = <100000>;
|
|
qcom,i2c-src-freq = <50000000>;
|
|
qcom,master-id = <84>;
|
|
};
|
|
|
|
i2c_1: i2c@f9923000 {
|
|
cell-index = <1>;
|
|
compatible = "qcom,i2c-qup";
|
|
reg = <0xf9923000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg-names = "qup_phys_addr";
|
|
interrupts = <0 95 0>;
|
|
interrupt-names = "qup_err_intr";
|
|
qcom,i2c-bus-freq = <100000>;
|
|
qcom,i2c-src-freq = <19200000>;
|
|
qcom,scl-gpio = <&msmgpio 3 0>;
|
|
qcom,sda-gpio = <&msmgpio 2 0>;
|
|
qcom,master-id = <86>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_2: i2c@f9924000 {
|
|
cell-index = <2>;
|
|
compatible = "qcom,i2c-qup";
|
|
reg = <0xf9924000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg-names = "qup_phys_addr";
|
|
interrupts = <0 96 0>;
|
|
interrupt-names = "qup_err_intr";
|
|
qcom,i2c-bus-freq = <100000>;
|
|
qcom,i2c-src-freq = <50000000>;
|
|
qcom,master-id = <86>;
|
|
};
|
|
|
|
spi_0: spi@f9923000 {
|
|
compatible = "qcom,spi-qup-v2";
|
|
reg = <0xf9923000 0x1000>;
|
|
interrupts = <0 95 0>;
|
|
spi-max-frequency = <19200000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
gpios = <&msmgpio 3 0>, /* CLK */
|
|
<&msmgpio 1 0>, /* MISO */
|
|
<&msmgpio 0 0>; /* MOSI */
|
|
cs-gpios = <&msmgpio 9 0>;
|
|
qcom,master-id = <86>;
|
|
};
|
|
|
|
qcom,acpuclk@f9000000 {
|
|
compatible = "qcom,acpuclk-8974";
|
|
krait0-supply = <&krait0_vreg>;
|
|
krait1-supply = <&krait1_vreg>;
|
|
krait2-supply = <&krait2_vreg>;
|
|
krait3-supply = <&krait3_vreg>;
|
|
krait0_mem-supply = <&pm8841_s1_ao>;
|
|
krait1_mem-supply = <&pm8841_s1_ao>;
|
|
krait2_mem-supply = <&pm8841_s1_ao>;
|
|
krait3_mem-supply = <&pm8841_s1_ao>;
|
|
krait0_dig-supply = <&pm8841_s2_corner_ao>;
|
|
krait1_dig-supply = <&pm8841_s2_corner_ao>;
|
|
krait2_dig-supply = <&pm8841_s2_corner_ao>;
|
|
krait3_dig-supply = <&pm8841_s2_corner_ao>;
|
|
krait0_hfpll-supply = <&pm8941_l12_ao>;
|
|
krait1_hfpll-supply = <&pm8941_l12_ao>;
|
|
krait2_hfpll-supply = <&pm8941_l12_ao>;
|
|
krait3_hfpll-supply = <&pm8941_l12_ao>;
|
|
l2_hfpll-supply = <&pm8941_l12_ao>;
|
|
};
|
|
|
|
usb3: qcom,ssusb@f9200000 {
|
|
compatible = "qcom,dwc-usb3-msm";
|
|
reg = <0xf9200000 0xfc000>,
|
|
<0xfd4ab000 0x4>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
interrupts = <0 133 0>;
|
|
interrupt-names = "hs_phy_irq";
|
|
ssusb_vdd_dig-supply = <&pm8841_s2_corner>;
|
|
SSUSB_1p8-supply = <&pm8941_l6>;
|
|
hsusb_vdd_dig-supply = <&pm8841_s2_corner>;
|
|
HSUSB_1p8-supply = <&pm8941_l6>;
|
|
HSUSB_3p3-supply = <&pm8941_l24>;
|
|
vbus_dwc3-supply = <&pm8941_mvs1>;
|
|
qcom,dwc-usb3-msm-dbm-eps = <4>;
|
|
qcom,vdd-voltage-level = <1 5 7>;
|
|
qcom,dwc-hsphy-init = <0x00D195A4>;
|
|
|
|
qcom,msm-bus,name = "usb3";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<61 512 0 0>,
|
|
<61 512 240000 960000>;
|
|
dwc3@f9200000 {
|
|
compatible = "synopsys,dwc3";
|
|
reg = <0xf9200000 0xfc000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <0 131 0>, <0 179 0>;
|
|
interrupt-names = "irq", "otg_irq";
|
|
tx-fifo-resize;
|
|
};
|
|
};
|
|
|
|
ehci: qcom,ehci-host@f9a55000 {
|
|
compatible = "qcom,ehci-host";
|
|
status = "disabled";
|
|
reg = <0xf9a55000 0x400>;
|
|
interrupts = <0 134 0>, <0 140 0>;
|
|
interrupt-names = "core_irq", "async_irq";
|
|
HSUSB_VDDCX-supply = <&pm8841_s2>;
|
|
HSUSB_1p8-supply = <&pm8941_l6>;
|
|
HSUSB_3p3-supply = <&pm8941_l24>;
|
|
qcom,usb2-enable-hsphy2;
|
|
qcom,usb2-power-budget = <500>;
|
|
};
|
|
|
|
gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
|
|
parent-supply = <&pm8841_s4_corner>;
|
|
};
|
|
|
|
qcom,lpass@fe200000 {
|
|
compatible = "qcom,pil-q6v5-lpass";
|
|
reg = <0xfe200000 0x00100>,
|
|
<0xfd485100 0x00010>,
|
|
<0xfc4016c0 0x00004>;
|
|
reg-names = "qdsp6_base", "halt_base", "restart_reg";
|
|
vdd_cx-supply = <&pm8841_s2_corner>;
|
|
interrupts = <0 162 1>;
|
|
|
|
qcom,firmware-name = "adsp";
|
|
|
|
/* GPIO inputs from lpass */
|
|
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
|
|
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
|
|
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
|
|
|
|
/* GPIO output to lpass */
|
|
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
|
|
};
|
|
|
|
qcom,msm-adsp-loader {
|
|
compatible = "qcom,adsp-loader";
|
|
qcom,adsp-state = <0>;
|
|
};
|
|
|
|
qcom,msm-audio-ion {
|
|
compatible = "qcom,msm-audio-ion";
|
|
};
|
|
|
|
qcom,msm-pcm {
|
|
compatible = "qcom,msm-pcm-dsp";
|
|
qcom,msm-pcm-dsp-id = <0>;
|
|
};
|
|
|
|
qcom,msm-pcm-low-latency {
|
|
compatible = "qcom,msm-pcm-dsp";
|
|
qcom,msm-pcm-dsp-id = <1>;
|
|
qcom,msm-pcm-low-latency;
|
|
};
|
|
|
|
qcom,msm-pcm-routing {
|
|
compatible = "qcom,msm-pcm-routing";
|
|
};
|
|
|
|
qcom,msm-pcm-lpa {
|
|
compatible = "qcom,msm-pcm-lpa";
|
|
};
|
|
|
|
qcom,msm-compr-dsp {
|
|
compatible = "qcom,msm-compr-dsp";
|
|
};
|
|
|
|
qcom,msm-voip-dsp {
|
|
compatible = "qcom,msm-voip-dsp";
|
|
};
|
|
|
|
qcom,msm-pcm-voice {
|
|
compatible = "qcom,msm-pcm-voice";
|
|
};
|
|
|
|
qcom,msm-stub-codec {
|
|
compatible = "qcom,msm-stub-codec";
|
|
};
|
|
|
|
qcom,msm-dai-fe {
|
|
compatible = "qcom,msm-dai-fe";
|
|
};
|
|
|
|
qcom,msm-pcm-afe {
|
|
compatible = "qcom,msm-pcm-afe";
|
|
};
|
|
|
|
qcom,msm-dai-q6-hdmi {
|
|
compatible = "qcom,msm-dai-q6-hdmi";
|
|
qcom,msm-dai-q6-dev-id = <8>;
|
|
};
|
|
|
|
qcom,msm-lsm-client {
|
|
compatible = "qcom,msm-lsm-client";
|
|
};
|
|
|
|
qcom,msm-dai-q6 {
|
|
compatible = "qcom,msm-dai-q6";
|
|
qcom,msm-dai-q6-sb-0-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16384>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-0-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16385>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-1-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16386>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-1-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16387>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-2-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16388>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-2-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16389>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-3-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16390>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-3-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16391>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-4-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16392>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-4-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16393>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-sb-5-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <16395>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-bt-sco-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <12288>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-bt-sco-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <12289>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-int-fm-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <12292>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-int-fm-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <12293>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-be-afe-pcm-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <224>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-be-afe-pcm-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <225>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-afe-proxy-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <241>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-afe-proxy-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <240>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-incall-record-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32771>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-incall-record-tx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32772>;
|
|
};
|
|
|
|
qcom,msm-dai-q6-incall-music-rx {
|
|
compatible = "qcom,msm-dai-q6-dev";
|
|
qcom,msm-dai-q6-dev-id = <32773>;
|
|
};
|
|
};
|
|
|
|
qcom,msm-auxpcm {
|
|
compatible = "qcom,msm-auxpcm-resource";
|
|
qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
|
|
qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
|
|
qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
|
|
qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
|
|
qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
|
|
qcom,msm-cpudai-auxpcm-data = <0>, <0>;
|
|
qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
|
|
|
|
qcom,msm-prim-auxpcm-rx {
|
|
qcom,msm-auxpcm-dev-id = <4106>;
|
|
compatible = "qcom,msm-auxpcm-dev";
|
|
};
|
|
|
|
qcom,msm-prim-auxpcm-tx {
|
|
qcom,msm-auxpcm-dev-id = <4107>;
|
|
compatible = "qcom,msm-auxpcm-dev";
|
|
};
|
|
|
|
qcom,msm-sec-auxpcm-rx {
|
|
qcom,msm-auxpcm-dev-id = <4108>;
|
|
compatible = "qcom,msm-auxpcm-dev";
|
|
};
|
|
|
|
qcom,msm-sec-auxpcm-tx {
|
|
qcom,msm-auxpcm-dev-id = <4109>;
|
|
compatible = "qcom,msm-auxpcm-dev";
|
|
};
|
|
};
|
|
|
|
qcom,msm-dai-mi2s {
|
|
compatible = "qcom,msm-dai-mi2s";
|
|
qcom,msm-dai-q6-mi2s-quat {
|
|
compatible = "qcom,msm-dai-q6-mi2s";
|
|
qcom,msm-dai-q6-mi2s-dev-id = <3>;
|
|
qcom,msm-mi2s-rx-lines = <1>;
|
|
qcom,msm-mi2s-tx-lines = <2>;
|
|
};
|
|
};
|
|
|
|
qcom,msm-pcm-hostless {
|
|
compatible = "qcom,msm-pcm-hostless";
|
|
};
|
|
|
|
qcom,msm-ocmem-audio {
|
|
compatible = "qcom,msm-ocmem-audio";
|
|
qcom,msm-bus,name = "audio-ocmem";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<11 604 0 0>,
|
|
<11 604 32506 32506>;
|
|
};
|
|
|
|
qcom,msm-adsp-sensors {
|
|
compatible = "qcom,msm-adsp-sensors";
|
|
qcom,src-id = <11>;
|
|
qcom,dst-id = <604>;
|
|
qcom,ab = <32505856>;
|
|
qcom,ib = <32505856>;
|
|
};
|
|
|
|
qcom,mss@fc880000 {
|
|
compatible = "qcom,pil-q6v5-mss";
|
|
reg = <0xfc880000 0x100>,
|
|
<0xfd485000 0x400>,
|
|
<0xfc820000 0x020>,
|
|
<0xfc401680 0x004>;
|
|
reg-names = "qdsp6_base", "halt_base", "rmb_base",
|
|
"restart_reg";
|
|
|
|
interrupts = <0 24 1>;
|
|
vdd_mss-supply = <&pm8841_s3>;
|
|
vdd_cx-supply = <&pm8841_s2_corner>;
|
|
vdd_mx-supply = <&pm8841_s1>;
|
|
vdd_pll-supply = <&pm8941_l12>;
|
|
qcom,vdd_pll = <1800000>;
|
|
qcom,firmware-name = "mba";
|
|
qcom,pil-self-auth;
|
|
|
|
/* GPIO inputs from mss */
|
|
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
|
|
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
|
|
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
|
|
qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
|
|
|
|
/* GPIO output to mss */
|
|
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
|
|
};
|
|
|
|
qcom,pronto@fb21b000 {
|
|
compatible = "qcom,pil-pronto";
|
|
reg = <0xfb21b000 0x3000>,
|
|
<0xfc401700 0x4>,
|
|
<0xfd485300 0xc>;
|
|
reg-names = "pmu_base", "clk_base", "halt_base";
|
|
interrupts = <0 149 1>;
|
|
vdd_pronto_pll-supply = <&pm8941_l12>;
|
|
|
|
qcom,firmware-name = "wcnss";
|
|
|
|
/* GPIO inputs from wcnss */
|
|
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
|
|
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
|
|
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
|
|
|
|
/* GPIO output to wcnss */
|
|
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
|
|
};
|
|
|
|
qcom,iris-fm {
|
|
compatible = "qcom,iris_fm";
|
|
};
|
|
|
|
qcom,wcnss-wlan@fb000000 {
|
|
compatible = "qcom,wcnss_wlan";
|
|
reg = <0xfb000000 0x280000>,
|
|
<0xf9011008 0x04>;
|
|
reg-names = "wcnss_mmio", "wcnss_fiq";
|
|
interrupts = <0 145 0 0 146 0>;
|
|
interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
|
|
|
|
qcom,pronto-vddmx-supply = <&pm8841_s1>;
|
|
qcom,pronto-vddcx-supply = <&pm8841_s2>;
|
|
qcom,pronto-vddpx-supply = <&pm8941_s3>;
|
|
qcom,iris-vddxo-supply = <&pm8941_l6>;
|
|
qcom,iris-vddrfa-supply = <&pm8941_l11>;
|
|
qcom,iris-vddpa-supply = <&pm8941_l19>;
|
|
qcom,iris-vdddig-supply = <&pm8941_l3>;
|
|
|
|
gpios = <&msmgpio 36 0>, <&msmgpio 37 0>, <&msmgpio 38 0>, <&msmgpio 39 0>, <&msmgpio 40 0>;
|
|
qcom,has-48mhz-xo;
|
|
qcom,has-pronto-hw;
|
|
};
|
|
|
|
qcom,ocmem@fdd00000 {
|
|
compatible = "qcom,msm-ocmem";
|
|
reg = <0xfdd00000 0x2000>,
|
|
<0xfdd02000 0x2000>,
|
|
<0xfe039000 0x400>,
|
|
<0xfec00000 0x180000>;
|
|
reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
|
|
interrupts = <0 76 0 0 77 0>;
|
|
interrupt-names = "ocmem_irq", "dm_irq";
|
|
qcom,ocmem-num-regions = <0x3>;
|
|
qcom,ocmem-num-macros = <0x18>;
|
|
qcom,resource-type = <0x706d636f>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x0 0xfec00000 0x180000>;
|
|
|
|
partition@0 {
|
|
reg = <0x0 0x100000>;
|
|
qcom,ocmem-part-name = "graphics";
|
|
qcom,ocmem-part-min = <0x80000>;
|
|
};
|
|
|
|
partition@80000 {
|
|
reg = <0x100000 0x80000>;
|
|
qcom,ocmem-part-name = "lp_audio";
|
|
qcom,ocmem-part-min = <0x80000>;
|
|
};
|
|
|
|
partition@100000 {
|
|
reg = <0x100000 0x80000>;
|
|
qcom,ocmem-part-name = "video";
|
|
qcom,ocmem-part-min = <0x55000>;
|
|
};
|
|
|
|
};
|
|
|
|
rpm_bus: qcom,rpm-smd {
|
|
compatible = "qcom,rpm-smd";
|
|
rpm-channel-name = "rpm_requests";
|
|
rpm-channel-type = <15>; /* SMD_APPS_RPM */
|
|
};
|
|
|
|
qcom,msm-rng@f9bff000 {
|
|
compatible = "qcom,msm-rng";
|
|
reg = <0xf9bff000 0x200>;
|
|
};
|
|
|
|
qseecom: qcom,qseecom@7f00000 {
|
|
compatible = "qcom,qseecom";
|
|
reg = <0x7f00000 0x500000>;
|
|
reg-names = "secapp-region";
|
|
qcom,disk-encrypt-pipe-pair = <2>;
|
|
qcom,hlos-ce-hw-instance = <1>;
|
|
qcom,qsee-ce-hw-instance = <0>;
|
|
qcom,msm-bus,name = "qseecom-noc";
|
|
qcom,msm-bus,num-cases = <4>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<55 512 0 0>,
|
|
<55 512 3936000 393600>,
|
|
<55 512 3936000 393600>,
|
|
<55 512 3936000 393600>;
|
|
};
|
|
|
|
qcom,wdt@f9017000 {
|
|
compatible = "qcom,msm-watchdog";
|
|
reg = <0xf9017000 0x1000>;
|
|
interrupts = <0 3 0>, <0 4 0>;
|
|
qcom,bark-time = <11000>;
|
|
qcom,pet-time = <10000>;
|
|
qcom,ipi-ping;
|
|
};
|
|
|
|
qcom,tz-log@fe805720 {
|
|
compatible = "qcom,tz-log";
|
|
reg = <0xfe805720 0x1000>;
|
|
};
|
|
|
|
qcom,venus@fdce0000 {
|
|
compatible = "qcom,pil-venus";
|
|
reg = <0xfdce0000 0x4000>,
|
|
<0xfdc80000 0x400>;
|
|
reg-names = "wrapper_base", "vbif_base";
|
|
vdd-supply = <&gdsc_venus>;
|
|
|
|
qcom,firmware-name = "venus";
|
|
};
|
|
|
|
qcom,cache_erp@f9012000 {
|
|
reg = <0xf9012000 0x80>,
|
|
<0xf9089000 0x80>,
|
|
<0xf9099000 0x80>,
|
|
<0xf90a9000 0x80>,
|
|
<0xf90b9000 0x80>,
|
|
<0xf9088000 0x40>,
|
|
<0xf9098000 0x40>,
|
|
<0xf90a8000 0x40>,
|
|
<0xf90b8000 0x40>;
|
|
|
|
reg-names = "l2_saw",
|
|
"krait0_saw",
|
|
"krait1_saw",
|
|
"krait2_saw",
|
|
"krait3_saw",
|
|
"krait0_acs",
|
|
"krait1_acs",
|
|
"krait2_acs",
|
|
"krait3_acs";
|
|
|
|
compatible = "qcom,cache_erp";
|
|
interrupts = <1 9 0>, <0 2 0>;
|
|
interrupt-names = "l1_irq", "l2_irq";
|
|
};
|
|
|
|
qcom,cache_dump {
|
|
compatible = "qcom,cache_dump";
|
|
qcom,l1-dump-size = <0x100000>;
|
|
qcom,l2-dump-size = <0x500000>;
|
|
qcom,memory-reservation-type = "EBI1";
|
|
qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
|
|
};
|
|
|
|
tsens: tsens@fc4a8000 {
|
|
compatible = "qcom,msm-tsens";
|
|
reg = <0xfc4a8000 0x2000>,
|
|
<0xfc4b8000 0x1000>;
|
|
reg-names = "tsens_physical", "tsens_eeprom_physical";
|
|
interrupts = <0 184 0>;
|
|
qcom,sensors = <11>;
|
|
qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 3200
|
|
3200 3200>;
|
|
qcom,calib-mode = "fuse_map1";
|
|
};
|
|
|
|
qcom,msm-rtb {
|
|
compatible = "qcom,msm-rtb";
|
|
qcom,memory-reservation-type = "EBI1";
|
|
qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
|
|
};
|
|
|
|
qcom,msm-contig-mem {
|
|
compatible = "qcom,msm-contig-mem";
|
|
qcom,memory-reservation-type = "EBI1";
|
|
qcom,memory-reservation-size = <0x280000>; /* 2.5M EBI1 buffer */
|
|
};
|
|
|
|
qcom,qcedev@fd440000 {
|
|
compatible = "qcom,qcedev";
|
|
reg = <0xfd440000 0x20000>,
|
|
<0xfd444000 0x8000>;
|
|
reg-names = "crypto-base","crypto-bam-base";
|
|
interrupts = <0 236 0>;
|
|
qcom,bam-pipe-pair = <1>;
|
|
qcom,ce-hw-instance = <1>;
|
|
qcom,msm-bus,name = "qcedev-noc";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<56 512 0 0>,
|
|
<56 512 3936000 393600>;
|
|
};
|
|
|
|
qcom,qcrypto@fd444000 {
|
|
compatible = "qcom,qcrypto";
|
|
reg = <0xfd440000 0x20000>,
|
|
<0xfd444000 0x8000>;
|
|
reg-names = "crypto-base","crypto-bam-base";
|
|
interrupts = <0 236 0>;
|
|
qcom,bam-pipe-pair = <2>;
|
|
qcom,ce-hw-instance = <1>;
|
|
qcom,msm-bus,name = "qcrypto-noc";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<56 512 0 0>,
|
|
<56 512 3936000 393600>;
|
|
};
|
|
|
|
qcom,usbbam@f9304000 {
|
|
compatible = "qcom,usb-bam-msm";
|
|
reg = <0xf9304000 0x5000>,
|
|
<0xf9a44000 0x11000>,
|
|
<0xf92f880c 0x4>;
|
|
reg-names = "ssusb", "hsusb", "qscratch_ram1_reg";
|
|
interrupts = <0 132 0 0 135 0>;
|
|
interrupt-names = "ssusb", "hsusb";
|
|
qcom,usb-bam-num-pipes = <16>;
|
|
qcom,usb-bam-fifo-baseaddr = <0xf9200000>;
|
|
qcom,ignore-core-reset-ack;
|
|
qcom,disable-clk-gating;
|
|
|
|
qcom,pipe0 {
|
|
label = "ssusb-qdss-in-0";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,bam-type = <0>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <0>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,src-bam-physical-address = <0xfc37C000>;
|
|
qcom,src-bam-pipe-index = <0>;
|
|
qcom,dst-bam-physical-address = <0xf9304000>;
|
|
qcom,dst-bam-pipe-index = <2>;
|
|
qcom,data-fifo-offset = <0xf0000>;
|
|
qcom,data-fifo-size = <0x1800>;
|
|
qcom,descriptor-fifo-offset = <0xf4000>;
|
|
qcom,descriptor-fifo-size = <0x1400>;
|
|
qcom,reset-bam-on-connect;
|
|
};
|
|
|
|
qcom,pipe1 {
|
|
label = "hsusb-qdss-in-0";
|
|
qcom,usb-bam-mem-type = <1>;
|
|
qcom,bam-type = <1>;
|
|
qcom,dir = <1>;
|
|
qcom,pipe-num = <0>;
|
|
qcom,peer-bam = <1>;
|
|
qcom,src-bam-physical-address = <0xfc37c000>;
|
|
qcom,src-bam-pipe-index = <0>;
|
|
qcom,dst-bam-physical-address = <0xf9a44000>;
|
|
qcom,dst-bam-pipe-index = <2>;
|
|
qcom,data-fifo-offset = <0xf4000>;
|
|
qcom,data-fifo-size = <0x1000>;
|
|
qcom,descriptor-fifo-offset = <0xf5000>;
|
|
qcom,descriptor-fifo-size = <0x400>;
|
|
};
|
|
};
|
|
|
|
qcom,msm-thermal {
|
|
compatible = "qcom,msm-thermal";
|
|
qcom,sensor-id = <5>;
|
|
qcom,poll-ms = <250>;
|
|
qcom,limit-temp = <60>;
|
|
qcom,temp-hysteresis = <10>;
|
|
qcom,freq-step = <2>;
|
|
qcom,freq-control-mask = <0xf>;
|
|
qcom,core-limit-temp = <80>;
|
|
qcom,core-temp-hysteresis = <10>;
|
|
qcom,core-control-mask = <0xe>;
|
|
qcom,vdd-restriction-temp = <5>;
|
|
qcom,vdd-restriction-temp-hysteresis = <10>;
|
|
qcom,pmic-sw-mode-temp = <85>;
|
|
qcom,pmic-sw-mode-temp-hysteresis = <75>;
|
|
qcom,pmic-sw-mode-regs = "vdd_dig";
|
|
vdd_dig-supply = <&pm8841_s2_floor_corner>;
|
|
vdd_gfx-supply = <&pm8841_s4_floor_corner>;
|
|
|
|
qcom,vdd-dig-rstr{
|
|
qcom,vdd-rstr-reg = "vdd_dig";
|
|
qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
|
|
qcom,min-level = <1>; /* No Request */
|
|
};
|
|
|
|
qcom,vdd-gfx-rstr{
|
|
qcom,vdd-rstr-reg = "vdd_gfx";
|
|
qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
|
|
qcom,min-level = <1>; /* No Request */
|
|
};
|
|
|
|
qcom,vdd-apps-rstr{
|
|
qcom,vdd-rstr-reg = "vdd_apps";
|
|
qcom,levels = <1881600 1958400 2265600>;
|
|
qcom,freq-req;
|
|
};
|
|
};
|
|
|
|
qcom,bam_dmux@fc834000 {
|
|
compatible = "qcom,bam_dmux";
|
|
reg = <0xfc834000 0x7000>;
|
|
interrupts = <0 29 1>;
|
|
qcom,rx-ring-size = <64>;
|
|
};
|
|
|
|
memory_hole: qcom,msm-mem-hole {
|
|
compatible = "qcom,msm-mem-hole";
|
|
qcom,memblock-remove = <0x7f00000 0x8000000>; /* Address and Size of Hole */
|
|
};
|
|
|
|
uart7: uart@f995d000 { /*BLSP #2, UART #7 */
|
|
compatible = "qcom,msm-hsuart-v14";
|
|
status = "disabled";
|
|
reg = <0xf995d000 0x1000>,
|
|
<0xf9944000 0x19000>;
|
|
reg-names = "core_mem", "bam_mem";
|
|
interrupts = <0 113 0>, <0 239 0>;
|
|
interrupt-names = "core_irq", "bam_irq";
|
|
|
|
qcom,bam-tx-ep-pipe-index = <0>;
|
|
qcom,bam-rx-ep-pipe-index = <1>;
|
|
qcom,msm-bus,name = "uart7";
|
|
qcom,msm-bus,num-cases = <2>;
|
|
qcom,msm-bus,num-paths = <1>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<84 512 0 0>,
|
|
<84 512 500 800>;
|
|
};
|
|
|
|
qcom,smem@fa00000 {
|
|
compatible = "qcom,smem";
|
|
reg = <0xfa00000 0x200000>,
|
|
<0xf9011000 0x1000>,
|
|
<0xfc428000 0x4000>;
|
|
reg-names = "smem", "irq-reg-base", "aux-mem1";
|
|
|
|
qcom,smd-modem {
|
|
compatible = "qcom,smd";
|
|
qcom,smd-edge = <0>;
|
|
qcom,smd-irq-offset = <0x8>;
|
|
qcom,smd-irq-bitmask = <0x1000>;
|
|
qcom,pil-string = "modem";
|
|
interrupts = <0 25 1>;
|
|
};
|
|
|
|
qcom,smsm-modem {
|
|
compatible = "qcom,smsm";
|
|
qcom,smsm-edge = <0>;
|
|
qcom,smsm-irq-offset = <0x8>;
|
|
qcom,smsm-irq-bitmask = <0x2000>;
|
|
interrupts = <0 26 1>;
|
|
};
|
|
|
|
qcom,smd-adsp {
|
|
compatible = "qcom,smd";
|
|
qcom,smd-edge = <1>;
|
|
qcom,smd-irq-offset = <0x8>;
|
|
qcom,smd-irq-bitmask = <0x100>;
|
|
qcom,pil-string = "adsp";
|
|
interrupts = <0 156 1>;
|
|
};
|
|
|
|
qcom,smsm-adsp {
|
|
compatible = "qcom,smsm";
|
|
qcom,smsm-edge = <1>;
|
|
qcom,smsm-irq-offset = <0x8>;
|
|
qcom,smsm-irq-bitmask = <0x200>;
|
|
interrupts = <0 157 1>;
|
|
};
|
|
|
|
qcom,smd-wcnss {
|
|
compatible = "qcom,smd";
|
|
qcom,smd-edge = <6>;
|
|
qcom,smd-irq-offset = <0x8>;
|
|
qcom,smd-irq-bitmask = <0x20000>;
|
|
qcom,pil-string = "wcnss";
|
|
interrupts = <0 142 1>;
|
|
};
|
|
|
|
qcom,smsm-wcnss {
|
|
compatible = "qcom,smsm";
|
|
qcom,smsm-edge = <6>;
|
|
qcom,smsm-irq-offset = <0x8>;
|
|
qcom,smsm-irq-bitmask = <0x80000>;
|
|
interrupts = <0 144 1>;
|
|
};
|
|
|
|
qcom,smd-rpm {
|
|
compatible = "qcom,smd";
|
|
qcom,smd-edge = <15>;
|
|
qcom,smd-irq-offset = <0x8>;
|
|
qcom,smd-irq-bitmask = <0x1>;
|
|
interrupts = <0 168 1>;
|
|
qcom,irq-no-suspend;
|
|
};
|
|
};
|
|
|
|
qcom,bcl {
|
|
compatible = "qcom,bcl";
|
|
};
|
|
|
|
qcom,ssm {
|
|
compatible = "qcom,ssm";
|
|
qcom,channel-name = "SSM_RTR";
|
|
};
|
|
|
|
sfpb_spinlock: qcom,ipc-spinlock@fd484000 {
|
|
compatible = "qcom,ipc-spinlock-sfpb";
|
|
reg = <0xfd484000 0x400>;
|
|
qcom,num-locks = <8>;
|
|
};
|
|
|
|
ldrex_spinlock: qcom,ipc-spinlock@fa00000 {
|
|
compatible = "qcom,ipc-spinlock-ldrex";
|
|
reg = <0xfa00000 0x200000>;
|
|
status = "disable";
|
|
};
|
|
|
|
cpu-pmu {
|
|
compatible = "qcom,krait-pmu";
|
|
qcom,irq-is-percpu;
|
|
interrupts = <1 7 0xf00>;
|
|
};
|
|
|
|
l2-pmu {
|
|
compatible = "qcom,l2-pmu";
|
|
interrupts = <0 1 0>;
|
|
};
|
|
|
|
qcom,smdtty {
|
|
compatible = "qcom,smdtty";
|
|
|
|
smdtty_apps_fm: qcom,smdtty-apps-fm {
|
|
qcom,smdtty-remote = "wcnss";
|
|
qcom,smdtty-port-name = "APPS_FM";
|
|
};
|
|
|
|
smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
|
|
qcom,smdtty-remote = "wcnss";
|
|
qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
|
|
};
|
|
|
|
smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
|
|
qcom,smdtty-remote = "wcnss";
|
|
qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
|
|
};
|
|
|
|
smdtty_mbalbridge: qcom,smdtty-mbalbridge {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "MBALBRIDGE";
|
|
};
|
|
|
|
smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
|
|
qcom,smdtty-remote = "wcnss";
|
|
qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
|
|
};
|
|
|
|
smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
|
|
qcom,smdtty-remote = "wcnss";
|
|
qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
|
|
};
|
|
|
|
smdtty_data1: qcom,smdtty-data1 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA1";
|
|
};
|
|
|
|
smdtty_data11: qcom,smdtty-data11 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA11";
|
|
};
|
|
|
|
smdtty_data21: qcom,smdtty-data21 {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "DATA21";
|
|
};
|
|
|
|
smdtty_gps_nmea: smdtty-gpsnmea {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "GPSNMEA";
|
|
};
|
|
|
|
smdtty_loopback: smdtty-loopback {
|
|
qcom,smdtty-remote = "modem";
|
|
qcom,smdtty-port-name = "LOOPBACK";
|
|
qcom,smdtty-dev-name = "LOOPBACK_TTY";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gdsc_venus {
|
|
qcom,clock-names = "core_clk";
|
|
qcom,skip-logic-collapse;
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_mdss {
|
|
qcom,clock-names = "core_clk", "lut_clk";
|
|
qcom,retain-periph;
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_jpeg {
|
|
qcom,clock-names = "core0_clk", "core1_clk", "core2_clk";
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_vfe {
|
|
qcom,clock-names = "core0_clk", "core1_clk", "csi0_clk", "csi1_clk",
|
|
"cpp_clk";
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_oxili_gx {
|
|
qcom,clock-names = "core_clk";
|
|
qcom,retain-mem;
|
|
qcom,retain-periph;
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_oxili_cx {
|
|
status = "ok";
|
|
};
|
|
|
|
&gdsc_usb_hsic {
|
|
status = "ok";
|
|
};
|
|
|
|
/include/ "msm-pm8x41-rpm-regulator.dtsi"
|
|
/include/ "msm-pm8841.dtsi"
|
|
/include/ "msm-pm8941.dtsi"
|
|
/include/ "msm8974-regulator.dtsi"
|
|
/include/ "msm8974-clock.dtsi"
|