137 lines
4.3 KiB
C
137 lines
4.3 KiB
C
/*
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* Copyright (c) 2011 Broadcom Corporation
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _BRCMFMAC_SDIO_CHIP_H_
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#define _BRCMFMAC_SDIO_CHIP_H_
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/*
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* Core reg address translation.
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* Both macro's returns a 32 bits byte address on the backplane bus.
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*/
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#define CORE_CC_REG(base, field) \
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(base + offsetof(struct chipcregs, field))
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#define CORE_BUS_REG(base, field) \
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(base + offsetof(struct sdpcmd_regs, field))
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#define CORE_SB(base, field) \
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(base + SBCONFIGOFF + offsetof(struct sbconfig, field))
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/* SDIO function 1 register CHIPCLKCSR */
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/* Force ALP request to backplane */
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#define SBSDIO_FORCE_ALP 0x01
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/* Force HT request to backplane */
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#define SBSDIO_FORCE_HT 0x02
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/* Force ILP request to backplane */
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#define SBSDIO_FORCE_ILP 0x04
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/* Make ALP ready (power up xtal) */
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#define SBSDIO_ALP_AVAIL_REQ 0x08
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/* Make HT ready (power up PLL) */
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#define SBSDIO_HT_AVAIL_REQ 0x10
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/* Squelch clock requests from HW */
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#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
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/* Status: ALP is ready */
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#define SBSDIO_ALP_AVAIL 0x40
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/* Status: HT is ready */
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#define SBSDIO_HT_AVAIL 0x80
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#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
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#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
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#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
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#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
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#define SBSDIO_CLKAV(regval, alponly) \
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(SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
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#define BRCMF_MAX_CORENUM 6
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struct chip_core_info {
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u16 id;
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u16 rev;
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u32 base;
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u32 wrapbase;
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u32 caps;
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u32 cib;
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};
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struct chip_info {
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u32 chip;
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u32 chiprev;
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u32 socitype;
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/* core info */
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/* always put chipcommon core at 0, bus core at 1 */
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struct chip_core_info c_inf[BRCMF_MAX_CORENUM];
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u32 pmurev;
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u32 pmucaps;
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u32 ramsize;
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bool (*iscoreup)(struct brcmf_sdio_dev *sdiodev, struct chip_info *ci,
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u16 coreid);
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u32 (*corerev)(struct brcmf_sdio_dev *sdiodev, struct chip_info *ci,
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u16 coreid);
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void (*coredisable)(struct brcmf_sdio_dev *sdiodev,
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struct chip_info *ci, u16 coreid);
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void (*resetcore)(struct brcmf_sdio_dev *sdiodev,
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struct chip_info *ci, u16 coreid);
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};
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struct sbconfig {
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u32 PAD[2];
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u32 sbipsflag; /* initiator port ocp slave flag */
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u32 PAD[3];
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u32 sbtpsflag; /* target port ocp slave flag */
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u32 PAD[11];
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u32 sbtmerrloga; /* (sonics >= 2.3) */
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u32 PAD;
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u32 sbtmerrlog; /* (sonics >= 2.3) */
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u32 PAD[3];
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u32 sbadmatch3; /* address match3 */
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u32 PAD;
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u32 sbadmatch2; /* address match2 */
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u32 PAD;
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u32 sbadmatch1; /* address match1 */
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u32 PAD[7];
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u32 sbimstate; /* initiator agent state */
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u32 sbintvec; /* interrupt mask */
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u32 sbtmstatelow; /* target state */
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u32 sbtmstatehigh; /* target state */
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u32 sbbwa0; /* bandwidth allocation table0 */
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u32 PAD;
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u32 sbimconfiglow; /* initiator configuration */
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u32 sbimconfighigh; /* initiator configuration */
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u32 sbadmatch0; /* address match0 */
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u32 PAD;
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u32 sbtmconfiglow; /* target configuration */
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u32 sbtmconfighigh; /* target configuration */
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u32 sbbconfig; /* broadcast configuration */
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u32 PAD;
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u32 sbbstate; /* broadcast state */
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u32 PAD[3];
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u32 sbactcnfg; /* activate configuration */
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u32 PAD[3];
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u32 sbflagst; /* current sbflags */
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u32 PAD[3];
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u32 sbidlow; /* identification */
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u32 sbidhigh; /* identification */
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};
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extern int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,
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struct chip_info **ci_ptr, u32 regs);
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extern void brcmf_sdio_chip_detach(struct chip_info **ci_ptr);
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extern void brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
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struct chip_info *ci,
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u32 drivestrength);
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extern u8 brcmf_sdio_chip_getinfidx(struct chip_info *ci, u16 coreid);
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#endif /* _BRCMFMAC_SDIO_CHIP_H_ */
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